Core board defect detection device

By designing a poor detection device for the core board, and automatically detecting the IO port of the FPGA core board using the verification base plate and serial interface, the resource waste problem caused by the lack of detection equipment in the existing technology is solved, and the self-inspection and quality evaluation of the core board are realized .

CN222354011UActive Publication Date: 2025-01-14TRULY SEMICON
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Patent Information

Application Number
CN202420068332.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-01-10
Publication Date
2025-01-14
Estimated Expiration
2034-01-10

AI Technical Summary

Technical Problem

The prior art lacks special equipment for detecting the quality problems of the core board, resulting in the loss of false scrap resources in production.

Method used

Design a core board defect detection device, including verification base plate, hooking mother seat, power input switch, feedback lamp group and serial interface, detect the IO port of the FPGA core board by automatically burning code, and display detection using feedback lamp group result.

Benefits of technology

Self-inspection of the core board is realized, avoiding production misscrapment and reducing resource losses.

✦ Generated by Eureka AI based on patent content.

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Abstract

The core board defect detection device comprises a detection device, the detection device comprises a verification bottom plate, the front surface of the verification bottom plate is provided with three fastening female seats, the verification bottom plate is provided with a power supply input switch, the front surface of a verification bottom plate body is provided with a feedback lamp group, and the front surface of the detection device is provided with a serial interface. According to the core board defect detection device provided by the utility model, through the buckling female seat designed on the verification base plate, a detector can insert the FPGA core board into the buckling female seat, and meanwhile, through mutual connection of the serial interface and the upper computer, different IOUartTest.sof codes can be automatically burnt in the verification base plate, so that an IO port on the FPGA core board is detected. The designed feedback lamp set can feed back whether IO of the FPGA core board is normal or not, if the lamp set is fully bright, it is represented that the IO is normal, and if the lamp set is not fully bright, it is represented that a fault occurs, and therefore the core board defect detection device achieves the purposes of achieving self-inspection of the core board and avoiding resource loss caused by production mistaken scrapping.
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Description

Technical Field

[0001] The utility model relates to the technical field of core board detection devices, in particular to a core board defect detection device. Background Art

[0002] FPGA is a product further developed on the basis of programmable devices such as PAL (Programmable Array Logic) and GAL (General Array Logic). It appears as a semi-customized circuit in the field of application-specific integrated circuits, which not only solves the shortcomings of customized circuits, but also overcomes the shortcomings of the limited number of gate circuits of the original programmable devices. However, after the production of the current core board, there is a certain degree of damage and scrap, but there is no specific equipment to detect the quality of the core board. Therefore, in order to check whether the scrapped core board is a false alarm or has the possibility of recycling and reuse, a core board defect detection device is designed to realize self-inspection of the core board and avoid resource loss caused by false production scrapping. Utility Model Content

[0003] The utility model aims to overcome the deficiencies in the prior art and provide a core board defect detection device.

[0004] The purpose of this utility model is achieved through the following technical solutions:

[0005] A core board defect detection device comprises: a detection device, the detection device comprises a calibration base plate, three buckle sockets are arranged on the front of the calibration base plate, a power input switch is arranged on the calibration base plate, a feedback light group is arranged on the front of the calibration base plate body, and a serial interface is arranged on the front of the detection device; a serial interface, the serial interface is connected with a serial port tool of a host computer.

[0006] In one embodiment, the three snap-fit ​​female sockets are respectively arranged at the top, bottom and right side of the front side of the detection device, and the length of the snap-fit ​​female socket located on the right side of the front side of the calibration base plate is shorter than the length of the other two snap-fit ​​female sockets.

[0007] In one of the embodiments, the power input switch is arranged on the left side of the top of the detection device, and the power input switch is a push switch.

[0008] In one embodiment, the lights in the feedback light group are LED lights, and the feedback light group consists of a total of five LED lights of the same model, and the feedback light group is arranged on the left side of the center of the front side of the calibration base plate.

[0009] In one of the embodiments, the serial interface is arranged on the left side of the bottom of the front side of the calibration base plate.

[0010] In one of the embodiments, a control chip is disposed on the verification baseboard, and the control chip has the burned IO_Uart_Test.sof code recorded in it.

[0011] In one of the embodiments, the front side of the snap-on female socket is shaped as two rows of circular sockets of equal number and mirrored to each other, and the diameter of the circular sockets matches the IO port of the FPGA core board.

[0012] In one of the embodiments, the front side of the calibration base plate is in a square shape, and circular guide holes are provided at the four corners of the front side of the calibration base plate.

[0013] In one of the embodiments, a power socket is provided on the back of the calibration base plate, and the calibration base plate is a PCB board.

[0014] In one of the embodiments, a dustproof film is attached to the three snap-fit ​​female seats, and the length and width of the front side of the dustproof film are matched with the length and width of the three snap-fit ​​female seats.

[0015] Compared with the prior art, the utility model has at least the following advantages:

[0016] The core board defect detection device of the utility model can allow the detection personnel to insert the FPGA core board into the buckle socket through the buckle socket designed on the verification base plate, and at the same time connect with the host computer through the serial interface, and can automatically burn different IO_Uart_Test.sof codes in the verification base plate, so as to detect the IO port on the FPGA core board. The designed feedback light group can feedback whether the IO of the FPGA core board is normal. If the light group is fully lit, it means it is normal, and if it is not fully lit, it means it is faulty. Therefore, the core board defect detection device can achieve the purpose of realizing self-checking of the core board and avoiding the loss of resources caused by wrong production scrapping. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 This is a schematic diagram of the front structure of the core board defect detection device of the utility model;

[0019] Figure 2 The utility model is a schematic diagram of the structure of the use process of the core board defect detection device.

[0020] In the figure: 1. Detection device; 11. Verification base plate; 12. Snap-on female socket; 13. Power input switch; 14. Feedback light group; 15. Serial interface. DETAILED DESCRIPTION

[0021] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively with reference to the relevant drawings. The drawings provide preferred embodiments of the present invention. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly and comprehensively understood.

[0022] In the description of the present application, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0023] Unless otherwise clearly stipulated and limited, terms such as "installed", "connected", "connected", "fixed", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium; it can be the internal connection of two elements or the interaction relationship between two elements.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art in the technical field of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0025] like Figure 1-2As shown, a core board defect detection device includes: a detection device 1, the detection device 1 includes a verification base plate 11, the front of the verification base plate 11 is provided with three buckle sockets 12, the verification base plate 11 is provided with a power input switch 13, the front of the verification base plate 11 is provided with a feedback light group 14, and the front of the detection device 1 is provided with a serial interface 15; the serial interface 15, the serial interface 15 is connected to the serial port tool of the host computer. It should be noted that the operation steps of the device are: first buckle the core board to be detected into the buckle socket 12 of the verification base plate 11, then connect the serial interface 15 to the interface tool of the host computer, and start the power input switch 13, at this time start the serial port software in the host computer, the verification base plate 11 will detect the IO ports in the core board one by one, and feed back the detected results to the serial port software and print out the character string of the abnormal port, and at the same time the indicator light group will present different degrees of feedback port test results according to the detected structure (as shown in the attached figure of the specification Figure 2 content shown in ).

[0026] like Figure 1-2 As shown, in one embodiment, three buckle female seats 12 are respectively arranged at the top, bottom and right side of the front of the detection device 1, and the length of the buckle female seat 12 located on the right side of the front of the calibration base plate 11 is shorter than the length of the other two buckle female seats 12. A dustproof film is attached to the three buckle female seats 12, and the length and width of the front of the dustproof film are adapted to the length and width of the three buckle female seats 12.

[0027] It should be noted that a tear-off handle is provided on one end of the dust-proof film, and the dust-proof film is attached to the detection device 1 when it is not in use. Once it needs to be used, the dust-proof film is torn off to expose the snap-on female seat 12. This design can prevent dust from accumulating in the snap-on female seat 12.

[0028] like Figure 1-2 As shown, in one embodiment, the power input switch 13 is arranged on the left side of the top of the detection device 1, and the power input switch 13 is a push switch. It should be noted that this design allows the detection personnel to control whether the bottom plate 11 is started.

[0029] like Figure 1-2 As shown, in one embodiment, the lights in the feedback light group 14 are LED lights, and the feedback light group 14 is composed of a total of five LED lights of the same model, and the feedback light group 14 is arranged on the left side of the center of the front of the calibration base plate 11. It should be noted that the feedback light group 14 is displayed according to the test results of the feedback port, and full lighting indicates normal, and incomplete lighting indicates that some IO ports are faulty.

[0030] like Figure 1-2 As shown, in one embodiment, the serial interface 15 is arranged on the left side of the bottom of the front side of the verification base plate 11.

[0031] like Figure 1-2 As shown, in one embodiment, a control chip is provided on the verification baseboard 11, and the control chip has the burning IO_Uart_Test.sof code recorded in it. It should be noted that the burning IO_Uart_Test.sof code is the recorded basic detection code, so even if there is no connection to the host computer, basic detection can be performed.

[0032] like Figure 1-2 As shown, in one embodiment, the shape of the front side of the snap-fit ​​female socket 12 is two rows of circular sockets of the same number and mirrored to each other, and the diameter of the circular sockets matches the IO port of the FPGA core board.

[0033] like Figure 1-2 As shown, in one embodiment, the front of the verification base plate 11 is in a square shape, and circular guide holes are provided at the four corners of the front of the verification base plate 11. It should be noted that this design facilitates the inspection personnel to fix the verification base plate 11 on the inspection platform.

[0034] like Figure 1-2 As shown, in one embodiment, a power plug interface is provided at the back of the calibration base plate 11, and the calibration base plate 11 is a PCB board. It should be noted that this design is used to power on the calibration base plate 11.

[0035] The above-mentioned embodiments only express several implementation methods of the utility model, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the utility model patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the utility model, which all belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent shall be based on the attached claims.

Claims

1. A core board defect detection device, characterized in that: include: A detection device (1), the detection device (1) comprising a calibration base plate (11), three buckle female sockets (12) being arranged on the front of the calibration base plate (11), a power input switch (13) being arranged on the calibration base plate (11), a feedback light group (14) being arranged on the front of the calibration base plate (11), and a serial interface (15) being arranged on the front of the detection device (1); A serial interface (15), wherein the serial interface (15) is connected to a serial port tool of a host computer.

2. The core board defect detection device according to claim 1, characterized in that: The three snap-fit ​​female sockets (12) are respectively arranged at the top, bottom and right side of the front side of the detection device (1), and the length of the snap-fit ​​female socket (12) located on the right side of the front side of the calibration base plate (11) is shorter than the lengths of the other two snap-fit ​​female sockets (12).

3. The core board defect detection device according to claim 1, characterized in that: The power input switch (13) is arranged on the left side of the top of the detection device (1), and the power input switch (13) is a push-type switch.

4. The core board defect detection device according to claim 1, characterized in that: The lights in the feedback light group (14) are LED lights, and the feedback light group (14) consists of a total of five LED lights of the same model. The feedback light group (14) is arranged on the left side of the center of the front side of the calibration base plate (11).

5. The core board defect detection device according to claim 1, characterized in that: The serial interface (15) is arranged on the left side of the bottom of the front side of the calibration base plate (11).

6. The core board defect detection device according to claim 1, characterized in that: The verification base plate (11) is provided with a control chip, and the control chip has a burning IO_Uart_Test.sof code recorded in it.

7. The core board defect detection device according to claim 1, characterized in that: The front side of the buckle female socket (12) is in the shape of two rows of circular sockets of the same number and mirror images, and the diameter of the circular sockets matches the IO port of the FPGA core board.

8. The core board defect detection device according to claim 1, characterized in that: The front face of the calibration base plate (11) is in a square shape, and circular guide holes are provided at the four corners of the front face of the calibration base plate (11).

9. The core board defect detection device according to claim 1, characterized in that: A power plug interface is provided on the back of the calibration base plate (11), and the calibration base plate (11) is a PCB board.

10. The core board defect detection device according to claim 1, characterized in that: A dustproof film is attached to the three buckle-joined female seats (12), and the length and width of the front side of the dustproof film are matched with the length and width of the three buckle-joined female seats (12).