Programmable test board card and vehicle test system
By designing programmable test boards, the complexity and cost of testing on-board control systems are solved, efficient test coverage and reusability are achieved, and manpower and material costs are saved.
Patent Information
- Application Number
- CN202420378768.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-28
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2034-02-28
AI Technical Summary
Testing complex on-board control systems requires a huge testing environment, resulting in high labor and time costs, poor transplantability, and lack of efficient programmable testing tools.
A programmable test board is designed, including a download interface, memory chip, programmable logic circuit and switch selector, which can write the test firmware package in the download state and call the firmware package to control the vehicle components in the test state. The tester is tested to improve the coverage and reusability of test cases.
Through this test board, it can significantly save manpower and material costs, improve testing efficiency, improve test coverage of vehicle parts controllers, and enhance the scalability and reusability of the test system.
Smart Images
Figure CN222354310U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of automobile electronics, in particular to a programmable test board and a vehicle test system. Background Art
[0002] With the development of automobile technology, people's requirements for the whole vehicle system are getting higher and higher. The automobile control system is composed of multiple component controllers, which work in coordination with each other to form a complete vehicle control system. Testing complex vehicle control systems is also a very difficult task for test engineers. To test a component controller, sometimes it is necessary to connect many input signals externally and test the output signals of the component controller. Testing a certain vehicle control system may require the construction of a huge test environment, which is a huge project for test engineers. In addition, building a test system not only requires a lot of manpower and time costs, but also has poor portability. Therefore, it is very important to build a set of automotive programmable test boards. Utility Model Content
[0003] In order to solve the above technical problem or at least partially solve the above technical problem, the utility model provides a programmable test board and a vehicle test system.
[0004] To achieve the above object, the first aspect of the utility model provides a programmable test board, which is used to test a vehicle component controller. The working state of the programmable test board includes a download state and a test state. The programmable test board includes:
[0005] A download interface, electrically connected to the test firmware package generation unit and used to receive the test firmware package output by the test firmware package generation unit;
[0006] Memory chips;
[0007] a programmable logic circuit electrically connected to the vehicle component controller; and
[0008] A switch selector is electrically connected to the download interface, the programmable logic circuit and the memory chip, and is used to conduct the electrical connection between the download interface and the memory chip so that the programmable test board is in a download state, so that the test firmware package generation unit can write the test firmware package into the memory chip through the download interface; the switch selector is also used to conduct the electrical connection between the programmable logic circuit and the memory chip so that the programmable test board is in a test state, so that the programmable logic circuit can load the test firmware package written in the memory chip to test the vehicle component controller.
[0009] The programmable test board provided by the utility model can download and store the test firmware package generated by the test firmware package generation unit in the storage chip through the download interface in the download state, and call the test firmware package written into the storage chip through the programmable logic circuit in the test state to test the vehicle component controller, thereby improving the test case coverage of the vehicle component controller, improving the reusability and scalability of the programmable test board, and further saving manpower and material costs.
[0010] Optionally, the download interface includes a first sub-interface and a second sub-interface both electrically connected to the switch selector and the test firmware package generation unit, the first sub-interface being used to receive the test firmware package output by the test firmware package generation unit, and the second sub-interface being used for the switch selector to receive the first control signal or the second control signal output by the test firmware package generation unit through the second sub-interface;
[0011] Among them, the switch selector conducts the electrical connection between the first sub-interface and the storage chip in response to the first control signal, thereby causing the programmable test board to enter a download state, and conducts the electrical connection between the programmable logic circuit and the storage chip in response to the second control signal, thereby causing the programmable test board to enter a test state.
[0012] Optionally, the programmable logic circuit is also electrically connected to the second sub-interface, and enters a reset state and stops working in response to the first control signal output by the second sub-interface.
[0013] Optionally, the switch selector comprises a dual bus buffer.
[0014] Optionally, the programmable test board also includes a power supply circuit, which is electrically connected to the programmable logic circuit and is used to provide a power supply voltage to the programmable logic circuit.
[0015] Optionally, the programmable test board also includes a signal connection port electrically connected between the vehicle component controller and the programmable logic circuit.
[0016] Optionally, the programmable logic circuit includes at least one of FPGA, MCU, DSP or ARM.
[0017] A second aspect of the present application further provides a vehicle testing system, the vehicle testing system comprising:
[0018] A test firmware package generation unit; and
[0019] As described in the first aspect above, the programmable test board is electrically connected to the test firmware package generating unit.
[0020] Optionally, the test firmware package generating unit includes:
[0021] A PC is used to generate and output the test firmware package and download program instructions; and
[0022] A downloader is electrically connected between the PC and the programmable test board. The downloader outputs a first control signal to the programmable test board in response to a download program instruction output by the PC to control the programmable test board to enter a download state. The downloader is also used to parse the test firmware package output by the PC and output the parsed test firmware package to the programmable test board, and is used to output a second control signal to the programmable test board when the download program instruction output by the PC is not received to control the programmable test board to enter a test state.
[0023] Optionally, the downloader includes:
[0024] A communication module, electrically connected to the PC and used to receive the test firmware package and download program instructions output by the PC;
[0025] an output interface electrically connected to a download interface of the programmable test board; and
[0026] The controller is electrically connected to the communication module and the output interface, and outputs a first control signal to the programmable test board through the output interface in response to a download program instruction output by the PC. The controller is also used to receive a test firmware package output by the PC through the communication module, parse the test firmware package output by the PC, and output the parsed test firmware package to the programmable test board through the output interface.
[0027] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is a first structural schematic diagram of a vehicle testing system provided by an embodiment of the utility model;
[0029] Figure 2 This is a second structural schematic diagram of the vehicle testing system provided by the embodiment of the utility model;
[0030] Figure 3 This is the first development flow chart of the test firmware package provided by the embodiment of the utility model;
[0031] Figure 4This is a second development flow chart of the test firmware package provided by the embodiment of the utility model.
[0032] The following are the descriptions of the reference numerals:
[0033] Vehicle test system 1
[0034] Programmable test board 10
[0035] Download interface 11
[0036] Memory chip 12
[0037] Programmable logic circuit 13
[0038] Switch selector 14
[0039] The first sub-interface 111
[0040] Second sub-interface 112
[0041] Power circuit 15
[0042] Signal connection port 16
[0043] Test firmware package generation unit 20
[0044] PC 22
[0045] Downloader21
[0046] Communication Module 211
[0047] Output interface 212
[0048] Controller 213
[0049] The third sub-interface 2121
[0050] Fourth sub-interface 2122
[0051] Vehicle Parts Controller 2
[0052] DC power supply 30
[0053] Plug 40
[0054] Interface adapter board 50
[0055] The following specific implementation manner will illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0056] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0057] In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", etc. are based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0058] Please also read Figure 1-2 The utility model provides a programmable test board 10, which is used to test a vehicle component controller 2. The working states of the programmable test board 10 include a download state and a test state.
[0059] like Figure 1 As shown, the programmable test board 10 includes a download interface 11 , a storage chip 12 , a programmable logic circuit 13 and a switch selector 14 .
[0060] The download interface 11 is electrically connected to the test firmware package generating unit 20 and is used to receive the test firmware package output by the test firmware package generating unit 20 .
[0061] The programmable logic circuit 13 is electrically connected to the vehicle component controller 2 .
[0062] The switch selector 14 is electrically connected to the download interface 11, the programmable logic circuit 13 and the memory chip 12, and is used to conduct the electrical connection between the download interface 11 and the memory chip 12 so that the programmable test board 10 is in a download state, so that the test firmware package generation unit 20 can write the test firmware package into the memory chip 12 through the download interface 11. The switch selector 14 is also used to conduct the electrical connection between the programmable logic circuit 13 and the memory chip 12 so that the programmable test board 10 is in a test state, so that the programmable logic circuit 13 can load the test firmware package written in the memory chip 12 to test the vehicle component controller 2.
[0063] The programmable test board 10 provided by the utility model can download and store the test firmware package generated by the test firmware package generation unit 20 in the storage chip 12 through the download interface 11 in the download state, and call the test firmware package written into the storage chip 12 through the programmable logic circuit 13 in the test state to test the vehicle component controller 2, thereby improving the test case coverage of the vehicle component controller 2, improving the reusability and scalability of the programmable test board 10, and further saving manpower and material costs.
[0064] Exemplarily, the memory chip 12 includes a non-permanent memory in a computer-readable medium, a random access memory (RAM) and / or a non-volatile memory, and the like, for example, may be a flash RAM.
[0065] like Figure 1 As shown, in some embodiments, the download interface 11 includes a first sub-interface 111 and a second sub-interface 112, and the first sub-interface 111 and the second sub-interface 112 are both electrically connected to the switch selector 14 and the test firmware package generation unit 20, wherein the first sub-interface 111 is used to receive the test firmware package output by the test firmware package generation unit 20, and the second sub-interface 112 is used for the switch selector 14 to receive the first control signal or the second control signal output by the test firmware package generation unit 20 through the second sub-interface 112.
[0066] Among them, the switch selector 14 conducts the electrical connection between the first sub-interface 111 and the storage chip 12 in response to the first control signal, thereby causing the programmable test board 10 to enter a download state, and conducts the electrical connection between the programmable logic circuit 13 and the storage chip 12 in response to the second control signal, thereby causing the programmable test board 10 to enter a test state.
[0067] Exemplarily, the first sub-interface 111 is a SPI (Serial Peripheral Interface) interface, and the second sub-interface 112 is an I / O interface, that is, the switch selector 14 is electrically connected to the SPI interface of the memory chip 12 and the SPI interface of the programmable logic circuit 13, respectively, and in response to the first control signal, directs the SPI interface of the memory chip 12 to the first sub-interface 111, thereby making the programmable test board 10 enter a download state, and in response to the second control signal, directs the SPI interface of the memory chip 12 to the SPI interface of the programmable logic circuit 13.
[0068] Exemplarily, the first control signal is a high level signal, and the second control signal is a low level signal.
[0069] In some embodiments, the programmable logic circuit 13 is also electrically connected to the second sub-interface 112, and enters a reset state and stops working in response to the first control signal output by the second sub-interface 112, and enters a working state in response to the second control signal output by the second sub-interface 112, and loads the test firmware package written in the storage chip 12 to test the vehicle component controller 2.
[0070] In this way, in the process of writing the test firmware package into the storage chip 12, the programmable logic circuit 13 is controlled to enter a reset state (ie, passively enter a download state) through the first control signal, thereby reducing the power consumption of the programmable logic circuit 13.
[0071] In some embodiments, the switch selector 14 includes a dual bus buffer. The model of the dual bus buffer may be SN74HC126DR, and the dual bus buffer may include a control terminal OE, a first input terminal A, a second input terminal B, a first output terminal X, and a second output terminal Y. The control terminal OE is electrically connected to the second sub-interface 112 of the download interface 11, and is used to receive the first control signal or the second control signal output by the test firmware package generation unit 20 through the second sub-interface 112. The first input terminal A is electrically connected to the first sub-interface 111 of the download interface 11, the second input terminal B and the first output terminal X are both electrically connected to the SPI interface of the storage chip 12, and the second output terminal Y is electrically connected to the SPI interface of the programmable logic circuit 13. The dual bus buffer switches on the electrical connection between the first input terminal A and the first output terminal X in response to the first control signal, and disconnects the electrical connection between the second input terminal B and the second output terminal Y, thereby switching on the electrical connection between the first sub-interface 111 and the SPI interface of the memory chip 12 so that the programmable test board 10 enters a download state, and switches on the electrical connection between the second input terminal B and the second output terminal Y in response to the second control signal, and disconnects the electrical connection between the first input terminal A and the first output terminal X, thereby switching on the electrical connection between the SPI interface of the memory chip 12 and the SPI interface of the programmable logic circuit 13 so that the programmable test board 10 enters a test state.
[0072] In some embodiments, the programmable test board 10 further includes a power supply circuit 15, which is electrically connected to the programmable logic circuit 13 and is used to provide a power supply voltage to the programmable logic circuit 13. Exemplarily, the voltage value of the power supply voltage provided by the power supply circuit 15 can be 12V, 5V, 3.3V, 1.8V, etc.
[0073] In some embodiments, the programmable test board 10 further includes a signal connection port 16 electrically connected between the vehicle component controller 2 and the programmable logic circuit.
[0074] In some embodiments, the programmable logic circuit 13 includes at least one of FPGA (Field Programmable Gate Array), MCU (Micro Control Unit), DSP (Digital Signal Process), ARM (Advanced RISC Machines, modern computer processor chip) and single-chip microcomputer (Low Performance MCU).
[0075] Please refer to 1 again. Figure 2 The utility model also provides a vehicle testing system 1, which includes a test firmware package generation unit 20 and a programmable test board 10 described in any of the above embodiments, and the programmable test board 10 is electrically connected to the test firmware package generation unit 20.
[0076] The vehicle testing system 1 provided by the utility model adopts a programmable test board 10 to download and store the test firmware package generated by the test firmware package generation unit 20 in the storage chip 12 through the download interface 11 in the download state, and calls the test firmware package written into the storage chip 12 through the programmable logic circuit 13 in the test state to test the vehicle component controller 2, which can improve the test case coverage of the vehicle component controller 2, improve the reusability and scalability of the programmable test board 10, and thus save manpower and material costs.
[0077] In some embodiments, the test firmware package generating unit 20 includes a downloader 21 and a PC 22 .
[0078] The PC 22 is used to generate and output the test firmware package and download program instructions.
[0079] The downloader 21 is electrically connected between the PC 22 and the programmable test board 10. The downloader 21 outputs a first control signal to the programmable test board 10 in response to a download program instruction output by the PC 22 to control the programmable test board 10 to enter a download state. The downloader 21 is also used to parse the test firmware package output by the PC 22 and output the parsed test firmware package to the programmable test board 10, and to output a second control signal to the programmable test board 10 when the download program instruction output by the PC 22 is not received to control the programmable test board 10 to enter a test state.
[0080] like Figure 3 As shown, in some embodiments, the programmable test board 10 includes FPGA, and the Simulink application is installed in the PC 22, and the test firmware package can be generated by the Simulink application. Specifically, the functional module design can be carried out by the Simulink application, and simulation test is carried out after the design. If the simulation test fails, return to re-design the functional module, until the simulation test is successful, generate HDL (Hardware Description Language, hardware description language) engineering code. In the Simlink application, the FPGA development tool is started in the form of a command line, and its HDL engineering code is analyzed and synthesized, constraint input, and compiled engineering generates a test firmware package, and then the test firmware package is downloaded to the memory chip 12.
[0081] like Figure 4 As shown, in other implementations, a Labview application is installed in the PC 22, and the test firmware package can be generated by the Labview application. The specific process is the same as above and will not be repeated here.
[0082] Among them, HDL is a hardware description language, which describes the structure and behavior of digital system hardware in text form. It can be used to represent logic circuit diagrams, logic expressions, and the logical functions performed by digital logic systems.
[0083] In this way, applications can be developed through some graphical components or scripting languages in Simulink applications or Labview applications. There is no need to handwrite HDL design codes, designers do not need to be particularly proficient in HDL language, and the development difficulty coefficient is relatively low.
[0084] like Figure 1 As shown, in some embodiments, the downloader 21 includes a communication module 211 , an output interface 212 , and a controller 213 .
[0085] The communication module 211 is electrically connected to the PC 22 and is used to receive the test firmware package and download program instructions output by the PC 22 .
[0086] The output interface 212 is electrically connected to the download interface 11 of the programmable test board 10 .
[0087] The controller 213 is electrically connected to the communication module 211 and the output interface 212, and outputs a first control signal to the programmable test board 10 through the output interface 212 in response to a download program instruction output by the PC 22. The controller 213 is also used to receive a test firmware package output by the PC 22 through the communication module 211, parse the test firmware package output by the PC 22, and output the parsed test firmware package to the programmable test board 10 through the output interface 212.
[0088] Exemplarily, the communication module 211 is used to communicate with the PC 22, and the communication module 211 may include a CAN (Controller Area Network) bus interface, a UART (Universal Asynchronous Receiver / Transmitter) interface, a LAN (Local Area Network) interface, and the like.
[0089] The output interface 212 includes a third sub-interface 2121 and a fourth sub-interface 2122. The third sub-interface 2121 is electrically connected to the controller 213 and the first sub-interface 111, and the fourth sub-interface 2122 is electrically connected to the controller 213 and the second sub-interface 112. Exemplarily, the third sub-interface 2121 is an SPI interface, and the fourth sub-interface 2122 is an I / O interface.
[0090] During operation, upon receiving the download program instruction output by the PC 22, the controller 213 sequentially outputs the first control signal to the switch selector 14 and the programmable logic circuit 13 through the fourth sub-interface 2122 and the second sub-interface 112, and parses the test firmware package output by the PC 22, and writes the parsed test firmware package into the memory chip 12 sequentially through the third sub-interface 2121, the first sub-interface 111, and the switch selector 14. When the controller 213 does not receive the download program instruction output by the PC 22 and the test firmware package, it outputs the second control signal to the switch selector 14 and the programmable logic circuit 13 through the fourth sub-interface 2122 and the second sub-interface 112, that is, when the programmable test board 10 is powered on, by default, the switch selector 14 guides the SPI interface of the memory chip 12 to the SPI interface of the programmable logic circuit 13, so that the programmable logic circuit 13 can load the test firmware package stored in the memory chip 12 into the internal RAM for startup.
[0091] In this way, by configuring the customized downloader 21 for the programmable test board 10, it can be compatible with more PFGA manufacturers and has stronger applicability.
[0092] like Figure 2 As shown, in some embodiments, the vehicle test system 1 may include multiple programmable test boards 10, and the multiple programmable test boards 10 are integrated into a board assembly. For example, the multiple programmable test boards 10 may include at least one of a digital input board, a digital output board, an analog input board, and an analog output board. Each of the programmable test boards 10 can download a corresponding test firmware package from the PC 22 through the downloader 21.
[0093] In some embodiments, the vehicle testing system 1 may further include a plug 40 and a DC power supply 30 .
[0094] The plug 40 is electrically connected to the DC power supply 30 and the PC 22 , and is used to receive AC power and provide the AC power to the DC power supply 30 and the PC 22 .
[0095] The DC power supply 30 is also electrically connected to the power circuit 15 of the programmable test board 10 , and is used to convert the AC power received by the plug 40 into DC power, such as DC power with a voltage value of 24V, 12V, 5V, or 3.3V, and provide it to the power circuit 15 .
[0096] In some embodiments, the vehicle testing system 1 may also include an interface adapter board 50 electrically connected between the board assembly and the vehicle component controller 2, and the interface adapter board 50 is mainly used to perform level conversion on the signal transmitted in the signal line so that the vehicle component controller 2 can recognize the signal output by the programmable test board 10, and the programmable test board 10 can recognize the signal output by the vehicle component controller 2.
[0097] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.
Claims
1. A programmable test board, characterized in that: The programmable test board is used to test the vehicle component controller. The working state of the programmable test board includes a download state and a test state. The programmable test board includes: A download interface, electrically connected to the test firmware package generation unit and used to receive the test firmware package output by the test firmware package generation unit; Memory chips; a programmable logic circuit electrically connected to the vehicle component controller; and A switch selector is electrically connected to the download interface, the programmable logic circuit and the memory chip, and is used to conduct the electrical connection between the download interface and the memory chip so that the programmable test board is in a download state, so that the test firmware package generation unit can write the test firmware package into the memory chip through the download interface; the switch selector is also used to conduct the electrical connection between the programmable logic circuit and the memory chip so that the programmable test board is in a test state, so that the programmable logic circuit can load the test firmware package written in the memory chip to test the vehicle component controller.
2. The programmable test board as claimed in claim 1, characterized in that: The download interface includes a first sub-interface and a second sub-interface both electrically connected to the switch selector and the test firmware package generation unit, the first sub-interface being used to receive the test firmware package output by the test firmware package generation unit, and the second sub-interface being used for the switch selector to receive the first control signal or the second control signal output by the test firmware package generation unit through the second sub-interface; Among them, the switch selector conducts the electrical connection between the first sub-interface and the storage chip in response to the first control signal, thereby causing the programmable test board to enter a download state, and conducts the electrical connection between the programmable logic circuit and the storage chip in response to the second control signal, thereby causing the programmable test board to enter a test state.
3. The programmable test board as claimed in claim 2, characterized in that: The programmable logic circuit is also electrically connected to the second sub-interface, and enters a reset state and stops working in response to the first control signal output by the second sub-interface.
4. The programmable test board as claimed in claim 1, characterized in that: The switch selector includes a dual bus buffer.
5. The programmable test board as claimed in claim 1, characterized in that: The programmable test board also includes a power supply circuit, which is electrically connected to the programmable logic circuit and is used to provide a power supply voltage to the programmable logic circuit.
6. The programmable test board as claimed in claim 1, characterized in that: The programmable test board also includes a signal connection port electrically connected between the vehicle component controller and the programmable logic circuit.
7. The programmable test board as claimed in claim 1, characterized in that: The programmable logic circuit includes at least one of FPGA, MCU, DSP or ARM.
8. A vehicle testing system, characterized in that: The vehicle testing system comprises: A test firmware package generation unit; and The programmable test board according to any one of claims 1 to 7, wherein the programmable test board is electrically connected to the test firmware package generation unit.
9. The vehicle testing system according to claim 8, characterized in that: The test firmware package generating unit comprises: A PC is used to generate and output the test firmware package and download program instructions; and A downloader is electrically connected between the PC and the programmable test board. The downloader outputs a first control signal to the programmable test board in response to a download program instruction output by the PC to control the programmable test board to enter a download state. The downloader is also used to parse the test firmware package output by the PC and output the parsed test firmware package to the programmable test board, and is used to output a second control signal to the programmable test board when the download program instruction output by the PC is not received to control the programmable test board to enter a test state.
10. The vehicle testing system according to claim 9, characterized in that: The downloader includes: A communication module, electrically connected to the PC and used to receive the test firmware package and download program instructions output by the PC; an output interface electrically connected to a download interface of the programmable test board; and The controller is electrically connected to the communication module and the output interface, and outputs a first control signal to the programmable test board through the output interface in response to a download program instruction output by the PC. The controller is also used to receive a test firmware package output by the PC through the communication module, parse the test firmware package output by the PC, and output the parsed test firmware package to the programmable test board through the output interface.