Sampling circuit and switching power supply

By designing the sampling circuit of common mode and differential mode rejection units in the switching power supply, using resistors, capacitors and inductors to build filter circuits, combined with op amps, the signal distortion problem caused by high-frequency interference noise is solved, and the design cost and difficulty are reduced. Improve signal linearity and versatility.

CN222365035UActive Publication Date: 2025-01-17MORNSUN GUANGZHOU SCI & TECH
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Patent Information

Application Number
CN202420429376.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-06
Publication Date
2025-01-17
Estimated Expiration
2034-03-06

AI Technical Summary

Technical Problem

The interference noise generated by existing switching power supplies under high-frequency switching devices leads to distortion of the sampling signal, which cannot correspond linearly to the controller, and the high-precision op amp chip is costly and the common mode rejection parameters are unadjustable, resulting in increased design difficulty and cost.

Method used

Design a sampling circuit, including a common mode suppression unit and a differential mode suppression unit, build a symmetric filtering circuit through resistors, capacitors and inductors, and combine with an operational amplifier to filter out common mode noise first and then differential mode noise to achieve high linearity Output signals to reduce dependence on high-precision chips.

Benefits of technology

It realizes the high linearity output signal without using high-precision op amp chips, which reduces product design costs, improves design versatility and reliability, and simplifies the design process.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a sampling circuit and a switching power supply. The sampling circuit comprises a common-mode suppression unit, the first input end of the common-mode suppression unit is the first input end of the sampling circuit, the second input end of the common-mode suppression unit is the second input end of the sampling circuit, the common-mode suppression unit is used for filtering common-mode noise in first differential signals acquired by the first input end and the second input end of the common-mode suppression unit and then outputting second differential signals, and the circuit structure has symmetry; the first input end of the differential-mode suppression unit is connected with the first output end of the common-mode suppression unit, the second input end of the differential-mode suppression unit is connected with the second output end of the common-mode suppression unit, and the differential-mode suppression unit is used for filtering differential-mode noise in the second differential signal and then outputting a third differential signal; the first input end of the operational amplification unit is connected with the first output end of the differential mode suppression unit, the second input end of the operational amplification unit is connected with the second output end of the differential mode suppression unit, the output end of the operational amplification unit is the output end of the sampling circuit, and the operational amplification unit is used for outputting the third differential signal after operational amplification processing. The utility model has the advantages of higher generality, lower cost and the like.
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Description

Technical Field

[0001] The utility model relates to the technical field of power electronics, in particular to a sampling circuit and a switching power supply. Background Art

[0002] With the development of modern power electronics technology, switching power supplies are more widely used in various occasions. In addition to meeting basic performance requirements, traditional switching power supplies also need to be compatible with various application conditions. In order to pursue miniaturization and maximize power density, the frequency of switching devices in today's switching power supplies will rise to a very high level. The problem caused by the increase in frequency is that a large amount of interference noise at the switching frequency will be generated inside the machine. Some of these interference noises are common-mode components, and some are differential-mode components. In the sampling circuit, if these high-frequency interferences are not effectively suppressed, the signal output by the final sampling unit will be distorted to a large extent, resulting in the controller being unable to linearly correspond to the theoretical value and the actual value when processing, ultimately causing control failure.

[0003] In most analog switching power supply designs, the sampling process is mainly completed by using high-precision op amp chips with high common-mode rejection ratio in combination with resistors and capacitors. This solution can make the sampling signal obtained by the controller as distortion-free as possible, but the disadvantage is that the cost of the op amp chip is high. In addition, the common-mode rejection parameters cannot be adjusted. When the differential-mode and common-mode interference of the switching power supply are inconsistent when it is empty / lightly loaded or fully loaded, and there is a difference between the switching frequency of the switching power supply and the suppression bandwidth inside the op amp chip, since the common-mode rejection parameters of the op amp cannot be adjusted, the suppression effect relying solely on the chip is not good.

[0004] It has strong versatility and can be applied to voltage, current or other small signal sampling circuits: The utility model circuit can be applied to different sampling environments and can be used for current sampling. This circuit is used in the secondary side of the current sensor or Hall element or in various small signal sampling switching power supplies such as voltage sampling and temperature sampling; Utility Model Content

[0005] In view of this, the technical problem to be solved by the present invention is to provide a sampling circuit and a switching power supply, which at least solve one of the technical problems existing in the prior art to a certain extent, and at the same time can reduce the design cost of the product, improve the versatility and reliability of the product design process, and reduce the design difficulty of the product.

[0006] As a first aspect of the present invention, the technical solution of the sampling circuit provided is as follows:

[0007] A sampling circuit, comprising:

[0008] A common mode suppression unit, wherein the first input end is the first input end of the sampling circuit, and the second input end is the second input end of the sampling circuit. The common mode suppression unit is used to filter out the common mode noise in the first differential signal sampled by the first input end and the second input end, and then output a second differential signal. The circuit structure of the common mode suppression unit is symmetrical.

[0009] a differential mode suppression unit, wherein a first input end thereof is connected to a first output end of the common mode suppression unit, and a second input end thereof is connected to a second output end of the common mode suppression unit, and the common mode suppression unit is used for filtering out differential mode noise in the second differential signal and then outputting a third differential signal;

[0010] An operational amplifier unit, wherein a first input end is connected to the first output end of the differential mode suppression unit, a second input end is connected to the second output end of the differential mode suppression unit, and an output end is the output end of the sampling circuit. The operational amplifier unit is used to perform operational amplification processing on the third differential signal and then output it from its output end.

[0011] Preferably, the common-mode suppression unit includes a resistor R1, a resistor R2, a capacitor C1, a capacitor C2 and a common-mode inductor LF1, one end of the resistor R1, one end of the capacitor C1 and one end of the first winding of the common-mode inductor LF1 are connected together as the first input end of the common-mode suppression unit, one end of the resistor R2, one end of the capacitor C2 and one end of the second winding of the common-mode inductor LF1 are connected together as the second input end of the common-mode suppression unit, the other end of the first winding of the common-mode inductor LF1 is the first output end of the common-mode suppression unit, the other end of the second winding of the common-mode inductor LF1 is the second output end of the common-mode suppression unit, and the other end of the resistor R1, the other end of the capacitor C1, the other end of the resistor R2 and the other end of the capacitor C2 are connected to the ground end of the sampling circuit.

[0012] Preferably, the differential mode suppression unit includes a capacitor C3, an inductor L1 and an inductor L2, one end of the capacitor C3 and one end of the inductor L1 are connected together as the first input end of the differential mode suppression unit, the other end of the capacitor C3 and one end of the inductor L2 are connected together as the second input end of the differential mode suppression unit, the other end of the inductor L1 is the first output end of the differential mode suppression unit, and the other end of the inductor L2 is the second output end of the differential mode suppression unit.

[0013] Preferably, the operational amplifier unit includes resistors R3, R4, R5, R6 and an operational amplifier U1B, one end of the resistor R3 is the first input end of the operational amplifier unit, the other end of the resistor R3 and one end of the resistor R6 are simultaneously connected to the inverting input end of the operational amplifier U1B, the other end of the resistor R6 is connected to the output end of the operational amplifier U1B, one end of the resistor R4 is the second input end of the operational amplifier unit, the other end of the resistor R4 and one end of the resistor R5 are simultaneously connected to the non-inverting input end of the operational amplifier U1B, and the other end of the resistor R5 is connected to the ground end of the sampling circuit.

[0014] Preferably, the common-mode suppression unit includes a resistor R1, a resistor R2, a capacitor C1, a capacitor C2 and a common-mode inductor LF1, one end of the resistor R1, one end of the capacitor C1 and one end of the first winding of the common-mode inductor LF1 are connected together as a first input end of the common-mode suppression unit, one end of the resistor R2, one end of the capacitor C2 and one end of the second winding of the common-mode inductor LF1 are connected together as a second input end of the common-mode suppression unit, the other end of the first winding of the common-mode inductor LF1 is a first output end of the common-mode suppression unit, the other end of the second winding of the common-mode inductor LF1 is a second output end of the common-mode suppression unit, and the other end of the resistor R1, the other end of the capacitor C1, the other end of the resistor R2 and the other end of the capacitor C2 are connected to the ground end of the sampling circuit;

[0015] The differential mode suppression unit includes a capacitor C3, an inductor L1 and an inductor L2, one end of the capacitor C3 and one end of the inductor L1 are connected together as a first input end of the differential mode suppression unit, the other end of the capacitor C3 and one end of the inductor L2 are connected together as a second input end of the differential mode suppression unit, the other end of the inductor L1 is a first output end of the differential mode suppression unit, and the other end of the inductor L2 is a second output end of the differential mode suppression unit;

[0016] The operational amplifier unit includes resistors R3, R4, R5, R6 and the operational amplifier U1B, one end of the resistor R3 is the first input end of the operational amplifier unit, the other end of the resistor R3 and one end of the resistor R6 are simultaneously connected to the inverting input end of the operational amplifier U1B, the other end of the resistor R6 is connected to the output end of the operational amplifier U1B, one end of the resistor R4 is the second input end of the operational amplifier unit, the other end of the resistor R4 and one end of the resistor R5 are simultaneously connected to the non-inverting input end of the operational amplifier U1B, and the other end of the resistor R5 is connected to the ground end of the sampling circuit.

[0017] As a second aspect of the present invention, the technical solution of the embodiment of the switching power supply provided is as follows:

[0018] A switching power supply, wherein: the switching power supply comprises the sampling circuit described in any one of the first aspects above.

[0019] Furthermore, the components of the common mode suppression unit in the PCB layout are symmetrically arranged.

[0020] Compared with the prior art, the utility model has the following advantages and beneficial effects:

[0021] (1) The sampling circuit of the embodiment of the utility model first uses the common mode suppression unit to specifically filter out the common mode noise in the sampled small signal, and then uses the differential mode suppression unit to filter out the differential mode noise therein, and finally enters the operational amplifier unit for operational amplification processing, so as to obtain an output signal corresponding to the high linearity of the sampled small signal, thereby achieving the goal of not using an operational amplifier chip with high precision and high common mode suppression, which is conducive to reducing product costs;

[0022] (2) The circuit structure of the common mode suppression unit in the sampling circuit of the embodiment of the utility model is symmetrical, thereby ensuring that the common mode signal can be effectively filtered out;

[0023] (3) When the sampling circuit of the embodiment of the utility model is implemented, a filter circuit is constructed by using an inductor, a resistor and a capacitor, and combined with an operational amplifier, so the circuit implementation is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A structural block diagram of a sampling circuit provided in the first embodiment of the utility model;

[0025] Figure 2 A specific circuit diagram of a sampling circuit provided in the first embodiment of the utility model;

[0026] Figure 3 for Figure 2 Schematic diagram of the circuit used in voltage sampling applications;

[0027] Figure 4 for Figure 2 Schematic diagram of the circuit used in current sampling applications. DETAILED DESCRIPTION

[0028] In order to make the above-mentioned purposes, features and advantages of the utility model more obvious and easy to understand, the specific implementation methods of the utility model are described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application.

[0029] It should be noted that the terms "including" and "having" and any variations thereof described in the specification and claims of the present application are intended to cover non-exclusive inclusions. For example, the inclusion of a series of components, unit circuits or control timings is not necessarily limited to those components, unit circuits or control timings clearly listed, but may include components, unit circuits or control timings that are not clearly listed or inherent to these circuits.

[0030] In addition, the embodiments and features of the embodiments in this application may be combined with each other if there is no conflict.

[0031] It should be understood that, in the specification and the claims, when an element is described as being “connected” to another element, the element may be “directly connected” to the other element, or be “connected” to the other element through a third element; when a step is described as being continued to another step, the step may be directly continued to the other step, or be continued to the other step through a third step.

[0032] First embodiment

[0033] This embodiment provides a circuit using: Figure 1 For a structural block diagram of the sampling circuit provided in the first embodiment of the utility model, please refer to Figure 1 , which include:

[0034] A common mode suppression unit, wherein the first input end is the first input end of the sampling circuit, and the second input end is the second input end of the sampling circuit. The common mode suppression unit is used to filter out the common mode noise in the first differential signal sampled by the first input end and the second input end, and then output a second differential signal. The circuit structure of the common mode suppression unit is symmetrical.

[0035] A differential mode suppression unit, wherein a first input end thereof is connected to a first output end of a common mode suppression unit, and a second input end thereof is connected to a second output end of the common mode suppression unit, and the common mode suppression unit is used for filtering out differential mode noise in the second differential signal and then outputting a third differential signal;

[0036] The operational amplifier unit has a first input end connected to the first output end of the differential mode suppression unit, a second input end connected to the second output end of the differential mode suppression unit, and an output end being the output end of the sampling circuit. The operational amplifier unit is used to perform operational amplification processing on the third differential signal and then output it from its output end.

[0037] The sampling circuit of this embodiment first uses the common-mode suppression unit to specifically filter out the common-mode noise in the sampled small signal, and then uses the differential-mode suppression unit to filter out the differential-mode noise therein, and finally enters the operational amplifier unit for operational amplification processing, so as to obtain an output signal corresponding to the high linearity of the sampled small signal, thereby achieving the goal of not using an operational amplifier chip with high precision and high common-mode suppression, which is beneficial to reducing product costs.

[0038] The circuit structure of the common mode suppression unit in the sampling circuit of this embodiment is symmetrical, thus ensuring that the common mode signal can be effectively filtered out.

[0039] Figure 2 For a specific circuit diagram of the sampling circuit provided in the first embodiment of the utility model, please refer to Figure 2 ,in:

[0040] The common-mode suppression unit includes a resistor R1, a resistor R2, a capacitor C1, a capacitor C2 and a common-mode inductor LF1, one end of the resistor R1, one end of the capacitor C1 and one end of the first winding of the common-mode inductor LF1 are connected together as a first input end of the common-mode suppression unit, one end of the resistor R2, one end of the capacitor C2 and one end of the second winding of the common-mode inductor LF1 are connected together as a second input end of the common-mode suppression unit, the other end of the first winding of the common-mode inductor LF1 is a first output end of the common-mode suppression unit, the other end of the second winding of the common-mode inductor LF1 is a second output end of the common-mode suppression unit, and the other end of the resistor R1, the other end of the capacitor C1, the other end of the resistor R2 and the other end of the capacitor C2 are connected to the ground end of the sampling circuit;

[0041] The differential mode suppression unit includes a capacitor C3, an inductor L1 and an inductor L2, one end of the capacitor C3 and one end of the inductor L1 are connected together as a first input end of the differential mode suppression unit, the other end of the capacitor C3 and one end of the inductor L2 are connected together as a second input end of the differential mode suppression unit, the other end of the inductor L1 is a first output end of the differential mode suppression unit, and the other end of the inductor L2 is a second output end of the differential mode suppression unit;

[0042] The operational amplifier unit includes resistors R3, R4, R5, R6 and an operational amplifier U1B, one end of resistor R3 is the first input end of the operational amplifier unit, the other end of resistor R3 and one end of resistor R6 are simultaneously connected to the inverting input end of the operational amplifier U1B, the other end of resistor R6 is connected to the output end of the operational amplifier U1B, one end of resistor R4 is the second input end of the operational amplifier unit, the other end of resistor R4 and one end of resistor R5 are simultaneously connected to the non-inverting input end of the operational amplifier U1B, and the other end of resistor R5 is connected to the ground end of the sampling circuit.

[0043] Figure 2 The operational amplifier unit in the circuit is mainly composed of an operational amplifier, four resistors and a capacitor. The operational amplifier unit has a simple structure. In order to adapt to sampling functions in different occasions, the first differential signal sampled from the first input terminal and the second input terminal of the sampling circuit is processed by the common mode suppression unit and the differential mode suppression unit, and then the clean and high-precision signal is operationally amplified, and finally the highly linear corresponding sampling signal is sent to the controller for circuit control.

[0044] The sampling circuit of this embodiment can be used in voltage sampling, current sampling and other occasions according to the actual application situation. For the specific circuit schematic diagram used in the voltage sampling occasion, see Figure 2 For the specific circuit schematic diagram used in current sampling, see Figure 3 shown.

[0045] To sum up, the sampling circuit proposed in the utility model can be implemented by constructing a filter circuit through inductance, resistance and capacitance, and combined with an operational amplifier, and cooperated with the control chip of the terminal to achieve the required control purpose. It has the characteristics of simple circuit implementation, lower cost and stronger applicability.

[0046] Second embodiment

[0047] This embodiment provides a switching power supply, wherein the switching power supply includes any sampling circuit in the first embodiment. Since the switching power supply in this embodiment includes any sampling circuit in the first embodiment, the cost is lower.

[0048] It should be noted that the switching power supply of this embodiment adopts Figure 2 When sampling the circuit, for different working conditions, the common-mode suppression effect can be adjusted by adjusting the parameters of resistor R1, resistor R2, capacitor C1 and capacitor C2, as well as the common-mode inductance and differential-mode component of the common-mode inductor LF1 (the common-mode inductance and differential-mode component are different if the number of turns of the common-mode inductor coil is different). This can avoid the reduction of the suppression effect caused by the inconsistency of differential-mode and common-mode interference when the applied switching power supply is empty / lightly loaded or fully loaded, and can also avoid the poor suppression effect caused by the difference between the switching frequency of the switching power supply and the suppression bandwidth inside the op amp chip when a high-precision and high common-mode suppression op amp chip is used.

[0049] In addition, the switching power supply of this embodiment adopts Figure 2 The sampling circuit starts from the common-mode suppression unit and ends at the output amplifier. It is a conventional voltage or current sampling unit circuit. However, in order to adapt to the needs of different sampling signals, the resistance values ​​of resistors R3 to R6 can be flexibly adjusted to adjust the linear amplification factor of the sampling signal. Therefore, it has strong versatility and can be applied to small signal sampling circuits such as voltage, current or temperature.

[0050] Furthermore, the components of the common mode suppression unit are symmetrically arranged in the PCB layout.

[0051] The above-mentioned implementation examples of the utility model are merely examples for explaining the utility model, and are not intended to limit the implementation methods of the utility model. For ordinary technicians in the relevant field, other different forms of changes and modifications can be made on the basis of the above description. It is impossible to list all the implementation methods here. Any obvious changes or modifications derived from the technical solution of the utility model are still within the scope of protection of the utility model.

Claims

1. A sampling circuit, characterized in that: include: A common mode suppression unit, wherein the first input end is the first input end of the sampling circuit, and the second input end is the second input end of the sampling circuit. The common mode suppression unit is used to filter out the common mode noise in the first differential signal sampled by the first input end and the second input end, and then output a second differential signal. The circuit structure of the common mode suppression unit is symmetrical. a differential mode suppression unit, wherein a first input end thereof is connected to a first output end of the common mode suppression unit, and a second input end thereof is connected to a second output end of the common mode suppression unit, and the common mode suppression unit is used for filtering out differential mode noise in the second differential signal and then outputting a third differential signal; An operational amplifier unit, wherein a first input end is connected to the first output end of the differential mode suppression unit, a second input end is connected to the second output end of the differential mode suppression unit, and an output end is the output end of the sampling circuit. The operational amplifier unit is used to perform operational amplification processing on the third differential signal and then output it from its output end.

2. The sampling circuit according to claim 1, characterized in that: The common-mode suppression unit includes a resistor R1, a resistor R2, a capacitor C1, a capacitor C2 and a common-mode inductor LF1. One end of the resistor R1, one end of the capacitor C1 and one end of the first winding of the common-mode inductor LF1 are connected together as a first input end of the common-mode suppression unit. One end of the resistor R2, one end of the capacitor C2 and one end of the second winding of the common-mode inductor LF1 are connected together as a second input end of the common-mode suppression unit. The other end of the first winding of the common-mode inductor LF1 is a first output end of the common-mode suppression unit. The other end of the second winding of the common-mode inductor LF1 is a second output end of the common-mode suppression unit. The other end of the resistor R1, the other end of the capacitor C1, the other end of the resistor R2 and the other end of the capacitor C2 are connected to the ground end of the sampling circuit.

3. The sampling circuit according to claim 1, characterized in that: The differential mode suppression unit includes a capacitor C3, an inductor L1 and an inductor L2, one end of the capacitor C3 and one end of the inductor L1 are connected together as a first input end of the differential mode suppression unit, the other end of the capacitor C3 and one end of the inductor L2 are connected together as a second input end of the differential mode suppression unit, the other end of the inductor L1 is a first output end of the differential mode suppression unit, and the other end of the inductor L2 is a second output end of the differential mode suppression unit.

4. The sampling circuit according to claim 1, characterized in that: The operational amplifier unit includes resistors R3, R4, R5, R6 and an operational amplifier U1B, one end of the resistor R3 is the first input end of the operational amplifier unit, the other end of the resistor R3 and one end of the resistor R6 are simultaneously connected to the inverting input end of the operational amplifier U1B, the other end of the resistor R6 is connected to the output end of the operational amplifier U1B, one end of the resistor R4 is the second input end of the operational amplifier unit, the other end of the resistor R4 and one end of the resistor R5 are simultaneously connected to the non-inverting input end of the operational amplifier U1B, and the other end of the resistor R5 is connected to the ground end of the sampling circuit.

5. The sampling circuit according to claim 1, characterized in that: The common-mode suppression unit includes a resistor R1, a resistor R2, a capacitor C1, a capacitor C2 and a common-mode inductor LF1, one end of the resistor R1, one end of the capacitor C1 and one end of the first winding of the common-mode inductor LF1 are connected together as a first input end of the common-mode suppression unit, one end of the resistor R2, one end of the capacitor C2 and one end of the second winding of the common-mode inductor LF1 are connected together as a second input end of the common-mode suppression unit, the other end of the first winding of the common-mode inductor LF1 is a first output end of the common-mode suppression unit, the other end of the second winding of the common-mode inductor LF1 is a second output end of the common-mode suppression unit, and the other end of the resistor R1, the other end of the capacitor C1, the other end of the resistor R2 and the other end of the capacitor C2 are connected to the ground end of the sampling circuit; The differential mode suppression unit includes a capacitor C3, an inductor L1 and an inductor L2, one end of the capacitor C3 and one end of the inductor L1 are connected together as a first input end of the differential mode suppression unit, the other end of the capacitor C3 and one end of the inductor L2 are connected together as a second input end of the differential mode suppression unit, the other end of the inductor L1 is a first output end of the differential mode suppression unit, and the other end of the inductor L2 is a second output end of the differential mode suppression unit; The operational amplifier unit includes resistors R3, R4, R5, R6 and an operational amplifier U1B, one end of the resistor R3 is the first input end of the operational amplifier unit, the other end of the resistor R3 and one end of the resistor R6 are simultaneously connected to the inverting input end of the operational amplifier U1B, the other end of the resistor R6 is connected to the output end of the operational amplifier U1B, one end of the resistor R4 is the second input end of the operational amplifier unit, the other end of the resistor R4 and one end of the resistor R5 are simultaneously connected to the non-inverting input end of the operational amplifier U1B, and the other end of the resistor R5 is connected to the ground end of the sampling circuit.

6. A switching power supply, characterized in that: The switching power supply comprises the sampling circuit according to any one of claims 1 to 5.

7. The switching power supply according to claim 6, characterized in that: The components of the common mode rejection unit described in the PCB layout are arranged symmetrically.