Multi-port intelligent rapid charger

Abstract

The utility model discloses a multi-port intelligent rapid charger which comprises an input rectification filter circuit, a power conversion circuit, an output rectification circuit, a charging protocol matching circuit, a first charging circuit and a second charging circuit. The input end of the input rectification filter circuit is connected with input alternating current, the output end of the input rectification filter circuit is electrically connected with the power conversion circuit, and the output end of the power conversion circuit is electrically connected with the input end of the output rectification circuit. The output end of the output rectifying circuit is electrically connected with the charging protocol matching circuit, the first charging circuit and the second charging circuit. The multi-port intelligent rapid charger disclosed by the utility model effectively improves a low-power single-output charger, satisfies the simultaneous charging of high-power equipment such as a computer and small-sized equipment such as a mobile phone, and greatly increases the charging efficiency.

Description

Technical Field

[0001] The utility model belongs to the technical field of chargers, and in particular relates to a multi-port intelligent fast charger. Background Art

[0002] Currently, most electronic device chargers used in the market are single-port low-power chargers, which can only charge small electronic devices when used for business trips or office work. Laptops and tablets that are carried with you require dedicated larger chargers, which are inconvenient to carry and use.

[0003] Therefore, further improvements are made to the above problems. Utility Model Content

[0004] The main purpose of the utility model is to provide a multi-port intelligent fast charger, which effectively improves the low-power single-output charger and satisfies the simultaneous charging of high-power devices such as computers and small devices such as mobile phones, thereby greatly increasing the charging efficiency.

[0005] To achieve the above purpose, the utility model provides a multi-port intelligent fast charger, including an input rectifier filter circuit, a power conversion circuit, an output rectifier circuit, a charging protocol matching circuit, a first charging circuit (TYPE-C) and a second charging circuit (USB-A), wherein the input end of the input rectifier filter circuit is connected to the input alternating current and the output end of the input rectifier filter circuit is electrically connected to the power conversion circuit; the output end of the power conversion circuit is electrically connected to the input end of the output rectifier circuit, and the output end of the output rectifier circuit is electrically connected to the charging protocol matching circuit, the first charging circuit and the second charging circuit, respectively, wherein:

[0006] The power conversion circuit includes a power control chip IC2, a gallium nitride power tube Q2 and a transformer TR1, wherein the 7th pin of the power control chip IC2 is electrically connected to the gate of the gallium nitride power tube Q2 through a resistor R21, and the two ends of the resistor R21 are connected in series with a diode D5 and a resistor R20, the drain of the gallium nitride power tube Q2 is electrically connected to the second input end (pin 8) of the transformer TR1, and the first output end (pin A) of the transformer TR1 is connected to the output end Vout;

[0007] The output rectification circuit includes a synchronous rectification chip IC1 and a field effect transistor Q1, the 6th pin of the synchronous rectification chip IC1 and the drain (pins 5-8) of the field effect transistor Q1 are electrically connected to the second output terminal (pin B) of the transformer TR1, the 5th pin of the synchronous rectification chip IC1 is electrically connected to the gate of the field effect transistor Q1, the source (pins 1-3) of the field effect transistor Q1 is connected to the output terminal Vout through the capacitor EC1, and the two ends of the capacitor EC1 are connected in parallel with the capacitor EC2;

[0008] The charging protocol matching circuit includes a protocol chip U3, the first charging circuit includes a field effect transistor Q3 and a first connection port P2 (TYPE-C connection port), the 32 pin of the protocol chip U3 is electrically connected to the drain of the field effect transistor Q3 through a resistor R36 and a resistor R35, and the common end of the resistor R36 and the resistor R35 is connected to the output end Vout, and the source of the field effect transistor Q3 is electrically connected to the first connection port P2;

[0009] The second charging circuit includes a power chip U2 and a second connection port (USB-A), the input end (4 pins) of the power chip U2 is connected to the output end Vout, and the output end of the power chip U2 is electrically connected to the second connection port P3.

[0010] As a further preferred technical solution of the above technical solution, the input rectifier filter circuit includes an AC input terminal P1, a common-mode inductor LF1, a rectifier bridge BD1 and a rectifier bridge BD2, the input end of the common-mode inductor LF1 is connected to the AC input terminal P1 and the output end of the common-mode inductor LF1 is electrically connected to the input end of the rectifier bridge BD1 and the input end of the rectifier bridge BD2, respectively, and the output end of the rectifier bridge BD1 and the output end of the rectifier bridge BD2 are electrically connected to the first input end (pin 7) of the transformer TR1.

[0011] As a further preferred technical solution of the above technical solution, one path of pin 10 of the power control chip IC2 is electrically connected to the first end (pin 1) of the AC input terminal P1 through resistor R17, resistor R16 and diode D3 in sequence, and the other path is electrically connected to the second end (pin 2) of the AC input terminal P1 through resistor R17, resistor R16 and diode D4.

[0012] As a further preferred technical solution of the above technical solution, a capacitor C2 and a resistor R5 are connected between the source and the drain of the field effect transistor Q1.

[0013] As a further preferred technical solution of the above technical solution, the drain of the field effect transistor Q3 is also electrically connected to the 30th pin of the protocol chip U3, and the gate of the field effect transistor Q3 is electrically connected to the 29th pin of the protocol chip U3. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 The utility model discloses a circuit diagram of an input rectifying and filtering circuit, a power conversion circuit and an output rectifying circuit of a multi-port intelligent fast charger.

[0015] Figure 2The utility model discloses a circuit diagram of a charging protocol matching circuit and a first charging circuit of a multi-port intelligent fast charger.

[0016] Figure 3 The utility model discloses a circuit diagram of a second charging circuit of a multi-port intelligent fast charger. DETAILED DESCRIPTION

[0017] The following description is used to disclose the utility model so that those skilled in the art can implement the utility model. The preferred embodiments described below are only examples, and those skilled in the art can think of other obvious variations. The basic principles of the utility model defined in the following description can be applied to other embodiments, variations, improvements, equivalents, and other technical solutions that do not deviate from the spirit and scope of the utility model.

[0018] The utility model discloses a multi-port intelligent fast charger. The specific embodiments of the utility model are further described below in conjunction with the preferred embodiments.

[0019] In the embodiments of the present invention, those skilled in the art note that the alternating current and the like involved in the present invention may be regarded as prior art.

[0020] Preferred embodiments.

[0021] like Figure 1-3 As shown, the utility model discloses a multi-port intelligent fast charger, including an input rectifier filter circuit, a power conversion circuit, an output rectifier circuit, a charging protocol matching circuit, a first charging circuit (TYPE-C) and a second charging circuit (USB-A), wherein the input end of the input rectifier filter circuit is connected to the input alternating current and the output end of the input rectifier filter circuit is electrically connected to the power conversion circuit; the output end of the power conversion circuit is electrically connected to the input end of the output rectifier circuit, and the output end of the output rectifier circuit is electrically connected to the charging protocol matching circuit, the first charging circuit and the second charging circuit, respectively, wherein:

[0022] The power conversion circuit includes a power control chip IC2, a gallium nitride power tube Q2 and a transformer TR1, wherein the 7th pin of the power control chip IC2 is electrically connected to the gate of the gallium nitride power tube Q2 through a resistor R21, and the two ends of the resistor R21 are connected in series with a diode D5 and a resistor R20, the drain of the gallium nitride power tube Q2 is electrically connected to the second input end (pin 8) of the transformer TR1, and the first output end (pin A) of the transformer TR1 is connected to the output end Vout;

[0023] The output rectification circuit includes a synchronous rectification chip IC1 and a field effect transistor Q1, the 6th pin of the synchronous rectification chip IC1 and the drain (pins 5-8) of the field effect transistor Q1 are electrically connected to the second output terminal (pin B) of the transformer TR1, the 5th pin of the synchronous rectification chip IC1 is electrically connected to the gate of the field effect transistor Q1, the source (pins 1-3) of the field effect transistor Q1 is connected to the output terminal Vout through the capacitor EC1, and the two ends of the capacitor EC1 are connected in parallel with the capacitor EC2;

[0024] The charging protocol matching circuit includes a protocol chip U3, the first charging circuit includes a field effect transistor Q3 and a first connection port P2 (TYPE-C connection port), the 32 pin of the protocol chip U3 is electrically connected to the drain of the field effect transistor Q3 through a resistor R36 and a resistor R35, and the common end of the resistor R36 and the resistor R35 is connected to the output end Vout, and the source of the field effect transistor Q3 is electrically connected to the first connection port P2;

[0025] The second charging circuit includes a power chip U2 and a second connection port (USB-A), the input end (4 pins) of the power chip U2 is connected to the output end Vout, and the output end of the power chip U2 is electrically connected to the second connection port P3.

[0026] Specifically, the input rectifier filter circuit includes an AC input terminal P1, a common-mode inductor LF1, a rectifier bridge BD1 and a rectifier bridge BD2. The input end of the common-mode inductor LF1 is connected to the AC input terminal P1 and the output end of the common-mode inductor LF1 is electrically connected to the input end of the rectifier bridge BD1 and the input end of the rectifier bridge BD2, respectively. The output end of the rectifier bridge BD1 and the output end of the rectifier bridge BD2 are electrically connected to the first input end (pin 7) of the transformer TR1, respectively.

[0027] More specifically, one path of pin 10 of the power control chip IC2 is electrically connected to the first end (pin 1) of the AC input terminal P1 through resistor R17, resistor R16 and diode D3 in sequence, and the other path is electrically connected to the second end (pin 2) of the AC input terminal P1 through resistor R17, resistor R16 and diode D4.

[0028] Furthermore, a capacitor C2 and a resistor R5 are connected between the source and the drain of the field effect transistor Q1.

[0029] Furthermore, the drain of the field effect transistor Q3 is also electrically connected to the 30th pin of the protocol chip U3 and the gate of the field effect transistor Q3 is electrically connected to the 29th pin of the protocol chip U3.

[0030] Preferably, the following chip models are:

[0031] IC1 SC3503;

[0032] IC2 SC3023C;

[0033] Q1 PW065N12ESL;

[0034] Q2 INN700D140C;

[0035] Q3 NCEP4040Q;

[0036] U2 SC8101;

[0037] U3 SC2021A;

[0038] U4 LMV321TP;

[0039] TR1 ATQ23.7.

[0040] For this utility model:

[0041] Working control principle: The power supply obtains an adjustable output voltage through the power conversion circuit. The main body is controlled by the power control chip IC2 to control the gallium nitride power tube Q2 for switch conversion, and the energy transfer is carried out through the transformer TR1 for safety isolation control. The output part uses the synchronous rectification chip IC1 to control the power tube Q1 for output rectification, and converts the input AC power into the DC voltage required for device charging. Among them, the power conversion circuit uses a new generation of gallium nitride power tubes, which can greatly increase the operating frequency of the power supply, with extremely low internal impedance, which can improve the power supply efficiency and reduce the size of the power supply. In addition, a protocol distribution chip U3 is added to the power output port, which can distribute charging power to different output ports.

[0042] When only the TYPE-C port is charged, the protocol chip allocates a maximum charging power of 65W to the TYPE-C port. It communicates with the device during charging, and controls Q3 to open after confirming the protocol to prevent the output voltage from not matching and burning the device. The protocol supports the output of 5V\9V\12V\15V\20V and 5-21V variable voltages, and outputs a variety of voltages to adapt to a variety of electronic devices, and provides power for charging devices with different needs. When the USB-A port is charged alone, the output charging power is up to 12W, and the output voltage is 5V2.4A, which meets the needs of all small smart electronic devices. When the TYPE-C and USB-A ports are inserted into the device for charging at the same time, in order to ensure the stability of charging heating, the maximum output power of TYPE-C is limited to 60W, and the output charging power of USB-A is 12W. When the system detects that the USB-A port device is fully charged, the protocol chip U3 will intelligently close the USB-A port and increase the charging power of the TYPE-C port to 65W, thereby improving the charging efficiency.

[0043] The beneficial effects of the utility model are:

[0044] 1The power supply is small and easy to carry when traveling

[0045] 2. The power supply adopts a new generation of power device design, with an output power of up to 72W, and a shorter charging time than conventional 18W chargers.

[0046] 3. The power supply adopts a dual-port output design (USB-A port and TYPE-C port). The TYPE-C port meets the charging needs of higher-power and conventional low-power electronic devices, and the USB-A port meets the charging needs of low-power electronic devices. The combination of the two is sufficient to meet the charging needs of multiple types of electronic devices and has strong compatibility.

[0047] 4. When charging two ports at the same time, the power supply can allocate different charging power according to the power status of the charging device to achieve the optimal charging power, greatly improving the charging efficiency.

[0048] It is worth mentioning that the technical features such as alternating current involved in this utility model patent application should be regarded as prior art. The specific structure, working principle and possible control method and spatial layout method of these technical features can be selected by conventional methods in the field and should not be regarded as the invention point of this utility model patent. This utility model patent will not be further elaborated.

[0049] For those skilled in the art, it is still possible to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present utility model should be included in the protection scope of the present utility model.

Claims

1. A multi-port intelligent fast charger, characterized in that: The invention comprises an input rectifying and filtering circuit, a power conversion circuit, an output rectifying circuit, a charging protocol matching circuit, a first charging circuit and a second charging circuit, wherein the input end of the input rectifying and filtering circuit is connected to the input alternating current and the output end of the input rectifying and filtering circuit is electrically connected to the power conversion circuit; the output end of the power conversion circuit is electrically connected to the input end of the output rectifying circuit, and the output end of the output rectifying circuit is electrically connected to the charging protocol matching circuit, the first charging circuit and the second charging circuit respectively, wherein: The power conversion circuit includes a power control chip IC2, a gallium nitride power tube Q2 and a transformer TR1, wherein the 7th pin of the power control chip IC2 is electrically connected to the gate of the gallium nitride power tube Q2 through a resistor R21, and the two ends of the resistor R21 are connected in series with a diode D5 and a resistor R20, the drain of the gallium nitride power tube Q2 is electrically connected to the second input end of the transformer TR1, and the first output end of the transformer TR1 is connected to the output end Vout; The output rectification circuit includes a synchronous rectification chip IC1 and a field effect transistor Q1, wherein the 6th pin of the synchronous rectification chip IC1 and the drain of the field effect transistor Q1 are both electrically connected to the second output terminal of the transformer TR1, the 5th pin of the synchronous rectification chip IC1 is electrically connected to the gate of the field effect transistor Q1, the source of the field effect transistor Q1 is connected to the output terminal Vout via the capacitor EC1, and the two ends of the capacitor EC1 are connected in parallel with the capacitor EC2; The charging protocol matching circuit includes a protocol chip U3, the first charging circuit includes a field effect transistor Q3 and a first connection port P2, the 32 pin of the protocol chip U3 is electrically connected to the drain of the field effect transistor Q3 through a resistor R36 and a resistor R35, and the common end of the resistor R36 and the resistor R35 is connected to the output end Vout, and the source of the field effect transistor Q3 is electrically connected to the first connection port P2; The second charging circuit includes a power chip U2 and a second connection port. The input end of the power chip U2 is connected to the output end Vout, and the output end of the power chip U2 is electrically connected to the second connection port P3.

2. A multi-port intelligent fast charger according to claim 1, characterized in that: The input rectifier and filter circuit includes an AC input terminal P1, a common-mode inductor LF1, a rectifier bridge BD1 and a rectifier bridge BD2. The input end of the common-mode inductor LF1 is connected to the AC input terminal P1 and the output end of the common-mode inductor LF1 is electrically connected to the input end of the rectifier bridge BD1 and the input end of the rectifier bridge BD2, respectively. The output end of the rectifier bridge BD1 and the output end of the rectifier bridge BD2 are electrically connected to the first input end of the transformer TR1, respectively.

3. A multi-port intelligent fast charger according to claim 2, characterized in that: Pin 10 of the power control chip IC2 is electrically connected to the first end of the AC input terminal P1 through resistor R17, resistor R16 and diode D3 in sequence, and is electrically connected to the second end of the AC input terminal P1 through resistor R17, resistor R16 and diode D4 in another way.

4. A multi-port intelligent fast charger according to claim 3, characterized in that: A capacitor C2 and a resistor R5 are connected between the source and drain of the field effect transistor Q1.

5. A multi-port intelligent fast charger according to claim 4, characterized in that: The drain of the field effect transistor Q3 is also electrically connected to the 30th pin of the protocol chip U3, and the gate of the field effect transistor Q3 is electrically connected to the 29th pin of the protocol chip U3.

Images