Testing machine and differential comparator calibration device thereof

By designing a differential comparator calibration device for the internal link in the test machine, and using the differential operator and comparison digital-to-analog converter unit for self-calibration, the problem of reduced calibration accuracy caused by the traditional solution's reliance on external excitation sources is solved, and a higher level of accuracy is achieved. Accurate and efficient calibration process.

CN222381630UActive Publication Date: 2025-01-21CHANGMAI SEMICONDUCTOR (CHENGDU) CO LTD
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Patent Information

Application Number
CN202420420303.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-04
Publication Date
2025-01-21
Estimated Expiration
2034-03-04

AI Technical Summary

Technical Problem

The calibration scheme of the traditional tester differential comparator relies on external excitation sources, resulting in reduced calibration accuracy.

Method used

Design a differential comparator calibration device for the test machine. The differential comparator is calibrated through the internal link of the pin circuit module. The differential operator and comparison digital-to-analog converter unit are used for self-calibration, eliminating the accuracy of the external link. error.

Benefits of technology

The calibration accuracy of the differential comparator is improved, the error introduced by the external excitation source is reduced, and a more efficient calibration process is achieved.

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Abstract

The present application relates to a tester and a differential comparator calibration device thereof, the device comprising: a pin circuit module comprising a differential arithmetic unit, a first channel comprising a first drive digital-to-analog converter, a first comparison digital-to-analog converter unit and a first differential comparator unit, and a second channel comprising a second drive digital-to-analog converter, a second comparison digital-to-analog converter unit and a second differential comparator unit; the second channel includes a second driving digital-to-analog converter, a second comparison digital-to-analog converter unit, and a second differential comparator unit. The first driving digital-to-analog converter outputs a first driving signal to the differential arithmetic unit, and the second driving digital-to-analog converter outputs a second driving signal to the differential arithmetic unit. The differential mode output end of the differential arithmetic unit outputs a differential mode signal to the first differential comparator unit, and the common mode output end of the differential arithmetic unit outputs a common mode signal to the second differential comparator unit. And the calibration module is used for calibrating the first differential comparator unit / the second differential comparator unit according to the comparison result level output by the first differential comparator unit / the second differential comparator unit.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor testing technology, and in particular to a testing machine and a differential comparator calibration device thereof. Background Art

[0002] In the process of semiconductor automated testing of chip electrical performance, the channel input and output accuracy of the tester is crucial. Channel output refers to the output of the excitation signal to the chip under test, and the input channel refers to the signal that the test equipment receives from the chip under test and outputs to the tester channel, and compares it with the set value to determine whether the chip under test meets the product design. Among them, the differential comparator used to judge the channel input signal in the pin circuit module of the calibration tester is the most important link to ensure the channel input accuracy of the tester.

[0003] The traditional calibration scheme of the differential comparator of the test machine mainly uses an external excitation source to calibrate the differential comparator, which introduces the error of the external excitation source and reduces the calibration accuracy of the differential comparator. Utility Model Content

[0004] Based on this, it is necessary to provide a test machine and a differential comparator calibration device thereof that can improve the calibration accuracy in order to solve the above problems.

[0005] A differential comparator calibration device for a test machine, comprising:

[0006] A pin circuit module, comprising a differential operator, a first channel and a second channel, wherein the first channel comprises a first driving digital-to-analog converter, a first comparing digital-to-analog converter unit and a first differential comparator unit, and the second channel comprises a second driving digital-to-analog converter, a second comparing digital-to-analog converter unit and a second differential comparator unit;

[0007] Wherein, the first driving digital-to-analog converter is connected to the first input end of the differential operator and outputs a first driving signal to the differential operator; the second driving digital-to-analog converter is connected to the second input end of the differential operator and outputs a second driving signal to the differential operator; the differential mode output end of the differential operator is connected to the first differential comparator unit and outputs a differential mode signal to the first differential comparator unit; the common mode output end of the differential operator is connected to the second differential comparator unit and outputs a common mode signal to the second differential comparator unit; the first comparison digital-to-analog converter unit is connected to the first differential comparator unit and outputs a comparison signal to the first differential comparator unit according to a set coding value; the second comparison digital-to-analog converter unit is connected to the second differential comparator unit and outputs a comparison signal to the second differential comparator unit according to a set coding value;

[0008] A calibration module is connected to the first differential comparator unit and the second differential comparator unit; the calibration module receives the comparison result level output by the first differential comparator unit and calibrates the first differential comparator unit; the calibration module receives the comparison result level output by the second differential comparator unit and calibrates the second differential comparator unit.

[0009] In one embodiment, the number of the first channels and the number of the second channels are both more than two.

[0010] In one embodiment, the first differential comparator unit includes a differential comparator CVA1 and a differential comparator CVB1, the first input end of the differential comparator CVA1 is connected to the differential output end of the differential operator, and the second input end of the differential comparator CVA1 is connected to the first comparison digital-to-analog converter unit; the first input end of the differential comparator CVB1 is connected to the differential output end of the differential operator, and the second input end of the differential comparator CVB1 is connected to the first comparison digital-to-analog converter unit.

[0011] In one embodiment, the first comparison digital-to-analog converter unit includes a comparison digital-to-analog converter A1 and a comparison digital-to-analog converter B1, the comparison digital-to-analog converter A1 is connected to the second input terminal of the differential comparator CVA1 and the calibration module, and the comparison digital-to-analog converter B1 is connected to the second input terminal of the differential comparator CVB1 and the calibration module.

[0012] In one embodiment, the first input terminal of the differential comparator CVA1 and the differential comparator CVB1 is a non-inverting input terminal / an inverting input terminal, and the second input terminal is an inverting input terminal / a non-inverting input terminal.

[0013] In one embodiment, the second differential comparator unit includes a differential comparator CVA2 and a differential comparator CVB2, wherein the first input terminal of the differential comparator CVA2 is connected to the common mode output terminal of the differential operator, and the second input terminal of the differential comparator CVA2 is connected to the second comparison digital-to-analog converter unit; the first input terminal of the differential comparator CVB2 is connected to the common mode output terminal of the differential operator, and the second input terminal of the differential comparator CVB2 is connected to the second comparison digital-to-analog converter unit.

[0014] In one embodiment, the second comparison digital-to-analog converter unit includes a comparison digital-to-analog converter A2 and a comparison digital-to-analog converter B2, the comparison digital-to-analog converter A2 is connected to the second input terminal of the differential comparator CVA2 and the calibration module, and the comparison digital-to-analog converter B2 is connected to the second input terminal of the differential comparator CVB2 and the calibration module.

[0015] In one embodiment, the first input terminal of the differential comparator CVA2 and the differential comparator CVB2 is a non-inverting input terminal / an inverting input terminal, and the second input terminal is an inverting input terminal / a non-inverting input terminal.

[0016] In one embodiment, the calibration module is an FPGA that adjusts the drive signals output by the first drive digital-to-analog converter and the second drive digital-to-analog converter, and / or the calibration module is an FPGA that adjusts the coding values ​​of the first comparison digital-to-analog converter unit and the second comparison digital-to-analog converter unit; the calibration module is connected to the first drive digital-to-analog converter, the second drive digital-to-analog converter, the first comparison digital-to-analog converter unit and the second comparison digital-to-analog converter unit.

[0017] A testing machine comprises the above-mentioned differential comparator calibration device.

[0018] The above-mentioned test machine and its differential comparator calibration device, the pin circuit module includes a differential operator, a first channel and a second channel, the first channel includes a first drive digital-to-analog converter, a first comparison digital-to-analog converter unit and a first differential comparator unit, and the second channel includes a second drive digital-to-analog converter, a second comparison digital-to-analog converter unit and a second differential comparator unit. The first drive digital-to-analog converter outputs a first drive signal to the differential operator, and the second drive digital-to-analog converter outputs a second drive signal to the differential operator. The differential mode output end of the differential operator outputs a differential mode signal to the first differential comparator unit, and the common mode output end of the differential operator outputs a common mode signal to the second differential comparator unit. The first comparison digital-to-analog converter unit outputs a comparison signal to the first differential comparator unit according to the set coding value, and the second comparison digital-to-analog converter unit outputs a comparison signal to the second differential comparator unit according to the set coding value. The calibration module calibrates the first differential comparator unit / the second differential comparator unit according to the comparison result level output by the first differential comparator unit / the second differential comparator unit. The differential comparator is calibrated by using the internal link of the pin circuit module, without relying on external equipment to construct a differential excitation source, eliminating the accuracy error that may be introduced by the external link and improving the calibration accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a structural block diagram of a differential comparator calibration device of a test machine in one embodiment;

[0020] Figure 2 The figure is a schematic diagram of the structure of a differential comparator calibration device of a test machine in one embodiment. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0023] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0024] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" etc. specify the presence of stated features, wholes, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, operations, components, parts or combinations thereof.

[0025] The current test machine differential comparator calibration method is implemented by parallel calibration based on an external excitation source. Any circuit and measuring equipment will have a certain impact on the measurement results, especially when using an external excitation source. First, it is necessary to construct an accurate differential excitation signal, and it is also necessary to use complex wiring to realize parallel multi-channel calibration. The construction of differential excitation signals and link connections will introduce additional calibration errors. Based on this, the present application provides a differential comparator calibration device for a test machine, wherein the pin circuit module includes a differential operator, a first channel and a second channel, the first channel includes a first drive digital-to-analog converter, a first comparison digital-to-analog converter unit and a first differential comparator unit, and the second channel includes a second drive digital-to-analog converter, a second comparison digital-to-analog converter unit and a second differential comparator unit. The first drive digital-to-analog converter outputs a first drive signal to the differential operator, and the second drive digital-to-analog converter outputs a second drive signal to the differential operator. The differential mode output terminal of the differential operator outputs a differential mode signal to the first differential comparator unit, and the common mode output terminal of the differential operator outputs a common mode signal to the second differential comparator unit. The first comparison digital-to-analog converter unit outputs a comparison signal to the first differential comparator unit according to the set coding value, and the second comparison digital-to-analog converter unit outputs a comparison signal to the second differential comparator unit according to the set coding value. The calibration module calibrates the first differential comparator unit / the second differential comparator unit according to the comparison result level output by the first differential comparator unit / the second differential comparator unit. By using the internal link of the pin circuit module to calibrate the differential comparator, it does not rely on external devices to construct a differential excitation source, and eliminates the accuracy error that may be introduced by the external link. It is known to those skilled in the art that the setting of the above-mentioned coding value can be set by the calibration module, or by the host computer, and of course it is not limited to this, as long as the corresponding coding values ​​of the first comparison digital-to-analog converter unit and the second comparison digital-to-analog converter unit can be set.

[0026] In one embodiment, Figure 1As shown, a differential comparator calibration device of a test machine is provided, including a pin circuit module 100 and a calibration module 200. The pin circuit module 100 includes a differential operator 110, a first channel and a second channel, the first channel includes a first driving digital-to-analog converter 120, a first comparing digital-to-analog converter unit 130 and a first differential comparator unit 140, and the second channel includes a second driving digital-to-analog converter 150, a second comparing digital-to-analog converter unit 160 and a second differential comparator unit 170. Among them, the first driving digital-to-analog converter 120 is connected to the first input end of the differential operator 110, and outputs a first driving signal to the differential operator 110. The second driving digital-to-analog converter 150 is connected to the second input end of the differential operator 110, and outputs a second driving signal to the differential operator 110. The differential output end DIFF of the differential operator 110 is connected to the first differential comparator unit 140, and outputs a differential signal to the first differential comparator unit 140. The common mode output end CM of the differential operator 110 is connected to the second differential comparator unit 170, and outputs a common mode signal to the second differential comparator unit 170. The first comparison digital-to-analog converter unit 130 is connected to the first differential comparator unit 140, and outputs a comparison signal to the first differential comparator unit 140 according to a set coding value. The second comparison digital-to-analog converter unit 160 is connected to the second differential comparator unit 170, and outputs a comparison signal to the second differential comparator unit 170 according to a set coding value. In addition, the pin circuit module 100 may further include output terminals DOUT0 and DOUT1 for connecting to the chip under test, the first driving digital-to-analog converter 120 is connected to the output terminal DOUT0, and the second driving digital-to-analog converter 150 is connected to the output terminal DOUT1.

[0027] The calibration module 200 is connected to the first differential comparator unit 140 and the second differential comparator unit 170. The calibration module 200 receives the comparison result level output by the first differential comparator unit 140 and calibrates the first differential comparator unit 140. The calibration module 200 receives the comparison result level output by the second differential comparator unit 170 and calibrates the second differential comparator unit 170. The type of the calibration module 200 is not unique, and it can be a device such as FPGA (Field-Programmable Gate Array), MCU (Micro Control Unit), CPU (Central Processing Unit), etc. In one embodiment, the calibration module 200 is an FPGA that adjusts the drive signals output by the first drive digital-to-analog converter 120 and the second drive digital-to-analog converter 150, and / or the calibration module 200 is an FPGA that adjusts the coding values ​​of the first comparison digital-to-analog converter unit 130 and the second comparison digital-to-analog converter unit 160; the calibration module 200 is connected to the first drive digital-to-analog converter 120, the second drive digital-to-analog converter 150, the first comparison digital-to-analog converter unit 130 and the second comparison digital-to-analog converter unit 160.

[0028] Specifically, the number of the first channel and the second channel can be one, or both can be more than two, each first channel and a corresponding second channel constitute a differential pair channel, and each pair of channels is configured with a differential operator 110. After receiving the driving signals output by the first driving digital-to-analog converter 120 and the second driving digital-to-analog converter 150, the differential operator 110 subtracts the two driving signals to obtain a differential signal, and outputs it to the first differential comparator unit 140, adds and averages the two driving signals to obtain a common-mode signal, and outputs it to the second differential comparator unit 170. When calibrating the differential comparator units in the first channel and the second channel, the comparison signal output by the comparison digital-to-analog converter unit may be kept unchanged, and the driving signal output by the driving digital-to-analog converter may be adjusted, thereby changing the amplitudes of the differential-mode signal and the common-mode signal output by the differential operator 110, and the calibration module 200 may perform calibration according to the comparison result level output by the differential comparator unit; or the driving signal output by the driving digital-to-analog converter may be kept unchanged, and the comparison signal output by the comparison digital-to-analog converter unit may be adjusted, and the calibration module 200 may perform calibration according to the comparison result level output by the differential comparator unit.

[0029] The first differential comparator unit 140 and the second differential comparator unit 170 may include one or more differential comparators. Figure 2As shown, the first differential comparator unit 140 includes a differential comparator CVA1 and a differential comparator CVB1, the first input end of the differential comparator CVA1 is connected to the differential mode output end DIFF of the differential operator 110, and the second input end of the differential comparator CVA1 is connected to the first comparison digital-to-analog converter unit 130; the first input end of the differential comparator CVB1 is connected to the differential mode output end DIFF of the differential operator 110, and the second input end of the differential comparator CVB1 is connected to the first comparison digital-to-analog converter unit 130. Among them, the first input end of the differential comparator CVA1 and the differential comparator CVB1 is the same phase input end / the opposite phase input end, and the second input end is the opposite phase input end / the same phase input end. In this embodiment, the first input end of the differential comparator CVA1 and the differential comparator CVB1 is the same phase input end, and the second input end is the opposite phase input end. It can be understood that the first input terminal of the differential comparator CVA1 and the first input terminal of the differential comparator CVB1 can be connected to each other and then connected to the differential output terminal DIFF of the differential operator 110, or can be connected to the differential output terminal DIFF of the differential operator 110 respectively.

[0030] Further, the first comparison digital-to-analog converter unit 130 includes a comparison digital-to-analog converter A1 and a comparison digital-to-analog converter B1, the comparison digital-to-analog converter A1 is connected to the second input end of the differential comparator CVA1 and the calibration module 200, and the comparison digital-to-analog converter B1 is connected to the second input end of the differential comparator CVB1 and the calibration module 200. The coding values ​​of the comparison digital-to-analog converter A1 and the comparison digital-to-analog converter B1 are set by the calibration module 200, and the comparison digital-to-analog converter A1 and the comparison digital-to-analog converter B1 are controlled to output comparison signals. It can be understood that in other embodiments, the first comparison digital-to-analog converter unit 130 can also share a comparison digital-to-analog converter, and output comparison signals to calibrate the differential comparator CVA1 and the differential comparator CVB1 respectively.

[0031] In one embodiment, continue to refer to Figure 2, the second differential comparator unit 170 includes a differential comparator CVA2 and a differential comparator CVB2, the first input end of the differential comparator CVA2 is connected to the common mode output end CM of the differential operator 110, and the second input end of the differential comparator CVA2 is connected to the second comparison digital-to-analog converter unit 160; the first input end of the differential comparator CVB2 is connected to the common mode output end CM of the differential operator 110, and the second input end of the differential comparator CVB2 is connected to the second comparison digital-to-analog converter unit 160. Among them, the first input end of the differential comparator CVA2 and the differential comparator CVB2 is the same phase input end / the opposite phase input end, and the second input end is the opposite phase input end / the same phase input end. In this embodiment, the first input end of the differential comparator CVA2 and the differential comparator CVB2 is the same phase input end, and the second input end is the opposite phase input end. It can be understood that the first input terminal of the differential comparator CVA2 and the first input terminal of the differential comparator CVB2 can be connected to each other and then connected to the common mode output terminal CM of the differential operator 110, or can be connected to the common mode output terminal CM of the differential operator 110 respectively.

[0032] Further, the second comparison digital-to-analog converter unit 160 includes a comparison digital-to-analog converter A2 and a comparison digital-to-analog converter B2, the comparison digital-to-analog converter A2 is connected to the second input end of the differential comparator CVA2 and the calibration module 200, and the comparison digital-to-analog converter B2 is connected to the second input end of the differential comparator CVB2 and the calibration module 200. The coding values ​​of the comparison digital-to-analog converter A2 and the comparison digital-to-analog converter B2 are set by the calibration module 200, and the comparison digital-to-analog converter A2 and the comparison digital-to-analog converter B2 are controlled to output comparison signals. It can be understood that in other embodiments, the second comparison digital-to-analog converter unit 160 can also share a comparison digital-to-analog converter, and output comparison signals to calibrate the differential comparator CVA2 and the differential comparator CVB2 respectively.

[0033] For ease of understanding, the differential comparator calibration is explained by adjusting the drive signal output by the drive digital-to-analog converter as an example. The first drive signal output by the first drive digital-to-analog converter 120 and the second drive signal output by the second drive digital-to-analog converter 150 constitute a differential excitation signal. The two drive signals change linearly within the set range, and the amplitude of the second drive signal increases as the amplitude of the first drive signal decreases. By dynamically adjusting the output value of the drive digital-to-analog converter, the differential excitation signal output is always within the optimal accuracy range, effectively reducing the calibration error from the excitation source.

[0034] like Figure 2As shown, taking the calibration of the differential comparator CVA1 of the first channel as an example, firstly, the first driving digital-to-analog converter 120 of the first channel is turned on to output the first driving signal to the output terminal DOUT0, and the second driving digital-to-analog converter 150 of the second channel outputs the second driving signal to the output terminal DOUT1. At this time, the differential operator 110 automatically operates the two input signals, and then outputs the differential signal to the differential comparator CVA1 and the differential comparator CVB1 of the first channel, and outputs the common signal to the differential comparator CVA2 and the differential comparator CVB2 of the second channel. The comparison digital-to-analog converter A1 is set to a coding value Code, and the comparison digital-to-analog converter A1 also outputs a comparison signal to the differential comparator CVA1. At this time, the calibration module 200 can obtain the comparison result level of the differential comparator CVA1. If the amplitude of the differential signal is higher than the amplitude of the comparison signal, the comparison result of the differential comparator CVA1 is 1, otherwise it is 0. The output of the two-channel driving digital-to-analog converter is repeatedly adjusted to change the amplitude of the differential signal until the comparison result obtained by the calibration module 200 repeatedly jumps between 0 and 1. When the level jump ratio meets the preset ratio requirement, it is determined that the amplitude of the comparison signal at this time is equal to the amplitude of the differential signal, and it is considered that the accurate output value of the comparison digital-to-analog converter A1 at the current coding value code is obtained. The calibration module 200 binds the amplitude of the differential signal at this time with the current coding value code and stores it accordingly. The calibration module 200 changes the coding value code of the comparison digital-to-analog converter A1, and analyzes and determines again the amplitude of the differential signal corresponding to the output level jump ratio of the differential comparator CVA1 under different coding values ​​code. The calibration module 200 establishes a data curve representing the corresponding relationship between the coding value and the signal amplitude according to the amplitude of the differential signal corresponding to the different coding values ​​code, and completes the calibration of the differential comparator CVA1. It can be understood that the preset ratio requirement is not unique and can be set according to actual needs. The preset ratio requirement may be that level 0 and level 1 each account for 50%, or that the ratio of level 0 to level 1 is between 10% and 90%, which is considered to meet the preset ratio requirement.

[0035] The calibration of the differential comparator CVB1 in the first channel is similar, and will not be described in detail here. The difference between the differential comparator CVA2 and the differential comparator CVB2 in the second channel is that they receive the common mode signal output by the differential operator 110, and the rest of the calibration process is the same.

[0036] In one embodiment, a testing machine is further provided, comprising the above-mentioned differential comparator calibration device.

[0037] The above-mentioned test machine and its differential comparator calibration device use the internal link of the pin circuit module 100 to calibrate the differential comparator, do not rely on external equipment to construct a differential excitation source, can support multi-channel full parallel calibration, and use the calibration module 200 to obtain the comparison results of all channels at one time. The present application can calibrate the entire internal circuit including the channel differential comparator and the differential operator together, automatically exit the calibration state after the calibration operation is completed, and automatically switch to the application function state without any additional operation. The differential comparator calibration device has the following advantages:

[0038] 1. Short calibration time and high efficiency. The output of the differential comparator cannot be measured by equipment and can only be judged by successive approximation of the excitation source. Therefore, the parallel calibration of all channels adopted in this solution is of great significance to the improvement of calibration efficiency.

[0039] 2. High calibration accuracy. No external link is used, which eliminates the accuracy error that may be introduced by the external link and ensures the optimal accuracy range of the excitation source.

[0040] 3. No additional hardware overhead is required. Only the channel output itself is used as the excitation source. Adding channels will not increase any measurement cost.

[0041] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0042] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the utility model patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A differential comparator calibration device for a test machine, characterized in that: include: A pin circuit module, comprising a differential operator, a first channel and a second channel, wherein the first channel comprises a first driving digital-to-analog converter, a first comparing digital-to-analog converter unit and a first differential comparator unit, and the second channel comprises a second driving digital-to-analog converter, a second comparing digital-to-analog converter unit and a second differential comparator unit; Wherein, the first driving digital-to-analog converter is connected to the first input end of the differential operator and outputs a first driving signal to the differential operator; the second driving digital-to-analog converter is connected to the second input end of the differential operator and outputs a second driving signal to the differential operator; the differential mode output end of the differential operator is connected to the first differential comparator unit and outputs a differential mode signal to the first differential comparator unit; the common mode output end of the differential operator is connected to the second differential comparator unit and outputs a common mode signal to the second differential comparator unit; the first comparison digital-to-analog converter unit is connected to the first differential comparator unit and outputs a comparison signal to the first differential comparator unit according to a set coding value; the second comparison digital-to-analog converter unit is connected to the second differential comparator unit and outputs a comparison signal to the second differential comparator unit according to a set coding value; A calibration module is connected to the first differential comparator unit and the second differential comparator unit; the calibration module receives the comparison result level output by the first differential comparator unit and calibrates the first differential comparator unit; the calibration module receives the comparison result level output by the second differential comparator unit and calibrates the second differential comparator unit.

2. The device according to claim 1, characterized in that The number of the first channels and the number of the second channels are both more than two.

3. The device according to claim 1, characterized in that The first differential comparator unit includes a differential comparator CVA1 and a differential comparator CVB1, wherein the first input end of the differential comparator CVA1 is connected to the differential output end of the differential operator, and the second input end of the differential comparator CVA1 is connected to the first comparison digital-to-analog converter unit; the first input end of the differential comparator CVB1 is connected to the differential output end of the differential operator, and the second input end of the differential comparator CVB1 is connected to the first comparison digital-to-analog converter unit.

4. The device according to claim 3, characterized in that The first comparison DAC unit includes a comparison DAC A1 and a comparison DAC B1, wherein the comparison DAC A1 is connected to the second input terminal of the differential comparator CVA1 and the calibration module, and the comparison DAC B1 is connected to the second input terminal of the differential comparator CVB1 and the calibration module.

5. The device according to claim 3, characterized in that The first input terminals of the differential comparator CVA1 and the differential comparator CVB1 are non-inverting input terminals / inverting input terminals, and the second input terminals are inverting input terminals / non-inverting input terminals.

6. The device according to claim 1, characterized in that The second differential comparator unit includes a differential comparator CVA2 and a differential comparator CVB2, wherein the first input end of the differential comparator CVA2 is connected to the common mode output end of the differential operator, and the second input end of the differential comparator CVA2 is connected to the second comparison digital-to-analog converter unit; the first input end of the differential comparator CVB2 is connected to the common mode output end of the differential operator, and the second input end of the differential comparator CVB2 is connected to the second comparison digital-to-analog converter unit.

7. The device according to claim 6, characterized in that The second comparison digital-to-analog converter unit includes a comparison digital-to-analog converter A2 and a comparison digital-to-analog converter B2, the comparison digital-to-analog converter A2 is connected to the second input end of the differential comparator CVA2 and the calibration module, and the comparison digital-to-analog converter B2 is connected to the second input end of the differential comparator CVB2 and the calibration module.

8. The device according to claim 6, characterized in that The first input terminals of the differential comparator CVA2 and the differential comparator CVB2 are non-inverting input terminals / inverting input terminals, and the second input terminals are inverting input terminals / non-inverting input terminals.

9. The device according to any one of claims 1 to 8, characterized in that: The calibration module is an FPGA for adjusting the driving signals output by the first driving digital-to-analog converter and the second driving digital-to-analog converter, and / or the calibration module is an FPGA for adjusting the coding values ​​of the first comparing digital-to-analog converter unit and the second comparing digital-to-analog converter unit; The calibration module is connected to the first driving digital-to-analog converter, the second driving digital-to-analog converter, the first comparing digital-to-analog converter unit, and the second comparing digital-to-analog converter unit.

10. A testing machine, characterized in that: The differential comparator calibration device comprises the differential comparator calibration device according to any one of claims 1 to 9.