Packaging structure for improving heat dissipation performance of flip square flat no-lead packaging product
By introducing heat sinks with thermal conductivity and convex chamfered design in flip-filled square flat pinless packaging products, combining high thermal conductivity and plastic sealing resin, the problems of insufficient heat dissipation and reliability in the prior art are solved, and the further development is achieved. Efficient heat dissipation and reliability.
Patent Information
- Application Number
- CN202420002729.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-02
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2034-01-02
AI Technical Summary
The prior art has limitations in improving the heat dissipation of flip-fit square flat pinless packaging products, including the risk of exposed Die design, insufficient reliability of high thermal conductivity on large chips, and low thermal conductivity of traditional plastic sealing resins.
The thermal conductivity layer is adopted, including a highly thermally conductive grain adhesive film or graphite heat conduction sheet, to fill the cavity between the heat dissipation cover and the chip, and to improve the heat dissipation performance and reliability through a combination of a convex chamfered heat sink and a plastic sealing resin.
It effectively improves the heat dissipation performance of the chip surface, simplifies the process, does not require new equipment, the materials are mature and reliable, and the reliability of the product is improved through plastic-sealed resin and convex chamfer design.
Smart Images

Figure CN222440586U_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a packaging structure for improving the heat dissipation of a flip-chip square flat leadless packaging product. Background Art
[0002] With the increasing proportion of high-power and high-heat chips such as RF, high-process, silicon carbide, and gallium nitride, the requirements for heat dissipation of packaging products are also getting higher and higher. There are usually two ways to improve the heat dissipation of semiconductor packaging products. The first is to expose the heat-generating chip or add a heat dissipation structure from the design, such as exposed die design, FCBGA mounted heat sink, etc.; the second is to use high thermal conductivity packaging materials, such as high thermal conductivity sintered silver grain adhesive, high thermal conductivity plastic sealing resin, etc.
[0003] The above two methods have great limitations in the square flat leadless package. The exposed die design will expose the chip, which may scratch or break the chip. The high thermal conductivity sintered silver grain adhesive can only be used in the square flat leadless package of small chips, and the product reliability of large chips cannot be met. The high thermal conductivity plastic encapsulation resin can only achieve mass production of 5W / mK.
[0004] In view of the above shortcomings, the patent CN210040171U grooves the surface of the packaged product, exposes the chip, and uses solder on the chip surface to connect the heat sink to improve the heat dissipation of the chip. This design requires the chip surface to be metal-plated, which has special requirements for the chip. In addition, the heat sink connected by solder in this design is easy to turn into liquid again during the reflow process, causing the heat sink to tilt or shift in position. Therefore, it cannot be reflowed multiple times, otherwise the heat sink will be tilted or shaken. The patent CN211654811U adds a semiconductor cooling plate to the surface of a square flat pinless package product to form a packaged device. This design ignores the fact that the traditional plastic resin has a thermal conductivity of only 1W / mK, which affects the heat dissipation efficiency of the chip. The patent CN216528879U is to bond a heat sink to the surface of the package. During the environmental testing stage of reliability, this design has a great risk of reliability failure in large products due to the large difference in thermal expansion coefficients of different materials. Summary of the invention
[0005] Purpose of the invention: The purpose of the present invention is to address the deficiencies in the prior art and provide a packaging structure for improving the heat dissipation of flip-chip square flat leadless package products, which can not only improve the heat dissipation performance of the chip surface, but also has a relatively simple process and does not require new equipment. The materials used are mature, stable and reliable, and the heat sink with a convex chamfer design on the upper surface can also ensure product reliability to a certain extent.
[0006] Technical solution: The packaging structure for improving the heat dissipation of flip-chip square flat leadless package products described in the present invention includes a lead frame, a chip, a heat dissipation cover and a plastic encapsulation material. The chip is welded on the lead frame in a flip-chip manner, and the plastic encapsulation material is used to encapsulate the chip and the lead frame. The plastic encapsulation material is provided with an opening at the position of the chip for exposing the chip; a heat dissipation cover is provided at the exposed position of the chip, and a heat conductive layer is provided between the heat dissipation cover and the chip. The heat conductive layer fully fills the space between the heat dissipation cover and the chip to avoid the existence of a cavity, which leads to an increase in thermal resistance. In addition, the heat conductive layer is sticky, and the heat dissipation cover can be operated using a grain pasting device, which is easy to operate.
[0007] Furthermore, the material of the heat-conducting layer is a high-thermal-conductivity die-bonding film.
[0008] Furthermore, the high thermal conductivity die-bonding film has a thermal conductivity of 16 W / mK.
[0009] Furthermore, the material of the heat conducting layer is a graphite heat conducting sheet.
[0010] Furthermore, the graphite heat conductive sheet has a thermal conductivity of 25-45 W / mK.
[0011] Furthermore, the upper surface of the heat dissipation cover is provided with a convex chamfer, so that the heat dissipation cover can be more wrapped by the plastic encapsulation resin, thereby improving reliability.
[0012] Furthermore, the heat dissipation cover is made of copper or stainless steel.
[0013] Beneficial effects: Compared with the prior art, the advantages of the present invention are:
[0014] (1) The present invention provides a heat-conducting layer between the heat-dissipating cover and the chip. The heat-conducting layer is a high-thermal-conductivity grain adhesive film with a thermal conductivity of 16 W / mK or a graphite heat-conducting sheet with a thermal conductivity of 25-45 W / mK, which can improve the heat dissipation performance of the chip surface;
[0015] (2) The present invention adds a heat-conducting layer to the existing flip-chip quad flat leadless package product, and the process is relatively simple and does not require the use of new equipment;
[0016] (3) The heat sink of the present invention is surrounded by a plastic encapsulation resin through an injection molding process, and the upper surface is designed with a convex chamfer, so that more of the heat sink is wrapped in the plastic encapsulation resin, which is conducive to improving reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 It is a structural schematic diagram of the present invention. DETAILED DESCRIPTION
[0018] The technical solution of the present invention is described in detail below with reference to the accompanying drawings, but the protection scope of the present invention is not limited to the embodiments.
[0019] like Figure 1 A packaging structure for improving the heat dissipation of a flip-chip square flat leadless package product is shown, comprising a lead frame 1, a chip 2, a heat dissipation cover 3 and a plastic packaging material 5. The chip is welded on the lead frame 1 in a flip-chip manner, and the plastic packaging material 5 is used to plastic-seal the chip 2 and the lead frame 1. The plastic packaging material 5 is provided with an opening at the position of the chip for exposing the chip; a heat dissipation cover 3 is provided at the exposed position of the chip 2, and a convex chamfer is provided on the upper surface of the heat dissipation cover 3; a heat conductive layer 4 is provided between the heat dissipation cover 3 and the chip 2.
[0020] In this embodiment, the lead frame is a copper frame selected from C194, C7025, and EFTEC64T; the chip is a logic chip, a silicon carbide chip, a gallium nitride chip, or a high-frequency chip; the material of the thermal conductive layer 4 is a high thermal conductivity grain adhesive film with a thermal conductivity coefficient of 16W / mK, the material of the thermal conductive layer 4 is a graphite thermal conductive sheet with a thermal conductivity coefficient of 25-45W / mK, and the material of the heat dissipation cover 3 is copper.
[0021] The preparation method of this embodiment is as follows:
[0022] Step 1: grinding and thinning the flip chip wafer and dicing it into single flip chips;
[0023] Step 2: Flip the chip and install the chip on the corresponding position of the copper lead frame;
[0024] Step 3: Reflow soldering, soldering the chip to ensure that the chip is fixed on the surface of the lead frame;
[0025] Step 4, bonding the heat sink to the high thermal conductivity grain adhesive film or graphite thermal conductive sheet;
[0026] Step 5: Cut the high thermal conductivity die paste film or graphite thermal conductive sheet according to the chip size to ensure that it is consistent with the size of the heat sink;
[0027] Step 6, remove the heat sink bonded with the high thermal conductivity die adhesive film or graphite thermal conductive sheet, and fix it on the chip surface;
[0028] Step 7: Use the die packaging process to encapsulate the product as a whole using a plastic encapsulation resin;
[0029] Step 8: electroplating;
[0030] Step 9: Marking;
[0031] Step 10: Cutting;
[0032] Step 11: Test.
[0033] Step 12: Final inspection;
[0034] Step 13: Packaging.
[0035] As described above, although the present invention has been shown and described with reference to specific preferred embodiments, it should not be construed as limiting the present invention itself. Various changes in form and details may be made without departing from the spirit and scope of the present invention as defined in the appended claims.
Claims
1. A packaging structure for improving the heat dissipation of a flip-chip quad flat leadless package product, comprising a lead frame (1), a chip (2), a heat dissipation cover (3) and a plastic packaging material (5), characterized in that: The chip is welded on the lead frame (1) in a flip-chip manner, the plastic encapsulation material (5) encapsulates the chip (2) and the lead frame (1), and the plastic encapsulation material (5) is provided with an opening at the position of the chip to expose the chip; a heat dissipation cover (3) is provided at the exposed position of the chip (2), and a heat conducting layer (4) is provided between the heat dissipation cover (3) and the chip (2).
2. A packaging structure for improving heat dissipation of a flip-chip quad flat no-lead package product according to claim 1, characterized in that: The material of the heat-conducting layer (4) is a high-thermal-conductivity crystal grain adhesive film.
3. A packaging structure for improving heat dissipation of a flip-chip quad flat no-lead package product according to claim 2, characterized in that: The high thermal conductivity crystal grain paste film is a high thermal conductivity crystal grain paste film with a thermal conductivity of 16 W / mK.
4. The packaging structure for improving heat dissipation of flip-chip quad flat no-lead package products according to claim 1, characterized in that: The material of the heat conducting layer (4) is a graphite heat conducting sheet.
5. A packaging structure for improving heat dissipation of a flip-chip quad flat no-lead package product according to claim 4, characterized in that: The graphite heat conductive sheet has a thermal conductivity of 25-45 W / mK.
6. The packaging structure for improving heat dissipation of flip-chip quad flat no-lead package products according to claim 1, characterized in that: The upper surface of the heat dissipation cover (3) is provided with a convex chamfer.
7. A packaging structure for improving heat dissipation of a flip chip quad flat no-lead package product according to claim 6, characterized in that: The heat dissipation cover (3) is made of copper or stainless steel.
Citation Information
Patent Citations
Flip chip packaging structure and electronic equipment
CN216528879U