Display panel

Abstract

The utility model provides a display panel, which belongs to the technical field of the prior art, and comprises a substrate which comprises a first preset area and a second preset area which is not overlapped with the first preset area; the pixel driving unit is formed in the first preset area; the light sensing unit is formed in the second preset area, and the light sensing unit and the anode of the pixel driving unit are located on the same layer; and the light resistance spacer has a light gathering effect, is formed in the second preset area and is positioned above the light sensing unit. The display panel has the advantages that the light resistance spacer is arranged above the light sensing unit, fingerprint reflected light is focused on the light sensing unit through the light condensation effect of the light resistance spacer, and therefore the fingerprint identification performance is remarkably improved.

Description

Technical Field

[0001] The utility model relates to the field of display technology, and in particular to a display panel. Background Art

[0002] With the rapid development of technology and consumers' pursuit of security and convenience in mobile devices, optical screen fingerprint recognition technology has become one of the important functions of modern mobile devices such as smartphones. At present, there are three main placement technologies for optical screen fingerprint recognition devices: under-display, in-display, and add-on or on-display.

[0003] Under-display technology is currently the most important and widely used technology. This technology uses a CMOS / TFT sensor to be placed directly under the Organic Light-Emitting Diode (OLED) screen by laminating, and uses the gaps between sub-pixels in the OLED screen to allow external light to penetrate the screen to reach the sensor, thereby identifying the fingerprint. This technology has been widely used because it can maintain the integrity and appearance of the screen while providing high fingerprint recognition accuracy and speed.

[0004] In-display technology shrinks the fingerprint sensor to a small enough size and directly inserts it between the pixels of the OLED screen. Add-on or On-display technology makes the CMOS / TFT sensor transparent and directly mounts it on the active-matrix organic light emitting diode (AMOLED) screen, making optical fingerprint recognition an independent recognition layer. At present, In-display technology and Add-on or On-display technology are still in the research and development stage due to their extremely high technical difficulty.

[0005] AMOLED has become the technology of choice for high-end display products due to its high color saturation, high contrast, fast response and low power consumption. AMOLED screens consist of an array of electronic devices containing very small organic light-emitting diodes. These organic light-emitting diodes are essentially thin films that emit light by adding electricity. The working principle of AMOLED screens involves two main electronic components: the active matrix and the organic light-emitting diodes. The active matrix is ​​the circuit that controls the pixel points, which can provide power to each pixel on the screen. Each pixel has an independent electronic switch that controls whether the light-emitting diode emits light. When black is to be displayed, the switch is closed, causing the light-emitting diode to stop emitting light; when color needs to be displayed, the switch is opened, and current flows through the light-emitting diode, causing it to emit light.

[0006] The array structure of AMOLED is the core to achieve its high-performance display function. Figure 1 As shown in the figure, in the traditional AMOLED array structure, the photoresist spacer plays a key role. Its main function is to serve as a fulcrum to support the evaporation mask or the encapsulation cover plate in the subsequent evaporation of OLED materials or bonding of the encapsulation cover plate, and maintain the uniformity of the gap (Gap) of the AMOLED array structure; at the same time, the photo spacer also provides impact resistance protection to ensure that the AMOLED device is not affected by external impact during the manufacturing and use process.

[0007] In addition, the traditional AMOLED array structure is usually designed to achieve fingerprint recognition through additional optical components and algorithms, and the integration of light sensing units is not considered under the Photo Spacer. Although this method can maintain the integrity and appearance of the screen, it may have certain limitations in fingerprint recognition accuracy and speed due to the lack of tight integration with the screen structure. Utility Model Content

[0008] In order to solve the above technical problems, the utility model provides a display panel.

[0009] The technical problem solved by the present invention can be achieved by adopting the following technical solutions:

[0010] A display panel, comprising:

[0011] a substrate, the substrate comprising a first predetermined area and a second predetermined area non-overlapping with the first predetermined area;

[0012] A pixel driving unit, formed in the first preset area;

[0013] A photosensitive unit is formed in the second preset area, and the photosensitive unit and the anode of the pixel driving unit are located in the same layer;

[0014] A photoresist spacer with a light-gathering function is formed in the second preset area, and the photoresist spacer is located above the photosensitive unit.

[0015] Preferably, the photoresist spacer adopts a microlens structure.

[0016] Preferably, the taper angle of the photoresist spacer is greater than 45°.

[0017] Preferably, the photoresist spacer is hemispherical or hemispherical.

[0018] Preferably, the photoresist spacer comprises one, and one photoresist spacer is located above the photosensitive unit; or

[0019] The photoresist spacers include more than two, and the more than two photoresist spacers are located above the photosensitive unit.

[0020] Preferably, the photosensitive unit is located in the pixel definition layer.

[0021] Preferably, the photosensitive unit includes a first electrode, a PIN photosensitive layer and a second electrode arranged in sequence from bottom to top; the PIN photosensitive layer includes a P-type layer, an intrinsic layer and an N-type layer, the N-type layer is arranged close to the first electrode, and the P-type layer is arranged close to the second electrode.

[0022] Preferably, the photoresist spacer is located on the upper surface of the pixel definition layer.

[0023] Preferably, the pixel driving unit comprises a low-temperature polysilicon thin film transistor.

[0024] Preferably, the substrate further comprises a third preset area which is non-overlapping with the first preset area and the second preset area;

[0025] The third preset area includes a capacitor unit, and the capacitor unit is respectively connected to the pixel driving unit and the light sensing unit.

[0026] The advantages or beneficial effects of the technical solution of the utility model are:

[0027] The display panel of the utility model arranges a light-blocking spacer above the light-sensing unit, and the fingerprint reflected light is focused to the light-sensing unit by utilizing the focusing effect of the light-blocking spacer, thereby significantly improving the performance of fingerprint recognition. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A cross-sectional structural diagram of a conventional AMOLED array in the prior art;

[0029] Figure 2This is a cross-sectional structural diagram of a display panel in a preferred embodiment of the present utility model;

[0030] Figure 3 A top view of a single photoresist spacer in a preferred embodiment of the present invention;

[0031] Figure 4 It is a top view of a plurality of photoresist spacers in a preferred embodiment of the present utility model;

[0032] Figure 5-20 It is a cross-sectional structural diagram of each preparation step of the display panel in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0034] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0035] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0036] like Figure 1 The cross-sectional structure diagram of a conventional AMOLED array is shown. The conventional AMOLED array includes a substrate 100, a buffer layer 200, a gate insulating layer 300, a first interlayer insulating layer 400, a second interlayer insulating layer 500, a planarizing layer 600, and a first pixel definition layer 700 arranged in sequence from bottom to top.

[0037] The substrate 100 may be made of a substrate as a base material, and the substrate may be made of a soft material such as rigid glass or flexible polyimide (PI).

[0038] The conventional AMOLED array further includes a low temperature polysilicon thin film transistor (LTPS TFT). The LTPS TFT includes an LTPS active layer, an LTPS gate 15 , an LTPS source 14 , an LTPS drain 16 and an OLED anode 17 . The LTPS active layer is formed in the gate insulating layer 300 and is located on the upper surface of the buffer layer 200. The LTPS active layer includes a source region 11, a channel region 12 and a drain region 13 of the LTPS TFT; the LTPS gate 15 is formed in the first interlayer insulating layer 400 and is located on the upper surface of the gate insulating layer 300; the LTPS source 14 and the drain 16 are formed in the planarization layer 600, are located on the upper surface of the second interlayer insulating layer 500, and sequentially penetrate the second interlayer insulating layer 500, the first interlayer insulating layer 400 to respectively contact the corresponding source region 11 and the drain region 13 of the LTPS TFT in the LTPS active layer; the OLED anode 17 is formed on the upper surface of the planarization layer 600, and extends downward to the planarization layer 600 to contact the LTPS source 14; a window is etched in the first pixel definition layer 700 to expose part of the OLED anode 17 as a sub-pixel opening area.

[0039] The conventional AMOLED array further includes a capacitor device, which includes a first electrode plate 21 and a second electrode plate 22 . The first electrode plate 21 is formed in the first interlayer insulating layer 400 , and the second electrode plate 22 is formed in the second interlayer insulating layer 500 .

[0040] The first electrode plate 21 and the LTPS gate 15 can be manufactured in the same process to simplify the manufacturing process.

[0041] The traditional AMOLED array also includes a photo spacer. The photo spacer is usually used for support. When the OLED material is subsequently evaporated or the package cover is bonded, it serves as a fulcrum to support the evaporated photomask or the package cover, maintaining the uniformity of the gap and achieving impact resistance protection.

[0042] However, in traditional AMOLED arrays, the integration of light-sensing units is not considered below the Photo Spacer, which may have certain limitations in terms of fingerprint recognition accuracy and speed.

[0043] See also Figure 2 In a preferred embodiment of the present invention, based on the above problems existing in the prior art, a display panel is provided, comprising:

[0044] The substrate 100 includes a first preset area and a second preset area that does not overlap with the first preset area;

[0045] The pixel driving unit 10 is formed in a first preset area;

[0046] The photosensitive unit 40 is formed in the second preset area, and the photosensitive unit 40 and the anode of the pixel driving unit 10 are located in the same layer;

[0047] A photo spacer 30 having a light-gathering function is formed in the second predetermined area, and the photo spacer 30 is located above the photosensitive unit 40 .

[0048] Specifically, the pixel driving unit 10 is a core component of the display panel, and is used to control the light emitting brightness and color of each sub-pixel to realize image display.

[0049] The light sensing unit 40 is used to receive and process external light source signals, especially fingerprint reflected light.

[0050] In this embodiment, the anode of the photosensitive unit 40 and the anode of the pixel driving unit 10 are located in the same layer to simplify the manufacturing process and ensure that the electrical connection between the photosensitive unit 40 and the pixel driving unit 10 is stable and reliable.

[0051] In this embodiment, a photo spacer is formed above the photosensitive unit 40. The photo spacer can play a supporting role to prevent direct contact or damage between the pixel layer of the display panel and the mask. At the same time, a focusing structure design is adopted to help focus the light source and increase the photosensitive efficiency.

[0052] The display panel of the present invention arranges the light sensing unit 40 below the light blocking spacer 30 and utilizes the light focusing structure design of the light blocking spacer 30 to improve the support performance of the display panel and enhance the fingerprint recognition performance at the same time.

[0053] As a preferred embodiment, the photoresist spacer 30 adopts a micro lens structure.

[0054] Specifically, the photo spacer acts as a support and adopts a micro lens morphology, so that the photospacer has a light-gathering effect. Since the photo spacer is located above the photosensitive unit 40, it can help focus the light source and effectively focus the fingerprint reflected light onto the photosensitive unit 40, thereby increasing the light sensing efficiency and improving the fingerprint recognition performance.

[0055] Specifically, when the user's fingerprint touches the surface of the display panel, the concave-convex structure of the fingerprint will reflect specific light. These lights are focused by the microlens structure of the photoblocking spacer 30 and then received and processed by the photosensitive unit 40 below. Due to the focusing effect of the photoblocking spacer 30, the photosensitive unit 40 can receive stronger and more concentrated fingerprint reflected light, thereby improving the accuracy and efficiency of fingerprint recognition.

[0056] As a preferred embodiment, the taper angle of the photoresist spacer 30 is greater than 45°.

[0057] Specifically, considering that in a conventional AMOLED array structure, the top of the photoresist spacer 30 is usually relatively flat, and its taper angle is relatively small (less than 30°), these relatively small taper angles are not conducive to focusing light onto the photosensitive unit.

[0058] In this embodiment, the taper angle of the photoresist spacer 30 is set to be greater than 45°, and the top of the photoresist spacer 30 is steeper, so that the fingerprint reflected light can be better focused and guided to the photosensitive unit 40 below, so as to improve the focusing efficiency of the photoresist spacer 30 and further improve the fingerprint recognition performance.

[0059] Further, the taper angle is no greater than 90°. By way of example and not limitation, the taper angle may be 45°, 50°, 55°, 60°, 65°, 70°, 75°, 80°, 85°, or 90°.

[0060] As a preferred embodiment, the photoresist spacer 30 is in a hemispherical or semi-ellipsoidal shape.

[0061] Specifically, the shape of the photoresist spacer 30 is designed to be hemispherical or hemispherical, which not only improves the light-gathering efficiency of the photoresist spacer, further enhances its light-gathering effect, but also enhances its supporting performance. The hemispherical or hemispherical photoresist spacer can better focus the fingerprint reflected light onto the photosensitive unit 40, thereby significantly improving the accuracy and efficiency of fingerprint recognition.

[0062] As a preferred embodiment, wherein Figure 3 As shown, the photoresist spacer 30 includes one photoresist spacer 30 , and one photoresist spacer 30 is located above the photosensitive unit 40 .

[0063] Specifically, the photoresist spacer 30 can be set as one, and the photoresist spacer 30 covers the top of the photosensitive unit 40 to ensure that the fingerprint reflected light can directly pass through the focusing effect of the photoresist spacer 30 and focus on the photosensitive unit 40 to improve the accuracy and efficiency of fingerprint recognition.

[0064] As a preferred embodiment, wherein Figure 4 As shown, the photoresist spacer 30 includes more than two photoresist spacers 30 , and the more than two photoresist spacers 30 are located above the photosensitive unit 40 .

[0065] Specifically, considering that in some application scenarios, a single photoresist spacer 30 may not meet higher light focusing requirements, the present embodiment includes more than two photoresist spacers 30 , which are collectively located directly above the photosensitive unit 40 .

[0066] More than two photoresist spacers 30 form a light focusing array, which is located directly above a photosensitive unit 40 .

[0067] Furthermore, by increasing the number of the photoresist spacers 30 , a denser light focusing array is achieved, thereby further improving the focusing effect of the light reflected from the fingerprint.

[0068] It should be noted that the number of the photoresist spacers 30 can be flexibly set according to actual application scenarios, and the present invention does not limit this.

[0069] Furthermore, the light sensing unit 40 is located in the same layer as the OLED anode 17. The OLED anode 17 is the anode of the sub-pixel.

[0070] As a preferred embodiment, the light sensing unit 40 is located in the pixel definition layer.

[0071] Specifically, the photosensitive unit 40 and the OLED anode 17 are both located in the pixel definition layer.

[0072] It should be noted that Figure 2 and Fig. 20 Although the boundaries of the pixel definition layer are not directly shown in the figure, for the sake of clarity, the embodiment of the utility model distinguishes between the first pixel definition layer 700 and the second pixel definition layer 800, indicating that they are arranged at different positions. In fact, they can be collectively referred to as pixel definition layers. The first pixel definition layer 700 and the second pixel definition layer 800 are defined by the second electrode 45. The second pixel definition layer 800 is located above the first pixel definition layer 700. Specifically, the pixel definition layer below the second electrode 45 is defined as the first pixel definition layer 700, and the pixel definition layer above the second electrode 45 is called the second pixel definition layer 800.

[0073] As a preferred embodiment, the photosensitive unit 40 includes a first electrode 41, a PIN photosensitive layer and a second electrode 45 arranged in sequence from bottom to top; the PIN photosensitive layer includes a P-type layer 42, an intrinsic layer 43 and an N-type layer 44, the N-type layer 42 is arranged close to the first electrode 41, and the P-type layer 44 is arranged close to the second electrode 45.

[0074] Furthermore, the first electrode 41 is an anode, and the second electrode 45 is a cathode.

[0075] Furthermore, the PIN photosensitive layer is located above the anode.

[0076] As a preferred embodiment, the photoresist spacer 30 is located on the upper surface of the pixel definition layer.

[0077] As a preferred embodiment, the pixel driving unit 10 includes a low temperature polysilicon thin film transistor. The structure of the low temperature polysilicon thin film transistor can be similar to that of Figure 1 The LTPS TFT structure of the conventional AMOLED array shown is the same and will not be described in detail here.

[0078] Furthermore, the pixel driving unit 10 may also adopt a metal oxide semiconductor, such as Indium Gallium Zinc Oxide (IGZO).

[0079] As a preferred embodiment, the substrate 100 further includes a third preset area that is non-overlapping with the first preset area and the second preset area;

[0080] The third preset area includes a capacitor unit 20 , and the capacitor unit 20 is connected to the pixel driving unit 10 and the light sensing unit 30 respectively.

[0081] Furthermore, the capacitor unit includes a capacitor device, which may include one or more capacitor devices.

[0082] Each capacitor device includes a first electrode plate 21 formed in the first interlayer insulating layer 400 and a second electrode plate 22 formed in the second interlayer insulating layer 500 .

[0083] like Figure 5-20 The cross-sectional structure diagram of each manufacturing step of the display panel is shown. The manufacturing method of the display panel of the utility model comprises the following steps:

[0084] Step 1. Forming a buffer layer 200 and a poly-Si layer

[0085] First, if Figure 5 As shown, a buffer layer 200 is formed on a substrate 100; then, an amorphous silicon layer is deposited on the buffer layer 200 and a dehydrogenation process is performed, and then, the amorphous silicon 201 is dissolved, cooled, solidified and crystallized to form a Poly-Si layer 201; then, the Poly-Si layer 201 is patterned.

[0086] Preferably, the substrate 100 may use a substrate as a base material, and the substrate is preferably a soft material such as rigid glass or flexible polyimide (PI).

[0087] Preferably, the buffer layer 200 may adopt a single-layer or multi-layer stacked structure such as SiOx or SiNx to effectively block the diffusion effect of metal ions caused by subsequent high-temperature processes.

[0088] Preferably, the dehydrogenation process can avoid hydrogen explosion caused by mixing between elements at high temperature in subsequent processes.

[0089] Preferably, XeCl laser (308 nm wavelength) is used to dissolve, cool, solidify and crystallize amorphous silicon.

[0090] Step 2. Forming the source region 11 and the drain region 13 of the LTPS-TFT

[0091] like Figures 6 to 8 As shown, the source region 11, the channel region 12 and the drain region 13 of the LTPS-TFT are formed through the steps of light boron ion doping, photolithography, heavy boron ion doping and photoresist removal.

[0092] like Figure 6 As shown, the Poly-Si layer 201 is subjected to a light ion doping process, the doped ions are boron ions, and the doping concentration is 10 KeV 5E11 to 10 KeV 2E12;

[0093] like Figure 7 As shown, a photoresist 202 is photolithographically formed on the Poly-Si layer 201 by a photolithography process; the photoresist 202 is preferably located in the middle of the Poly-Si layer 201;

[0094] like Figure 8 As shown, with the photoresist 202 as a shield, the lightly doped Poly-Si layer 201 is heavily doped with ions, the doped ions are boron ions, and the doping concentration is 30KeV1E15~40KeV 1E15, forming the source region 11, the channel region 12 and the drain region 13 of the LTPS-TFT;

[0095] like Fig. 9 As shown, the photoresist 202 is removed. The region of the Poly-Si layer 201 shielded by the photoresist 202 is the channel region 12 , and the boron ion doping concentration of the channel region 12 is lower than that of the source region 11 and the drain region 13 .

[0096] Step 3. Forming the LTPS-TFT gate insulating layer 300 and the first metal layer

[0097] like Fig.10 As shown, a gate insulating layer 300 is formed by a plasma enhanced chemical vapor deposition (PECVD) method; then, a first metal layer is deposited on the gate insulating layer 300 by a chemical vapor deposition (PVD) method; the metal layer is patterned to serve as the LTPS gate 15 of the LTPS TFT and the first electrode 21 of the capacitor device; as shown Fig.11As shown, the driving TFT is double-doped using the LTPS gate 15 as a mask to generate an LDD structure 203 (lightly doped structure) to reduce leakage current, thereby improving the electrical performance of the TFT.

[0098] Preferably, the gate insulating layer 300 may adopt a SiOx single layer or a SiOx / SiNx stacking structure;

[0099] Preferably, the deposited metal is molybdenum (Mo).

[0100] Preferably, the LDD structure 203 is located between the source region 11 and the channel region 12 , and between the channel region 12 and the drain region 13 of the LTPS-TFT.

[0101] Step 4. Forming the first interlayer insulating layer 400 and the second metal layer of the LTPS-TFT

[0102] like Fig.12 As shown, an insulating layer is deposited on the gate insulating layer 300 as the first interlayer insulating layer 400 of the LTPS TFT; then, a second metal layer (such as Mo) is deposited on the first interlayer insulating layer 400 by PVD; and the second metal layer is patterned as the second electrode 22 of the capacitor device.

[0103] Preferably, the first interlayer insulating layer 400 may adopt a SiOx, SiNx single layer or SiNx / SiOx multi-layer stacking structure.

[0104] Step 5. Forming contact holes

[0105] like Fig.13 As shown, a second interlayer insulating layer 500 is deposited on the first interlayer insulating layer 400 ; then, a source contact hole 141 and a drain contact hole 161 are formed by photolithography and etching techniques.

[0106] Preferably, the second interlayer insulating layer 500 may be a SiOx / SiNx single layer or a SiNx / SiOx multi-layer stacked structure.

[0107] The LTPS gate 15 drives the MOS signal to be transmitted to the signal wiring through the contact hole, so that the signal wiring is electrically connected to the LTPS source 14 and the LTPS drain 16 of the TFT through the contact hole.

[0108] Step 6. Forming LTPS source 14 and LTPS drain 16

[0109] like Fig.14 As shown, a third metal layer is deposited and patterned in the source contact hole 141 and the drain contact hole 161 , respectively, to form the LTPS source 14 and the LTPS drain 16 .

[0110] The third metal layer can be a Ti / Al / Ti structure. Al has a low resistivity and is suitable for large screen and high definition display. A layer of high melting point metal Ti film can also be deposited on the surface of the Al film (with uneven hillocks) to limit the appearance of Hillock.

[0111] Step 7. Forming anode contact holes

[0112] like Fig.15 As shown, a planarization layer 600 is formed on the upper surfaces of the second interlayer insulating layer 500 and the third metal layer; subsequently, an anode contact hole 171 is formed in the planarization layer 600 by etching.

[0113] Preferably, the planarization layer 600 is an organic layer, which planarizes the anode (ITO), thereby making the OLED flat, and protects the completed circuit to avoid the generation of parasitic capacitance.

[0114] Preferably, the anode contact hole 171 is used to connect the data line and the OLED anode 17 .

[0115] Step 8: Patterning the LTPS anode 17 and the first electrode 41 of the photosensitive unit 40

[0116] like Fig.16 As shown, an OLED anode 17 is formed by coating on the planarization layer 600 and patterning the OLED anode 17 ; meanwhile, a bottom electrode of the photosensitive unit 40 is formed as the first electrode 41 .

[0117] Preferably, the OLED anode 17 is an ITO / Ag / ITO structure from bottom to top; bottom ITO can prevent the diffusion of Ag due to the contact of the planarization layer 600, resulting in abnormal resistance. Ag / top ITO: Ag is used as the OLED reflective layer, and the top ITO is used as the OLED anode 17.

[0118] Step 9. Patterning the photosensitive layer

[0119] like Fig.17 As shown, a P-type layer 42 is formed on the first electrode 41, an intrinsic layer 43 is formed on the P-type layer 42, and an N-type layer 44 is formed on the intrinsic layer 43 as a PIN photosensitive layer; and the PIN photosensitive layer is patterned

[0120] Step 10. Forming contact holes

[0121] like Fig.18 As shown, a first pixel definition layer 700 is formed above the planarization layer 600 , the PIN photosensitive layer and the OLED anode 17 , and a contact hole 451 corresponding to the second electrode 45 of the photosensitive unit 40 is formed on the first pixel definition layer 700 .

[0122] Step 11. Forming the top electrode of the photosensitive unit

[0123] like Fig.19 As shown, a transparent electrode such as ITO is coated on the first pixel definition layer 700 as the top electrode of the photosensitive unit, and the top electrode is patterned to form a second electrode 45.

[0124] Step 12: Forming sub-pixel opening area 172

[0125] like Fig. 20 As shown, an organic photoresist layer (ie, the second pixel definition layer 800 ) is coated on the first pixel definition layer 700 and the second electrode 45 , and defines a sub-pixel opening region 172 together with the first pixel definition layer 700 .

[0126] Step 13: Forming photo spacers

[0127] A photo spacer is formed above the second pixel definition layer 800 corresponding to the photosensitive unit 40, and the following is prepared: Figure 2 The display panel shown.

[0128] Preferably, the photo spacer can serve as a fulcrum for supporting the vapor deposition mask or the packaging cover plate during the subsequent vapor deposition of the OLED material or the bonding of the packaging cover plate, thereby maintaining the uniformity of the gap and achieving impact resistance protection.

[0129] Furthermore, the photo spacer adopts a micro lens morphology, so that it has a light-gathering effect, and can better focus the fingerprint reflected light onto the photosensitive unit 40 below, thereby improving the performance of fingerprint recognition.

[0130] The advantages or beneficial effects of adopting the above technical solution are: by arranging a photoblocking spacer above the photosensitive unit, the display panel of the utility model can focus the fingerprint reflected light onto the photosensitive unit by utilizing the focusing effect of the photoblocking spacer, thereby significantly improving the performance of fingerprint recognition.

[0131] The above are only preferred embodiments of the present invention, and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the contents of this specification and illustrations should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: include: a substrate, the substrate comprising a first predetermined area and a second predetermined area non-overlapping with the first predetermined area; A pixel driving unit, formed in the first preset area; A photosensitive unit is formed in the second preset area, and the photosensitive unit and the anode of the pixel driving unit are located in the same layer; A photoresist spacer with a light-gathering function is formed in the second preset area, and the photoresist spacer is located above the photosensitive unit.

2. The display panel according to claim 1, characterized in that: The photoresist spacer adopts a microlens structure.

3. The display panel according to claim 2, characterized in that: The taper angle of the photoresist spacer is greater than 45°.

4. The display panel according to claim 2, characterized in that: The photoresist spacer is in a hemispherical or semi-ellipsoidal shape.

5. The display panel according to claim 1, characterized in that: The photoresist spacer comprises one, and one photoresist spacer is located above the photosensitive unit; or The photoresist spacers include more than two, and the more than two photoresist spacers are located above the photosensitive unit.

6. The display panel according to claim 1, characterized in that: The photosensitive unit is located in the pixel definition layer.

7. The display panel according to claim 1, characterized in that: The photosensitive unit includes a first electrode, a PIN photosensitive layer and a second electrode arranged in sequence from bottom to top; the PIN photosensitive layer includes a P-type layer, an intrinsic layer and an N-type layer, the N-type layer is arranged close to the first electrode, and the P-type layer is arranged close to the second electrode.

8. The display panel according to claim 1, characterized in that: The photoresist spacer is located on the upper surface of the pixel definition layer.

9. The display panel according to claim 1, characterized in that: The pixel driving unit includes a low-temperature polysilicon thin film transistor.

10. The display panel according to claim 1, characterized in that: The substrate further includes a third preset area that is non-overlapping with the first preset area and the second preset area; The third preset area includes a capacitor unit, and the capacitor unit is respectively connected to the pixel driving unit and the light sensing unit.

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