Computing server

Abstract

The utility model discloses a computing server, which relates to the technical field of servers and comprises a case, a radiating module, a power module and a plurality of rows of FPGA (field programmable gate array) array card groups. In the prior art, the mode that multiple rows of FPGA array cards are laid at the bottom of a mounting groove is adopted, only high temperature of the FPGA array card on the front side can be efficiently taken away, it can be seen that the heat dissipation effect of the FPGA array card on the rear side is not ideal according to heat dissipation analog simulation, only two rows of FPGA array card sets are arranged, the FPGA array cards on the front side and the FPGA array cards on the rear side are obliquely erected at the groove bottom of the mounting groove, and the heat dissipation effect of the FPGA array cards on the rear side is not ideal. The low-temperature high-speed heat dissipation airflow flowing through the bottom is guided to the surface of the rear-side FPGA array card, especially the middle-rear section of the rear-side FPGA array card while the heat dissipation effect of the front-side FPGA array card is ensured, the overall heat dissipation effect is far beyond the expectation, and long-term reliable operation of a server can be ensured.

Description

Technical Field

[0001] The present application relates to the technical field of servers, and in particular to a computing server. Background Art

[0002] The brain-like computing prototype verification machine is a dedicated hardware acceleration platform for brain-like ultra-large-scale simulation computing. It adopts a 2D-Mesh interconnection structure to build 64 FPGA reconfigurable chips into a multi-chip parallel computing network, which can support multi-channel parallel hardware circuit design simulation and software algorithm model simulation, and support RTL-level chip circuit design, loading and flashing programming, and loading and running tests. The brain-like computing prototype verification machine adopts a self-developed microcode architecture for brain-like computing, which can perform dedicated optimization at the hardware circuit and architecture levels according to different neuromorphic models. Compared with software implementation, it can improve computing efficiency optimization by 10-50 times. Compared with traditional supercomputing platforms based on CPU, GPU and other components, it has the advantages of high flexibility, high processing energy efficiency, high interconnection bandwidth and ultra-low communication latency.

[0003] With the above advantages, the development speed of FPGA-based computing servers is gradually accelerating. Considering the efficient heat dissipation of multiple FPGA array cards contained therein, many computing platforms on the market adopt non-standard structural style design, which thickens the entire chassis and ultimately makes it impossible to put it into a standard cabinet. The solution to the heat dissipation problem determines whether it can be quickly adapted to existing standard cabinets and how quickly it can be put into use. Utility Model Content

[0004] The purpose of the utility model is to provide a computing server. A unique assembly structure of the present application is designed according to a simulated heat dissipation model of an FPGA array card group, which can ensure that multiple rows of FPGA array card groups maintain efficient heat dissipation for a long time and have extremely high operating stability.

[0005] To achieve the above purpose, the utility model provides a computing server, which includes a chassis, a heat dissipation module, a power supply module and a plurality of rows of FPGA array card groups;

[0006] The chassis includes a mounting slot, a panel, a back plate and a cover plate; the panel and the back plate are respectively mounted at two ends of the mounting slot, ventilation grilles are respectively provided on both side walls of the front end of the mounting slot, and the cover plate is covered on the notch of the mounting slot;

[0007] The heat dissipation module includes a cross frame, which is installed in the installation slot and divides the installation slot into a front-end electric control cavity and a rear-end FPGA cavity. The cross frame is provided with a plurality of fan installation slots, and a heat dissipation fan is installed in each of the fan installation slots;

[0008] The power module is installed in the electric control cavity;

[0009] The FPGA array card group is installed in the FPGA cavity.

[0010] Furthermore, the present application provides a computing server, which includes a front side FPGA array card group and a rear side FPGA array card group, wherein the front side FPGA array card group is composed of a plurality of front side FPGA array cards, and the two front corners of each of the front side FPGA array cards are respectively mounted on the bottom of the mounting slot through a column a, and the two rear corners are respectively mounted on the bottom of the mounting slot through a column b; the rear side FPGA array card group is composed of a plurality of rear side FPGA array cards, and the two front corners of each of the rear side FPGA array cards are respectively mounted on the bottom of the mounting slot through a column c, and the two rear corners are respectively mounted on the bottom of the mounting slot through a column d, wherein the height of the column b is greater than or equal to the height of the column a, and the height of the column c is less than the height of the column a; the front side FPGA array card is respectively mounted on the bottom of the mounting slot through the columns a and Column b is installed at the bottom of the installation slot, and the high-speed cooling airflow flows through the front and back of the front FPGA array card. The temperature of the airflow flowing through the front gradually increases with the increase of the travel distance. This airflow weakens the cooling effect of the front of the rear FPGA array card. It can be seen from the simulated heat dissipation model that only the front end of the front FPGA array card has obvious heat dissipation, and the heat dissipation effect is extremely poor on the rear side. However, the temperature of the high-speed cooling airflow flowing through the back does not increase significantly. If the high-speed cooling airflow flowing through the back is used to cool the rear FPGA array card, then the effect is bound to be similar to the cooling effect of the front FPGA array card. For this reason, the height of column c is designed to be smaller than the height of column a in this application, so that the high-speed cooling airflow passing through the back of the front FPGA array card will be guided to the front of the rear FPGA array card, thereby quickly taking away the high temperature thereon, and the heat dissipation effect exceeds expectations.

[0011] Furthermore, the present application provides a computing server, wherein the height of the column d is greater than the height of the column b; in addition to the high-speed cooling airflow on the back side blowing to the front of the rear FPGA array card, an additional heat dissipation airflow is added to the rear FPGA array card here, and the double heat dissipation airflow can efficiently take away the high temperature on the rear FPGA surface.

[0012] Furthermore, the present application provides a computing server, wherein the height of the column b is greater than the height of the column a, and the front FPGA array card is tilted toward the middle and rear section of the rear FPGA array card; the reason for this design is to better guide the heat dissipation airflow flowing through the front FPGA array card to the surface of the rear FPGA array card.

[0013] Furthermore, the present application provides a computing server, wherein handles are provided on both sides of the panel.

[0014] Compared with the prior art, the present application has the following advantages: in the prior art, the method of laying multiple rows of FPGA array cards at the bottom of the installation slot can only efficiently remove the high temperature of the front FPGA array card. According to the heat dissipation simulation, it can be seen that the heat dissipation effect of the rear FPGA array card is not ideal. The present application only sets up two rows of FPGA array card groups, and the front FPGA array card and the rear FPGA array card are both tilted and mounted on the bottom of the installation slot, ensuring the heat dissipation effect of the front FPGA array card while guiding the low-temperature and high-speed heat dissipation airflow flowing through the bottom to the surface of the rear FPGA array card, especially the middle and rear sections of the rear FPGA array card. The overall heat dissipation effect is far better than expected, which can ensure the long-term reliable operation of the server. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a schematic diagram of the structure of a computing server of the utility model;

[0016] Figure 2 This is a schematic diagram of the internal structure of a computing server of the utility model without a cover plate;

[0017] Figure 3 for Figure 2 Structural explosion diagram;

[0018] Figure 4 This is a schematic diagram of the installation of the front FPGA array card and the rear FPGA array card in a computing server of the utility model;

[0019] Figure 5 Schematic diagram of heat dissipation simulation.

[0020] Among them: 1. Power module; 2. Installation slot; 3. Panel; 4. Back panel; 5. Cover; 6. Handle; 7. Ventilation grille; 8. Cross frame; 9. Electric control chamber; 10. FPGA chamber; 11. Fan installation slot; 12. Cooling fan; 13. Front FPGA array card; 14. Column a; 15. Column b; 16. Rear FPGA array card; 17. Column c; 18. Column d. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0022] In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the equipment or components referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0023] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0024] like Figures 1 to 5 As shown, this embodiment provides a computing server, which includes a chassis, a heat dissipation module, a power module 1 and several rows of FPGA array card groups;

[0025] The chassis includes a mounting slot 2, a panel 3, a back plate 4 and a cover plate 5; the panel 3 and the back plate 4 are respectively mounted at both ends of the mounting slot 2, handles 6 are provided on both sides of the panel 3, ventilation grilles 7 are respectively provided on both side walls of the front end of the mounting slot 2, and the cover plate 5 is covered on the notch of the mounting slot 2;

[0026] The heat dissipation module includes a cross frame 8, which is installed in the installation slot 2 and divides the installation slot 2 into a front-end electric control cavity 9 and a rear-end FPGA cavity 10. The cross frame 8 has a plurality of fan installation slots 11, and a heat dissipation fan 12 is installed in each of the fan installation slots 11;

[0027] The power module 1 is installed in the electric control cavity 9;

[0028] The FPGA array card set is installed in the FPGA cavity 10;

[0029] As a preferred solution of this embodiment, only a front FPGA array card 13 group and a rear FPGA array card 16 group are designed in this embodiment. The front FPGA array card 13 group is composed of a plurality of front FPGA array cards 13, and the two front corners of each of the front FPGA array cards 13 are respectively mounted on the bottom of the installation slot 2 through a column a14, and the two rear corners are respectively mounted on the bottom of the installation slot 2 through a column b15; the rear FPGA array card 16 group is composed of a plurality of rear FPGA array cards 16, and each of the rear FPGA array cards 13 is respectively mounted on the bottom of the installation slot 2 through a column a14. The two front corners of the GA array card 16 are each mounted on the bottom of the installation slot 2 through a column c17, and the two rear corners are each mounted on the bottom of the installation slot 2 through a column d18, wherein the height of the column b15 is greater than or equal to the height of the column a14, and the height of the column c17 is less than the height of the column a14; the height of the column d18 is greater than the height of the column b15; the height of the column b15 is greater than the height of the column a14, and the front FPGA array card 13 is tilted to point to the middle and rear section of the rear FPGA array card 16.

[0030] The efficient heat dissipation principle of this embodiment is as follows: the front FPGA array card 13 is respectively mounted on the bottom of the installation slot 2 through the column a14 and the column b15, and the high-speed cooling airflow flows through the front and back of the front FPGA array card 13. The temperature of the airflow flowing through the front gradually increases with the increase of the travel distance. This airflow weakens the cooling effect of the front of the rear FPGA array card 16. This can also be seen from the simulated heat dissipation model. Only the front end of the front FPGA array card 13 has obvious heat dissipation, and the heat dissipation effect on the rear side is extremely poor. However, the temperature of the high-speed cooling airflow flowing through the back does not increase significantly. If the high-speed cooling airflow flowing through the back is used to cool the rear FPGA array card 16, then the effect is bound to be Similar to the cooling effect of the front FPGA array card 13, for this purpose, the present application designs the height of column c17 to be smaller than the height of column a14, so that the high-speed cooling airflow passing through the back of the front FPGA array card 13 will be guided to the front of the rear FPGA array card 16, thereby quickly taking away the high temperature thereon, and the heat dissipation effect exceeds expectations; of course, in order to further improve the heat dissipation performance, the height of column b15 is designed to be greater than the height of column a14; the height of the column d18 is greater than the height of the column b15, and the front FPGA array card 13 is tilted to point toward the middle and rear section of the rear FPGA array card 16, providing double cooling airflow to the high-temperature area in the middle and rear section of the rear FPGA array card 16 to ensure the heat dissipation effect.

[0031] The matters not described in detail in the present invention are all known technologies to those skilled in the art.

[0032] The preferred specific embodiments of the utility model are described in detail above. It should be understood that ordinary technicians in this field can make many modifications and changes based on the concept of the utility model without creative work. Therefore, all technical solutions that can be obtained by technicians in this technical field based on the concept of the utility model through logical analysis, reasoning or limited experiments on the basis of the existing technology should be within the scope of protection determined by the claims.

Claims

1. A computing server, characterized in that: It includes a chassis, a heat dissipation module, a power supply module and several rows of FPGA array card groups; The chassis includes a mounting slot, a panel, a back plate and a cover plate; the panel and the back plate are respectively mounted at two ends of the mounting slot, ventilation grilles are respectively provided on both side walls of the front end of the mounting slot, and the cover plate is covered on the notch of the mounting slot; The heat dissipation module includes a cross frame, which is installed in the installation slot and divides the installation slot into a front-end electric control cavity and a rear-end FPGA cavity. The cross frame is provided with a plurality of fan installation slots, and a heat dissipation fan is installed in each of the fan installation slots; The power module is installed in the electric control cavity; The FPGA array card group is installed in the FPGA cavity.

2. The computing server according to claim 1, characterized in that: The invention comprises a front FPGA array card group and a rear FPGA array card group, wherein the front FPGA array card group is composed of a plurality of front FPGA array cards, and each of the front FPGA array cards has two front corners respectively mounted on the bottom of the installation slot through a column a, and two rear corners respectively mounted on the bottom of the installation slot through a column b; the rear FPGA array card group is composed of a plurality of rear FPGA array cards, and each of the front FPGA array cards has two front corners respectively mounted on the bottom of the installation slot through a column c, and two rear corners respectively mounted on the bottom of the installation slot through a column d, wherein the height of the column b is greater than or equal to the height of the column a, and the height of the column c is less than the height of the column a.

3. The computing server according to claim 2, characterized in that: The height of the column d is greater than the height of the column b.

4. The computing server according to claim 3, characterized in that: The height of the column b is greater than the height of the column a, and the front FPGA array card is tilted toward the middle and rear section of the rear FPGA array card.

5. The computing server according to claim 1, characterized in that: Handles are provided on both sides of the panel.

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