Automatic testing system for intermodulation distortion
By introducing switch combinations into the test module, the intermodulation distortion test system with different wiring methods is realized automatically switched, and the problem of low IMD interference test efficiency in the prior art is solved, and the testing efficiency and accuracy are improved.
Patent Information
- Application Number
- CN202420987904.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-08
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2034-05-08
AI Technical Summary
In the prior art, the test efficiency of IMD interference is low, and the wiring method needs to be manually adjusted, resulting in low testing efficiency.
Design an automated test system for intermodulation distortion. By introducing three switches (first switch, second switch and third switch) into the test module, the wiring methods corresponding to different intermodulation distortion modes are automatically realized, reducing manual switching demand.
Through the automatic wiring switching, the testing efficiency is significantly improved, the time and error rate of manual operation are reduced, and the testing needs of different frequency band combinations and interfaces can be quickly adapted to the test needs of different frequency bands.
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Figure CN222484711U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of testing technology, and in particular to an automatic testing system for intermodulation distortion. Background Art
[0002] IMD (intermodulation distortion) refers to the sum and difference distortion of an input signal introduced by an amplifier. When multiple frequency signals pass through a nonlinear circuit, they will modulate each other to produce intermodulation distortion, with the second-order and third-order distortion amplitudes being the largest. The higher the order, the smaller the distortion. IMD interference will affect the receiving sensitivity of communication products. Products affected by IMD interference will find it more difficult to search for signals transmitted by base stations at a distance from the base station. In the early stage of product design, it is necessary to add certain designs to the circuit to suppress IMD interference and meet the performance requirements of the product. Therefore, it is particularly important to expose the problems of interfered receiving signals (interfered frequency bands) in all IMD combinations.
[0003] With the development of wireless communication products, the standards of cellular products have gradually increased from GSM to the current millimeter wave, and the frequency range between different standards has also been expanding. There are hundreds of frequency band combinations involving IMD. The wiring methods involved in each frequency band combination may be different, and the same frequency band combination may need to be tested for different interfaces. In this way, the same frequency band combination needs to test at least one wiring method. In this way, when testing each frequency band combination or switching frequency band combinations, it is necessary to manually adjust the tangent method, resulting in low test efficiency. Utility Model Content
[0004] The present application provides an automatic test system for intermodulation distortion to solve the problem of low test efficiency.
[0005] The present application provides an automated test system for intermodulation distortion, the system comprising a module under test, a comprehensive tester, a test module and a terminal: the module under test comprises a plurality of antenna ports; the test module comprises an input end, an output end, a first switch, a second switch, a third switch, an attenuator, a quadplexer and two duplexers, the input end comprises a plurality of input interfaces, each input interface is respectively connected to an antenna port in the module under test, the output end comprises a plurality of output interfaces, the output interface is connected to the comprehensive tester, the second switch is used to connect the input end of the quadplexer to a first MIMO port or a second MIMO port in the input end of the test module, the first switch and the third switch are used to connect the output ends of two duplexers through the attenuator, or to connect the output ends of two duplexers to the output end of the quadplexer; the terminal is respectively connected to the module under test, the test module and the comprehensive tester, and is used to determine a corresponding wiring mode according to the intermodulation distortion mode of the module under test; the test module is used to control the switch combination to realize the wiring mode, and control the switch combination of the test module to realize the wiring mode.
[0006] Optionally, the module under test includes a zeroth antenna port, a first antenna port, a second antenna port and a third antenna port, and the input port of the test module includes a first transceiver input port, a first multiple-input multiple-output port, a second transceiver input port and a second multiple-input multiple-output port; the zeroth antenna port is connected to the first transceiver input port, the first antenna port is connected to the first multiple-input multiple-output port, the second antenna port is connected to the second transceiver input port, and the third antenna port is connected to the second multiple-input multiple-output port.
[0007] Optionally, the comprehensive tester includes a second comprehensive tester and a first comprehensive tester, and the output ports of the test module include a first transceiver output port, a first standard output port, a second transceiver output port and a second standard output port; the second comprehensive tester is respectively connected to the first transceiver output port and the first standard output port, and the first comprehensive tester is respectively connected to the second transceiver output port and the second standard output port.
[0008] Optionally, the multiplexer combination includes a first duplexer, a quadplexer and a second duplexer, and the switch combination includes a first switch, a second switch and a third switch; the input end of the first duplexer is connected to the first transceiver input port, the first output end of the first duplexer is connected to the first transceiver output port, and the second output end of the first duplexer is connected to the third switch; the input end of the quadplexer is connected to the first multiple-input multiple-output port and the second multiple-input multiple-output port through the second switch, the first output end of the quadplexer is connected to the first switch, the second output end of the quadplexer is connected to the second standard output port, the third output end of the quadplexer is connected to the first standard output port, and the fourth output end of the quadplexer is connected to the third switch; the input end of the second duplexer is connected to the second transceiver input port, the first output end of the second duplexer is connected to the second transceiver output port, and the second output end of the second duplexer is connected to the first switch.
[0009] Optionally, the common terminal of the first switch is connected to the second output end of the second duplexer, the first selection terminal of the first switch is connected to the first output end of the quadplexer, and the second selection terminal of the first switch is connected to one end of the attenuator; the common terminal of the third switch is connected to the second output end of the first duplexer, the first selection terminal of the third switch is connected to the fourth output end of the quadplexer, and the second selection terminal of the third switch is connected to the other end of the attenuator; the common terminal of the second switch is connected to the input end of the quadplexer, the first selection terminal of the second switch is connected to the first MIMO port, and the second selection terminal of the second switch is connected to the second MIMO port;
[0010] Optionally, the attenuation value of the attenuator and the signal size of the comprehensive tester are related to the intermodulation distortion mode.
[0011] Optionally, the terminal is connected to the module under test and the test module via a universal serial bus, and is connected to the comprehensive tester via a LAN bus.
[0012] The above-mentioned technical scheme provided by the embodiment of the present application has the following advantages compared with the prior art: the present application realizes different line connection modes inside the test module by closing multiple switches in the switch combination, and each line connection mode connects different multiplexers and attenuators, and finally realizes the wiring mode corresponding to each intermodulation distortion mode by closing the switch, without the need to manually switch the wiring mode, thereby improving the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The accompanying drawings herein are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present utility model, and together with the description, are used to explain the principles of the present utility model.
[0014] In order to more clearly illustrate the technical solutions in the embodiments of the utility model or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0015] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.
[0016] Figure 1 It is a schematic diagram of the wiring mode of the ANT0&ANT2 interface being disturbed when testing B3 in the prior art;
[0017] Figure 2 It is a schematic diagram of the wiring mode of the ANT0&ANT1&ANT2 interfaces being disturbed when testing B3 in the prior art;
[0018] Figure 3 It is a schematic diagram of the wiring mode of the ANT0&ANT2&ANT3 interfaces being disturbed when testing B3 in the prior art;
[0019] Figure 4 A schematic diagram of an automated test system for intermodulation distortion provided in an embodiment of the present application;
[0020] Figure 5-1 This is a schematic diagram of the wiring method of the ANT0 & ANT2 interfaces being disturbed when testing B66 in Example 2 of this application;
[0021] Figure 5-2 This is a schematic diagram of the wiring method of the ANT0 & ANT2 & ANT3 interfaces being disturbed when testing B66 in Example 2 of this application;
[0022] Figure 6-1 This is a schematic diagram of the wiring method of the ANT0 & ANT2 interfaces being disturbed when testing B14 in Example 3 of this application;
[0023] Figure 6-2 This is a schematic diagram of the wiring method in which the ANT0 & ANT2 & ANT3 interfaces are disturbed when testing B14 in Example 3 of this application. DETAILED DESCRIPTION
[0024] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0025] The disclosure below provides many different embodiments or examples for realizing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention may repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.
[0026] There are hundreds of IMD frequency band combinations in the prior art, involving 4MIMO and 2MIMO. The subcarrier supports 4MIMO in the following ways: PRX (primary receive), DRX (transmit & receive), MIMO1 (Multiple-Input Multiple-Output) and MIMO2. The subcarrier supports 2MIMO in the following ways: PRX and DRX.
[0027] For example, in the test frequency band DC_1A-3A_n77A_UL_1A-n77A, B1 and n77 are used as transmitting signals, and B3 is used as the interfered receiving signal. The second-order intermodulation (f1+f2) generated by the transmission of B1 and n77 interferes with the reception of B3. In order to verify the degree of impact on the receiving sensitivity of the four antenna ports, three wiring methods need to be built for testing.
[0028] Figure 1 This is the wiring mode in which the ANT0 & ANT2 interfaces are interfered when testing B3 in the prior art. The transmission of B3 and n77 is respectively at ANT0 and ANT2 of the device under test (DUT). The insertion loss of the duplexer is 3-4 dB. Figure 1 The two duplexers are connected with a 3dB attenuator to simulate the 10dB isolation of the antenna.
[0029] Figure 2This is the wiring method in which the ANT0&ANT1&ANT2 interfaces are interfered with when testing B3 in the prior art. The transmissions of B3 and n77 are respectively at ANT0, ANT1, and ANT2 of the module under test. Because the quadplexer has a default isolation of 6dB, no attenuator is needed.
[0030] Figure 3 This is the wiring method in which the ANT0&ANT2&ANT3 interfaces are interfered with when testing B3 in the prior art. The transmissions of B3 and n77 are respectively at ANT0, ANT2, and ANT3 of the module under test. Because the quadplexer has a default isolation of 6dB, no attenuator is needed.
[0031] Figures 1 to 3 In the example, the first integrated tester Call-Box_1 is a 4G integrated tester, and the second integrated tester Call-Box_2 is a 5G integrated tester.
[0032] In the prior art, for the test frequency band DC_1A-3A_n77A_UL_1A-n77A, if you want to verify the degree to which the receiving sensitivity of the four antennas is affected when B3 is used as the interfered signal, you need to build three wiring methods, and then you need to manually switch among the three wiring methods, resulting in low test efficiency. If there are other test frequency bands, then more wiring methods are required for manual switching, and hundreds of IMD frequency band combinations lead to low test efficiency.
[0033] The present application provides an automated testing system for intermodulation distortion. The system adds three switches on the basis of the existing wiring method, namely a first switch, a second switch and a third switch. Different wiring methods are achieved by closing the three switches. The system is described in detail below.
[0034] Figure 4 A schematic diagram of an automated test system for intermodulation distortion provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the system includes a module under test 401 , a comprehensive tester 403 , a test module 402 and a terminal 404 .
[0035] The module under test 401 includes multiple antenna ports. Each currently used cellular frequency band supports up to 4 antennas. Therefore, the module under test in the embodiment of the present application has four antenna ports.
[0036] The test module 402 includes an input end, an output end, a first switch, a second switch, a third switch, an attenuator, a quadplexer and two duplexers. The input end includes a plurality of input interfaces, each of which is respectively connected to an antenna port in the module under test. Since there are four antenna ports in the module under test, the input end of the test module also has four input interfaces. The output end includes a plurality of output interfaces, and the output interfaces are connected to the comprehensive tester 403. The second switch is provided between the input end of the quadplexer and the input end of the test module, and is used to connect the input end of the quadplexer to the first MIMO port or the second MIMO port in the input end of the test module. The first switch is used to connect the output end of one of the duplexers to the first output end or the attenuator of the quadplexer, and the third switch is used to connect the output end of another duplexer to the fourth output end or the attenuator of the quadplexer. In this way, through the joint action of the first switch and the third switch, the output ends of the two duplexers can be connected through the attenuator, or the output ends of the two duplexers can be connected to the output end of the quadplexer.
[0037] The terminal 404 is connected to the module under test, the test module and the comprehensive tester respectively, and is used to determine the corresponding wiring mode according to the intermodulation distortion mode of the module under test, and control the closure of different switches to achieve the required wiring mode.
[0038] The present application adds three switches in the system, and by closing the second switch, the input end of the quadplexer is connected to different antenna ports. Combined with the antenna ports to which the input ends of the two duplexers are connected, a variety of connection methods between the multiplexer of the test module and the antenna port of the module under test are realized. By closing the first switch and the third switch, the output ends of the two duplexers are connected to the output end of the quadplexer or are connected to the attenuator. The terminal determines the corresponding switch closure method according to each intermodulation distortion mode, and then realizes the line connection method by closing the three switches. The present application automatically realizes the wiring method corresponding to each intermodulation distortion mode by closing the switch, without the need for manual switching of the wiring method, thereby improving the test efficiency.
[0039] The terminal is connected to the module under test and the test module via a universal serial bus (USB), and is connected to the comprehensive tester via a LAN bus.
[0040] The module under test includes four antenna ports, namely the zeroth antenna port ANT0 (Antenna hardware interface), the first antenna port ANT1, the second antenna port ANT2 and the third antenna port ANT3. Each input port of the test module input end is connected to an antenna port in the module under test. Specifically, the input port of the module under test includes a first transceiver input port TRX1, a first multiple-input multiple-output port MIMO1, a second transceiver input port TRX2 and a second multiple-input multiple-output port MIMO2. Figure 4 It can be seen that the zeroth antenna port is connected to the first transceiver input port, the first antenna port is connected to the first MIMO port, the second antenna port is connected to the second transceiver input port, and the third antenna port is connected to the second MIMO port.
[0041] The comprehensive tester includes a first comprehensive tester Call-Box_1 and a second comprehensive tester Call-Box_2. The output ports of the test module include a first transceiver output port TRX1", a first standard output port D1, a second transceiver output port TRX2" and a second standard output port D2. The output interface of the test module is connected to the comprehensive tester. Specifically, the second comprehensive tester Call-Box_2 is respectively connected to the first transceiver output port TRX1" and the first standard output port D1, and the first comprehensive tester Call-Box_1 is respectively connected to the second transceiver output port TRX2" and the second standard output port D2.
[0042] like Figure 4 As shown, the two duplexers in the embodiment of the present application are respectively a first duplexer and a second duplexer, and the input and output connection methods of the duplexer and the quadplexer are as follows.
[0043] An input end of the first duplexer is connected to the first transceiver input port, a first output end of the first duplexer is connected to the first transceiver output port, and a second output end of the first duplexer is connected to the third switch;
[0044] The input end of the quadplexer is connected to the first MIMO port or the second MIMO port through the second switch, the first output end of the quadplexer is connected to the first switch, the second output end of the quadplexer is connected to the second standard output port, the third output end of the quadplexer is connected to the first standard output port, and the fourth output end of the quadplexer is connected to the third switch;
[0045] The input end of the second duplexer is connected to the second transceiver input port, the first output end of the second duplexer is connected to the second transceiver output port, and the second output end of the second duplexer is connected to the first switch.
[0046] Specifically, the first switch, the second switch and the third switch are all SPDT (Single Pole Double Throw), the common terminal of the first switch is connected to the second output end of the second duplexer, the first selection terminal of the first switch is connected to the first output end of the quadplexer, and the second selection terminal of the first switch is connected to one end of the attenuator. The first switch is used to realize the connection between the second output end of the second duplexer and the first output end of the quadplexer or the attenuator.
[0047] The common terminal of the second switch is connected to the input end of the quadplexer, the first selection terminal of the second switch is connected to the first MIMO port, the second selection terminal of the second switch is connected to the second MIMO port, and the second switch is used to connect the input end of the quadplexer to the first MIMO port or the second MIMO port;
[0048] The common terminal of the third switch is connected to the second output end of the first duplexer, the first selection terminal of the third switch is connected to the fourth output end of the quadplexer, and the second selection terminal of the third switch is connected to the other end of the attenuator. The third switch is used to connect the second output end of the first duplexer with the fourth output end of the quadplexer or the attenuator.
[0049] The following is a specific example explanation of the system.
[0050] Example 1.
[0051] Regarding the test frequency band DC_1A-3A_n77A_UL_1A-n77A, it is necessary to test the degree of influence of the B3 interface on the interfered signal. The embodiment of the present application provides the following three test methods for the system, wherein Call-Box_1 is a 4G comprehensive tester, Call-Box_2 is a 5G comprehensive tester, and the attenuator is a 3dB attenuator. This test frequency band is the same as the one mentioned above. Figures 1 to 3 The corresponding test frequency band is the same. The embodiment of the present application takes this test frequency band as an example to describe how to achieve the above by closing three switches. Figure 1-3 There are three wiring methods.
[0052] (1) When testing B3, the wiring method of the ANT0 & ANT2 interfaces being interfered with is as follows: the first switch and the third switch (the two SPDT switches on the right) are turned on the path of the 3dB attenuator, B1 and n77 are connected to the first transceiver input port TRX1 and the second transceiver input port TRX2 of the test module input port respectively, the first transceiver output port TRX1" of the test module input port is connected to the 5G comprehensive tester, and the second transceiver output port TRX2" is connected to the 4G comprehensive tester. This wiring method is as follows Figure 1 The wiring method in can measure the degree of sensitivity of the two antenna ports ANT0 and ANT2 under the interference signal B3;
[0053] (2) Wiring method of the ANT0&ANT1&ANT2 interfaces being disturbed during test B3: The first switch and the third switch (the two SPDT switches on the right) are connected to the quadplexer respectively, and the second switch (the SPDT switch on the left) is connected to the first MIMO port MIMO1 of the test module. MIMO1 is connected to ANT1 of the module under test DUT, which is equivalent to Figure 2 In the wiring method, the sensitivity of the three antenna ports ANT0, ANT1, and ANT2 can be tested under the interference signal B3;
[0054] (3) Wiring method of the ANT0&ANT2&ANT3 interfaces when the interference occurs during test B3: The wiring method is roughly the same as that in (2) above. You only need to connect the SPDT on the left to the second MIMO port MIMO2 of the test module. MIMO2 is also connected to the ANT_3 of the DUT. This can test the degree of sensitivity of the three antenna ports ANT0, ANT2, and ANT3 under the interference signal B3.
[0055] Example 2.
[0056] Regarding the test frequency band DC 2A-66A n5A UL 2A-n5A (DL-MIMO4-2_4), B66 is the interfered receiving signal, and the fourth-order intermodulation of 2A&n5A interferes with B66 reception.
[0057] (1) When testing B66, the wiring method of the ANT0 & ANT2 interfaces that are disturbed is as follows Figure 5-1 As shown in FIG. 1 , the first switch and the third switch are in the attenuator path, the second switch is not working, the bold line indicates that there is a signal flow, and the non-bold line indicates that there is no signal flow.
[0058] (2) When testing B66, the wiring method of the ANT0&ANT2&ANT3 interfaces is disturbed as follows Figure 5-2 The second switch connects to ANT3, the first switch and the third switch connect to the quadplexer, the bold line indicates that a signal flows through, and the non-bold line indicates that no signal flows through.
[0059] Example 3.
[0060] Regarding the test frequency band DC 14A-30A n77A UL 30A-n77A (DL-MIMO2-4_4), B14 is the interfered receiving signal, and the fifth-order intermodulation of 30A & n77A interferes with B14 reception.
[0061] (1) When testing B14, the wiring method of the ANT0 & ANT2 interfaces that are disturbed is as follows Figure 6-1 As shown in FIG. 1 , the first switch and the third switch are in the attenuator path, the second switch is not working, the bold line indicates that there is a signal flow, and the non-bold line indicates that there is no signal flow.
[0062] (2) When testing B14, the wiring method of the ANT0&ANT2&ANT3 interfaces that are disturbed is as follows Figure 6-2 The second switch connects to ANT3, the first switch and the third switch connect to the quadplexer, the bold line indicates that a signal flows through, and the non-bold line indicates that no signal flows through.
[0063] Among them, the attenuation value of the attenuator and the signal size of the comprehensive tester in the present application are related to the intermodulation distortion mode. The comprehensive tester used can be determined as 3G, 4G or 5G according to the specific intermodulation distortion mode. The system provided in the embodiment of the present application simulates a scenario with an antenna isolation of 10dB. If the isolation is adjusted, the attenuation value of the attenuator can change accordingly.
[0064] The above described embodiments are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, i.e., they may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0065] It should be understood that the terms used herein are only for the purpose of describing specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.
[0066] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features applied herein.
Claims
1. An automatic test system for intermodulation distortion, characterized in that: The system includes a module under test, a comprehensive tester, a test module and a terminal; The module under test includes multiple antenna ports; The test module comprises an input end, an output end, a first switch, a second switch, a third switch, an attenuator, a quadplexer and two duplexers, wherein the input end comprises a plurality of input interfaces, each of which is respectively connected to an antenna port in the module under test, the output end comprises a plurality of output interfaces, and the output interface is connected to the comprehensive tester, the second switch is used to connect the input end of the quadplexer to the first MIMO port or the second MIMO port in the input end of the test module, the first switch and the third switch are used to connect the output ends of the two duplexers through the attenuator, or to connect the output ends of the two duplexers to the output end of the quadplexer; The terminal is connected to the module under test, the test module and the comprehensive tester respectively, and is used to determine the corresponding wiring mode according to the intermodulation distortion mode of the module under test, and control different switches to close to achieve the wiring mode.
2. The system according to claim 1, characterized in that The module under test includes a zeroth antenna port, a first antenna port, a second antenna port, and a third antenna port, and the input port of the test module includes a first transceiver input port, a first MIMO port, a second transceiver input port, and a second MIMO port; The zeroth antenna port is connected to the first transceiver input port, the first antenna port is connected to the first MIMO port, the second antenna port is connected to the second transceiver input port, and the third antenna port is connected to the second MIMO port.
3. The system according to claim 2, characterized in that The comprehensive tester includes a second comprehensive tester and a first comprehensive tester, and the output port of the test module includes a first transceiver output port, a first standard output port, a second transceiver output port and a second standard output port; The second comprehensive tester is connected to the first transceiver output port and the first standard output port respectively, and the first comprehensive tester is connected to the second transceiver output port and the second standard output port respectively.
4. The system according to claim 3, characterized in that The two duplexers are respectively a first duplexer and a second duplexer; The input end of the first duplexer is connected to the first transceiver input port, the first output end of the first duplexer is connected to the first transceiver output port, and the second output end of the first duplexer is connected to the third switch; The input end of the quadplexer is connected to the first MIMO port or the second MIMO port through the second switch, the first output end of the quadplexer is connected to the first switch, the second output end of the quadplexer is connected to the second standard output port, the third output end of the quadplexer is connected to the first standard output port, and the fourth output end of the quadplexer is connected to the third switch; The input end of the second duplexer is connected to the second transceiver input port, the first output end of the second duplexer is connected to the second transceiver output port, and the second output end of the second duplexer is connected to the first switch.
5. The system according to claim 4, characterized in that The common terminal of the first switch is connected to the second output end of the second duplexer, the first selection terminal of the first switch is connected to the first output end of the quadplexer, and the second selection terminal of the first switch is connected to one end of the attenuator; The common terminal of the third switch is connected to the second output end of the first duplexer, the first selection terminal of the third switch is connected to the fourth output end of the quadruplicater, and the second selection terminal of the third switch is connected to the other end of the attenuator; A common terminal of the second switch is connected to an input terminal of the quadplexer, a first selection terminal of the second switch is connected to the first MIMO port, and a second selection terminal of the second switch is connected to the second MIMO port.
6. The system according to claim 1, characterized in that The attenuation value of the attenuator and the signal size of the comprehensive tester are related to the intermodulation distortion mode.
7. The system according to claim 1, characterized in that The terminal is connected to the module under test and the test module via a universal serial bus, and is connected to the comprehensive tester via a LAN bus.