Electronic parking brake system QM chip current sampling circuit

Abstract

The utility model discloses a current sampling circuit for a QM chip of an electronic parking brake system, and the circuit comprises a driving chip which comprises a driving module and a current collection module; the driving chip is connected with an H-bridge circuit through a driving module, the middle of the H-bridge circuit is connected with a caliper motor, the driving chip is connected with a first sampling circuit and a first first-order filter circuit through a sampling module, the H-bridge circuit is connected with a monitoring circuit, and the monitoring circuit comprises a second sampling circuit, a second first-order filter circuit and a monitoring circuit control circuit. According to the utility model, a current acquisition function of an ASIL-B level is realized by using the QM driving chip with a low safety level, the requirements of a new energy automobile and an automatic driving automobile are met, the reliability and the stability of a parking system are improved, and the fault occurrence probability and the manufacturing cost of the parking system are effectively reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of automobile intelligent braking function safety, in particular to a QM chip current sampling circuit of an electronic parking brake system. Background Art

[0002] The Electronic Parking Brake (EPB) is a parking brake system for modern cars. Compared with the traditional handbrake or footbrake, it uses electronic control to replace the original manual operation of the mechanical lever, thereby realizing the parking brake function of the whole vehicle. Currently, there are two main forms of EPB technology used in automobiles: cable-type EPB and caliper-integrated EPB. The former is a technology that was applied to the whole vehicle earlier, while the latter is a widely used EPB technology. The integrated EPB has the advantages of being more convenient, easy to operate and control, easy to arrange, safe and reliable.

[0003] EPB can be divided into: drive module and current acquisition module from the hardware level. Currently, enterprises often use STMicroelectronics' L9369 chip (the benchmark of EPB drive chip), which is not only a drive chip, but also integrates an EPB switch module, which meets the requirements of Automotive Safety Integrity Level (ASIL_D), making it an EPB-specific chip. The L9369 chip collects the current on the circuit through two sets of current acquisition modules and checks each other to meet the requirements of high functional safety of the current acquisition module. Such a circuit solution is costly, and the types of chips that can be selected are limited. In the case of material shortage, there will be no chips available, which will further increase the cost of the parking system. Utility Model Content

[0004] The purpose of the utility model is to solve the above problems and provide a QM chip current sampling circuit for an electronic parking brake system.

[0005] In order to achieve the above-mentioned purpose, the utility model specifically adopts the following technical solutions, including:

[0006] A driving chip, the driving chip includes a driving module and a current acquisition module, and the driving chip is logically controlled by a controller;

[0007] The driving chip is connected to an H-bridge circuit via a driving module, the H-bridge circuit is connected to a caliper motor, and the driving module is used to control the motion state of the caliper motor;

[0008] The driver chip is connected to a first sampling circuit and a first first-order filter circuit through a sampling module, the first sampling circuit is used to collect the voltage difference and the stable voltage difference signal across the resistor, and input them to the current collection module of the driver chip, and the first first-order filter circuit is used to stabilize the output signal;

[0009] The H-bridge circuit is connected to a monitoring circuit, which includes a second sampling circuit, a second first-order filtering circuit and a monitoring circuit control circuit. The second sampling circuit is used to collect the current of the monitoring circuit, and the current collection module of the driver chip is monitored by comparing the current collected by the second sampling circuit and the current collection module of the driver chip.

[0010] As a further description of the above technical solution, the driving module of the driving chip is provided with four level output interfaces GH1, GH2, GL1 and GL2. The driving chip controls the H-bridge circuit through the level output interface of the driving module. The level output interface GH1 is connected to the gate of the first MOS tube Q1, the level output interface GH2 is connected to the gate of the second MOS tube Q2, the level output interface GL1 is connected to the gate of the third MOS tube Q3, and the level output interface GL2 is connected to the gate of the fourth MOS tube Q4.

[0011] As a further description of the above technical solution, the positive pole M+ of the caliper motor is connected between the first MOS tube Q1 and the third MOS tube Q3, the negative pole M- of the caliper motor is connected between the second MOS tube Q2 and the fourth MOS tube Q4, the interfaces GH1 and GL2 of the driving module output a high voltage to make the caliper motor rotate forward, and the interfaces GH2 and GL1 of the driving module output a high voltage to make the caliper motor rotate reversely.

[0012] As a further description of the above technical solution, the H-bridge circuit includes a first MOS tube Q1, a second MOS tube Q2, a third MOS tube Q3 and a fourth MOS tube Q4, and the drains of the first MOS tube Q1 and the second MOS tube Q2 are connected in parallel to a first power supply VBAT, and the first power supply VBAT is used to power the H-bridge circuit.

[0013] As a further description of the above technical solution, the source of the first MOS tube Q1 is connected to the drain of the third MOS tube Q3, the source of the second MOS tube Q2 is connected to the drain of the fourth MOS tube Q4, and the source of the third MOS tube Q3 is connected to the source of the fourth MOS tube Q4.

[0014] As a further description of the above technical solution, the first sampling circuit includes a sampling resistor R1, a common-mode capacitor C1, a differential-mode capacitor C2 and a differential-mode capacitor C3, the sampling resistor R1 and the common-mode capacitor C1 are connected in parallel, and the sampling resistor R1 is connected to the source of the third MOS tube Q3 and the fourth MOS tube Q4 of the H-bridge circuit.

[0015] As a further description of the above technical solution, the first first-order filtering circuit includes a resistor R4 and a capacitor C7, the current acquisition module is connected to the first ADC output port of the controller through the resistor R4, and the capacitor C7 and the resistor R4 are connected in series.

[0016] As a further description of the above technical solution, the second sampling circuit includes a sampling resistor R2, a resistor R3, a common-mode capacitor C4, a differential-mode capacitor C5 and a differential-mode capacitor C6, the sampling resistor R2 and the common-mode capacitor C4 are connected in parallel, the sampling resistor R2 is connected to the second first-order filter circuit through a high-side operational amplifier, the sampling resistor is connected to the second power supply VDD, and the second power supply VDD is used to power the entire current monitoring circuit.

[0017] As a further description of the above technical solution, the second first-order filter circuit includes a resistor R5 and a capacitor C8, the second first-order filter circuit is connected to the second ADC output port of the controller through the resistor R4, and the capacitor C8 and the resistor R5 are connected in series.

[0018] As a further description of the above technical solution, the monitoring circuit control circuit includes a fifth MOS transistor Q5, a current limiting resistor R6, a sixth transistor Q6 and a seventh transistor Q7, the fifth MOS transistor Q5 is connected to the collector of the sixth transistor Q6 through the current limiting resistor R6, the base of the sixth transistor Q6 is connected to the collector of the seventh transistor Q7, the base of the seventh transistor Q7 is connected to the IO port of the controller, the emitter of the sixth transistor Q6 is connected to the third power supply VCC, and the third power supply VCC supplies power to the monitoring circuit control circuit.

[0019] The beneficial effects of the utility model are as follows:

[0020] 1. The utility model uses a QM driver chip with a low safety level to achieve an ASIL-B level current acquisition function, meets the needs of new energy vehicles and self-driving vehicles, improves the reliability and stability of the parking system, and effectively reduces the probability of parking system failure and manufacturing costs.

[0021] In order to more clearly illustrate the structural features and functions of the present invention, the present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1This is the hardware circuit diagram of the existing L9369 driver chip;

[0023] Figure 2 It is the hardware circuit diagram of the QM chip current sampling circuit of the electronic parking brake system of the utility model;

[0024] Figure 3 This is the schematic diagram of the forward rotation of the caliper motor EPB MOTOR of the utility model;

[0025] Figure 4 This is the principle diagram of the reversal of the caliper motor EPB MOTOR of the utility model;

[0026] Figure 5 It is a schematic diagram of the failure analysis results of the QM chip current sampling circuit of the electronic parking brake system of the utility model.

[0027] Reference numerals:

[0028] 1. Driving chip; 2. H-bridge circuit; 3. First sampling circuit; 4. First first-order filtering circuit; 5. Second sampling circuit; 6. Second first-order filtering circuit; 7. Monitoring circuit control circuit. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the embodiments of the present utility model clearer, the technical solution in the embodiments of the present utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the present utility model.

[0030] like Figure 1-Figure 5 As shown, in one embodiment, a QM chip current sampling circuit of an electronic parking brake system includes:

[0031] The driving chip 1 includes a driving module and a current acquisition module. The driving chip 1 is logically controlled by a controller.

[0032] The driver chip 1 is connected to the H-bridge circuit 2 through the driver module, the caliper motor is connected in the middle of the H-bridge circuit 2, and the driver module is used to control the motion state of the caliper motor. Specifically, the driver module of the driver chip 1 is provided with four level output interfaces GH1, GH2, GL1 and GL2, and the driver chip 1 controls the H-bridge circuit 2 through the level output interface of the driver module.

[0033] like Figure 1-Figure 5 As shown, in this embodiment, the driver chip 1 is connected to the first sampling circuit 3 and the first first-order filter circuit 4 through the current acquisition module. The first sampling circuit 3 is used to collect the voltage difference across the resistor and stabilize the voltage difference signal, which is input to the current acquisition module of the driver chip 1. The first first-order filter circuit 4 is used to stabilize the output signal.

[0034] Furthermore, the first sampling circuit 3 includes a sampling resistor R1, a common mode capacitor C1, a differential mode capacitor C2 and a differential mode capacitor C3, the sampling resistor R1 and the common mode capacitor C1 are connected in parallel, and the sampling resistor R1 is connected to the source of the third MOS transistor Q3 and the fourth MOS transistor Q4 of the H-bridge circuit 2.

[0035] Furthermore, the first first-order filter circuit 4 includes a resistor R4 and a capacitor C7, the current acquisition module is connected to the first ADC output port of the controller via the resistor R4, and the capacitor C7 and the resistor R4 are connected in series.

[0036] like Figure 1-Figure 5 As shown, in this embodiment, the H-bridge circuit 2 includes a first MOS tube Q1, a second MOS tube Q2, a third MOS tube Q3 and a fourth MOS tube Q4. The drains of the first MOS tube Q1 and the second MOS tube Q2 are connected in parallel with the first power supply VBAT. The first power supply VBAT is used to power the H-bridge circuit 2. The sampling resistor R1 is connected to the lower end of the H-bridge and short-connected to the ground. The source of the first MOS tube Q1 is connected to the drain of the third MOS tube Q3, the source of the second MOS tube Q2 is connected to the drain of the fourth MOS tube Q4, and the source of the third MOS tube Q3 is connected to the source of the fourth MOS tube Q4.

[0037] Furthermore, the level output interface GH1 is connected to the gate of the first MOS transistor Q1, the level output interface GH2 is connected to the gate of the second MOS transistor Q2, the level output interface GL1 is connected to the gate of the third MOS transistor Q3, and the level output interface GL2 is connected to the gate of the fourth MOS transistor Q4.

[0038] Furthermore, the positive pole M+ of the caliper motor is connected between the first MOS tube Q1 and the third MOS tube Q3, the negative pole M- of the caliper motor is connected between the second MOS tube Q2 and the fourth MOS tube Q4, the interfaces GH1 and GL2 of the driving module output a high voltage to make the caliper motor rotate forward, and the interfaces GH2 and GL1 of the driving module output a high voltage to make the caliper motor rotate reversely.

[0039] like Figure 1-Figure 5 As shown, in this embodiment, the H-bridge circuit 2 is connected to the monitoring circuit, and the monitoring circuit includes a second sampling circuit 5, a second first-order filter circuit 6 and a monitoring circuit control circuit 7. The second sampling circuit 5 is used to collect the current of the monitoring circuit, and the current collection module of the driver chip 1 is monitored by comparing the current collected by the second sampling circuit 5 and the current collection module of the driver chip 1.

[0040] Furthermore, the second sampling circuit 5 includes a sampling resistor R2, a resistor R3, a common-mode capacitor C4, a differential-mode capacitor C5 and a differential-mode capacitor C6. The sampling resistor R2 and the common-mode capacitor C4 are connected in parallel. The sampling resistor R2 is connected to the second first-order filter circuit 6 through a high-side operational amplifier. The sampling resistor is connected to a second power supply VDD, and the second power supply VDD is used to power the entire current monitoring circuit.

[0041] Furthermore, the second first-order filter circuit 6 includes a resistor R5 and a capacitor C8. The second first-order filter circuit 6 is connected to the second ADC output port of the controller via the resistor R4, and the capacitor C8 and the resistor R5 are connected in series.

[0042] Furthermore, the monitoring circuit control circuit 7 includes a fifth MOS transistor Q5, a current limiting resistor R6, a sixth transistor Q6 and a seventh transistor Q7. The fifth MOS transistor Q5 is connected to the collector of the sixth transistor Q6 through the current limiting resistor R6, the base of the sixth transistor Q6 is connected to the collector of the seventh transistor Q7, the base of the seventh transistor Q7 is connected to the IO port of the controller, and the emitter of the sixth transistor Q6 is connected to the third power supply VCC. The third power supply VCC supplies power to the monitoring circuit control circuit 7.

[0043] Working principle:

[0044] (I) The four level output interfaces GH1, GH2, GL1, and GL2 of the driving module are used to control the opening and closing of the four MOS tubes Q1, Q2, Q3, and Q4 of the H bridge respectively:

[0045] (1) When the driver chip 1 receives the forward rotation instruction, the driver module allows the level output interfaces GH1 and GL2 to output high voltage signals, so that the first MOS tube Q1 and the fourth MOS tube Q4 are turned on, and the current flows from the first power supply VBAT through the first MOS tube Q1, enters through the positive electrode M+ of the caliper motor EPB MOTOR, and then flows out from the negative electrode M-, flows through the sampling resistor R1 to the ground through the fourth MOS tube Q4. At this time, the current forms a voltage difference through the sampling resistor R1. The voltage difference is filtered by the common mode capacitor C1 and the differential mode capacitors C2 and C3, so that the voltage difference tends to be stable and finally enters the current acquisition module of the QM driver chip 1. The voltage signal is amplified in the current acquisition module and output to the first ADC output port of the controller for identification. The first first-order filter circuit 4 is integrated in the output circuit to make the output signal more stable (such as Figure 3 shown).

[0046] (2) When the driver chip 1 receives the reverse command, the driver module allows the level output interfaces GH2 and GL1 to output high voltage signals, so that the second MOS tube Q2 and the third MOS tube Q3 are turned on, and the current flows from the first power supply VBAT through the second MOS tube Q2, enters through the negative electrode M- of the caliper motor EPB MOTOR, and then flows out from the positive electrode M+, flows through the sampling resistor R1 to the ground through the third MOS tube Q3. At this time, the current forms a voltage difference through the sampling resistor R1, and the voltage difference is filtered by the common mode capacitor C1, the differential mode capacitors C2 and C3, so that the voltage difference tends to be stable, and finally enters the current acquisition module of the QM driver chip 1. The voltage signal is amplified in the current acquisition module and output to the first ADC output port of the controller for identification (such as Figure 4 shown).

[0047] (ii) A monitoring circuit of a current acquisition module is added to the source of the fourth MOS tube Q4. A known current Ia is injected into the sampling resistor R1, and the current value Ib is calculated by the current acquisition module of the driver chip 1. Then, the values ​​of Ia and Ib are compared to monitor the accuracy of the current acquisition module of the driver chip 1:

[0048] (1) Powered by the second power supply VDD, the current flows through the sampling resistor R2, enters the sampling resistor R1 through the resistor R3 and the fifth MOS tube Q5, and finally reaches the ground to form a current loop. In this process, the current passes through the sampling resistor R1, and the current Ia is obtained through the current acquisition module of the QM driver chip 1; the current passes through the sampling resistor R2, and a voltage difference is formed at both ends of the sampling resistor R2. The voltage difference is stabilized through the common mode capacitor C4 and the two differential mode capacitors C5 and C6. The high-side operational amplifier amplifies the collected voltage difference, and the amplified voltage difference is output to the first ADC output port of the controller through the second first-order filter circuit 6 composed of R5 and C8, and the current Ib flowing through the sampling resistor R2 is obtained. The current values ​​Ia and Ib are compared to verify the accuracy of the current acquisition module of the driver chip 1.

[0049] (2) The fifth MOS transistor Q5 is controlled by the IO port of the controller. When the IO port gives a high voltage signal, the first transistor Q6 and the second transistor Q7 are turned on, and the voltage of the third power supply VCC turns on the fifth MOS transistor Q5 after passing through the current limiting resistor R6. When the IO port gives a low voltage signal, the fifth MOS transistor Q5 is turned off. Only when the driving instruction is not to drive the caliper motor (IDLE), the IO port gives a high voltage signal. When the driving instruction is forward or reverse, the IO port gives a low voltage signal to cooperate in normal operation.

[0050] (III) In order to ensure the performance of the high-side op amp, an initialization test is performed before the QM chip driver module starts working:

[0051] When the driving instruction of the QM driver chip 1 is not to drive the caliper motor (IDLE), the MOS tube on the H bridge does not work, the voltage of the first power supply VBAT cannot reach the sampling resistor R1, the current acquisition module of the driver chip 1 is still working, and the collected current is 0A. When the IO port of the controller outputs a high level, the NPN type second transistor Q7 is turned on, and the collector is short-circuited to the emitter grounded, so that the base of the PNP type first transistor Q6 is short-circuited and turned on, and the voltage of the third power supply VCC enters the fifth MOS tube Q5 through the current limiting resistor R6, controls the MOS tube Q5 to turn on, and activates the current monitoring circuit.

[0052] When the EPB module is initialized, the above operation also needs to be performed. The current Ic is obtained by dividing the voltage of VDD by the resistance value of R1+R2+R3. The current values ​​of Ic and Ib are compared to verify the external current sampling circuit, detect its control logic and the on-off of the entire current loop, perform a self-test of the power-on initialization monitoring circuit, judge the performance of the high-side op amp and the hardware status of the entire loop, so as to improve the overall safety performance of the design.

[0053] By monitoring the power-on detection monitoring circuit and the QM driver chip 1 in the IDLE state, the stability and reliability of the current acquisition module can be effectively improved, and the corresponding failure mode effects and diagnostic analysis (FMEDA) can be performed for this circuit. The functional safety development platform tool (Medini Analyze, which complies with the development process of ISO 26262) is used to perform functional safety analysis and evaluation (such as Figure 5 shown).

[0054] The evaluation results show that: through the above technical solution, the detection coverage of single-point failures of the QM chip current sampling circuit of the electronic parking brake system of this application reaches 97.26%, and the detection coverage of latent failures reaches 80.3%, which meets the diagnostic requirements of the functional safety level ASIL-B, that is, the low-safety-level QM driver chip 1 is used to successfully realize the current collection function that meets the ASIL-B level standard, which provides reliability and stability improvements for the parking systems of new energy vehicles and self-driving vehicles, which not only effectively reduces the probability of parking system failures, but also effectively reduces manufacturing costs.

[0055] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A QM chip current sampling circuit for an electronic parking brake system, characterized in that: include: A driving chip (1), the driving chip (1) comprising a driving module and a current acquisition module, the driving chip (1) being logically controlled by a controller; The driving chip (1) is connected to an H-bridge circuit (2) via a driving module, the H-bridge circuit (2) is connected to a caliper motor in the middle, and the driving module is used to control the motion state of the caliper motor; The driving chip (1) is connected to a first sampling circuit (3) and a first first-order filtering circuit (4) via a sampling module; the first sampling circuit (3) is used to collect a voltage difference and a stable voltage difference signal across the resistor and input the signal to a current collection module of the driving chip (1); and the first first-order filtering circuit (4) is used to stabilize the output signal; The H-bridge circuit (2) is connected to a monitoring circuit, the monitoring circuit comprising a second sampling circuit (5), a second first-order filter circuit (6) and a monitoring circuit control circuit (7), the second sampling circuit (5) being used to collect current from the monitoring circuit, and the current collection module of the driver chip (1) is monitored by comparing the current collected by the second sampling circuit (5) with the current collection module of the driver chip (1).

2. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The driving module of the driving chip (1) is provided with four level output interfaces GH1, GH2, GL1 and GL2. The driving chip (1) controls the H-bridge circuit (2) via the level output interfaces of the driving module. The level output interface GH1 is connected to the gate of the first MOS tube Q1, the level output interface GH2 is connected to the gate of the second MOS tube Q2, the level output interface GL1 is connected to the gate of the third MOS tube Q3, and the level output interface GL2 is connected to the gate of the fourth MOS tube Q4.

3. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The positive pole M+ of the caliper motor is connected between the first MOS tube Q1 and the third MOS tube Q3, the negative pole M- of the caliper motor is connected between the second MOS tube Q2 and the fourth MOS tube Q4, the interfaces GH1 and GL2 of the driving module output a high voltage to make the caliper motor rotate forward, and the interfaces GH2 and GL1 of the driving module output a high voltage to make the caliper motor rotate reversely.

4. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The H-bridge circuit (2) comprises a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3 and a fourth MOS transistor Q4, wherein the drains of the first MOS transistor Q1 and the second MOS transistor Q2 are connected in parallel to a first power supply VBAT, and the first power supply VBAT is used to supply power to the H-bridge circuit (2).

5. The electronic parking brake system QM chip current sampling circuit according to claim 4, characterized in that: The source of the first MOS transistor Q1 is connected to the drain of the third MOS transistor Q3 , the source of the second MOS transistor Q2 is connected to the drain of the fourth MOS transistor Q4 , and the source of the third MOS transistor Q3 is connected to the source of the fourth MOS transistor Q4 .

6. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The first sampling circuit (3) comprises a sampling resistor R1, a common mode capacitor C1, a differential mode capacitor C2 and a differential mode capacitor C3, the sampling resistor R1 and the common mode capacitor C1 are connected in parallel, and the sampling resistor R1 is connected to the source electrodes of the third MOS transistor Q3 and the fourth MOS transistor Q4 of the H-bridge circuit (2).

7. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The first first-order filter circuit (4) comprises a resistor R4 and a capacitor C7, the current acquisition module is connected to the first ADC output port of the controller via the resistor R4, and the capacitor C7 is connected in series with the resistor R4.

8. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The second sampling circuit (5) comprises a sampling resistor R2, a resistor R3, a common mode capacitor C4, a differential mode capacitor C5 and a differential mode capacitor C6, the sampling resistor R2 and the common mode capacitor C4 are connected in parallel, the sampling resistor R2 is connected to a second first-order filter circuit (6) via a high-side operational amplifier, the sampling resistor is connected to a second power supply VDD, and the second power supply VDD is used to power the entire current monitoring circuit.

9. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The second first-order filter circuit (6) comprises a resistor R5 and a capacitor C8. The second first-order filter circuit (6) is connected to the second ADC output port of the controller via the resistor R4. The capacitor C8 and the resistor R5 are connected in series.

10. The electronic parking brake system QM chip current sampling circuit according to claim 1, characterized in that: The monitoring circuit control circuit (7) comprises a fifth MOS transistor Q5, a current limiting resistor R6, a sixth transistor Q6 and a seventh transistor Q7, wherein the fifth MOS transistor Q5 is connected to the collector of the sixth transistor Q6 via the current limiting resistor R6, the base of the sixth transistor Q6 is connected to the collector of the seventh transistor Q7, the base of the seventh transistor Q7 is connected to an IO port of a controller, and the emitter of the sixth transistor Q6 is connected to a third power supply VCC, wherein the third power supply VCC is used to supply power to the monitoring circuit control circuit (7).

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