Double-sided heat dissipation packaging structure
By designing a double-sided heat dissipation channel in the package structure, using the combination of conductive dielectric members and metal layers, the shortcomings in the existing package structure in terms of heat dissipation effect and cost control are solved, and more efficient heat dissipation and cost savings are achieved.
Patent Information
- Application Number
- CN202421168864.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-27
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2034-05-27
AI Technical Summary
The existing packaging structure has shortcomings in thermal dissipation effect and cost control, resulting in difficulties in chip temperature management and affecting performance and reliability.
Using a double-sided heat dissipation package structure, by printing a conductive material layer on the metal substrate frame and mounting a chip thereon, the bending design of the conductive dielectric member and the leakage of the metal layer are used to form a heat dissipation channel on the upper and lower surfaces to improve the heat dissipation efficiency.
It achieves more efficient heat dissipation, reduces chip temperature, improves product reliability and performance, and reduces production costs.
Smart Images
Figure CN222562683U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of integrated circuit manufacturing, in particular to a double-sided heat dissipation packaging structure. Background Art
[0002] The integration of the IOT era and the AI era has given birth to an efficient social form, and scientific innovation is always the helmsman leading the trend of the times. Electronic information technology has penetrated into many fields such as industrial electronics, automotive electronics, and smart homes, and has deduced the route of the emerging era through big data statistics and computing power systems. In order to achieve efficient and accurate data statistics and deductions, thereby promoting the update and iteration of computing power chips, it has higher power consumption requirements for high-power and high-current working conditions. If the accumulated heat cannot be dissipated in time to ensure that the chip temperature is below the safe temperature, the chip's operating performance will be affected at the least, and it will be directly burned and paralyzed at the worst, which seriously restricts the rapid development of high-performance computing power systems.
[0003] The current mainstream packaging and heat dissipation solutions in the industry are:
[0004] An additional metal heat dissipation component carrier is added to the top of the chip and thinned after plastic packaging to ensure the leakage of the metal heat dissipation component. At the same time, a heat dissipation channel of the top heat dissipation component is established through the bonding interface at the bottom of the top heat dissipation component.
[0005] The above structure has the following deficiencies:
[0006] A metal heat dissipation component carrier is added to the chip surface, and the non-functional area on the chip surface is limited, which cannot enhance the utilization of the functional area, and the chip heat dissipation interface cannot be maximized;
[0007] It is necessary to first plastic seal and then thin it to ensure that the metal heat dissipation component carrier is exposed, which increases the plastic seal grinding process and makes the packaging process more complicated;
[0008] Adding the combination and welding of the heat dissipation component on the top of the metal heat dissipation component carrier increases the packaging structure cost and the complexity of the packaging process. Utility Model Content
[0009] The current packaging process is complex, the overall cost is high, the heat dissipation channel is poor, and the temperature transfer of the chip itself cannot be improved. In view of the problem of heat dissipation, it is impossible to achieve higher current and higher voltage product application fields. The purpose of the utility model is to provide a comprehensive saving and improvement in product cost and heat dissipation effect.
[0010] A double-sided heat dissipation packaging structure.
[0011] It includes N metal substrate frames, N≥2;
[0012] The first conductive material layer is printed on the upper surfaces of the N metal substrate frames;
[0013] The upper surface of the first conductive material layer is mounted with a first chip;
[0014] A second conductive material layer is printed on the upper surface of the first chip;
[0015] The same first conductive medium component is mounted on the N second conductive material layers;
[0016] Any end of the first conductive medium member is bent downward;
[0017] In N metal substrate frames, the upper surfaces of the first conductive medium components located directly above A metal substrate frames are all printed with a third conductive material layer, and the upper surfaces of the third conductive material layers are all mounted with a second conductive medium component, wherein 1≤A<N;
[0018] The upper surface of each of the second conductive medium components is provided with a metal layer;
[0019] The entire internal component is covered with a plastic layer, and the lower surfaces of the N metal substrate frames, the upper surfaces of the A metal layers and the bent end of the first conductive medium component 5 are all exposed outside the plastic layer.
[0020] Optionally, the metal layer is connected to the upper surface of the second conductive medium component by copper plating, sputtering or electroplating.
[0021] Specifically, N is 2 and A is 1.
[0022] Preferably, a fourth conductive material layer is printed on the upper surface of the first conductive medium component directly above the metal substrate frame and not mounted with the second conductive medium component, a second chip is mounted on the fourth conductive material layer, and the second chip is electrically connected to the first conductive medium component through a welding wire.
[0023] Preferably, the first conductive medium component and the second conductive medium component are made of metal;
[0024] The first conductive material layer, the second conductive material layer, the third conductive material layer and the fourth conductive material layer are made of metal.
[0025] Specifically, the material of the metal layer is copper;
[0026] The entire internal component is wrapped with a plastic layer, and the lower surfaces of the N metal substrate frames are exposed to the outside. Another end of the second conductive medium component is protected by a film assistant mold (FAM) to ensure that the conductive / medium is exposed outside the plastic layer.
[0027] On the exposed surface of the conductive medium, a metal sputtering / copper plating process is used to achieve local surface metallization to realize the leakage of the conductive medium.
[0028] The electroplating process is adopted to achieve the effect of electroplating anti-oxidation metal layer by conducting current on the front metal and the back metal.
[0029] Compared with the prior art, the double-sided heat dissipation packaging structure of the utility model has the following advantages:
[0030] (1) Product cost: The heat dissipation layer is adopted to effectively replace the external heat sink structure commonly used in the industry, reduce costs and enhance competitive advantages;
[0031] (2) Heat dissipation effect: The upper and lower surfaces of the packaging structure are provided with heat dissipation channels, which directly expose the heat-conducting metal outside the plastic package. The metal area is enlarged to achieve the maximum area of welding of the rear-mounted heat sink, improve the heat dissipation transfer efficiency, and optimize the working speed of the chip;
[0032] (3) The current application of the packaging heat dissipation channels and process methods of this top heat dissipation structure is somewhat different from the existing solutions in the semiconductor packaging field. The overall heat dissipation industry still mainly achieves multi-functional heat dissipation by adding heat sinks or adding heat sinks on the top. The number of packaging heat dissipation channels can be increased to effectively transfer the temperature generated by the chip to the top heat dissipation channel, thereby reducing the impact of the chip junction temperature on the product itself. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 A schematic diagram of a double-sided heat dissipation packaging structure provided in Example 1;
[0034] Figure 2 This is a schematic diagram of the product after completing step B1 in Example 2;
[0035] Figure 3 This is a schematic diagram of the product after step B2 in Example 2 is completed;
[0036] Figure 4 This is a schematic diagram of the product after step B3 in Example 2 is completed;
[0037] Figure 5 This is a schematic diagram of the product after step B4 in Example 2 is completed;
[0038] Figure 6 This is a schematic diagram of the product after step B5 in Example 2 is completed;
[0039] Figure 7 The product after step B6 in Example 2 is completed Figure 1 ;
[0040] Figure 8The product after step B6 in Example 2 is completed Figure 2 ;
[0041] Fig. 9 This is a schematic diagram of the product after step B7 in Example 2 is completed;
[0042] Fig.10 This is a schematic diagram of the product after step B8 in Example 2 is completed.
[0043] Fig.11 This is a schematic diagram of the product after step B9 in Example 2 is completed. DETAILED DESCRIPTION
[0044] The specific implementation of the utility model is further described in detail below with reference to the accompanying drawings.
[0045] Example 1
[0046] In this embodiment, two metal substrate frames are taken as an example.
[0047] like Figure 1 As shown, a double-sided heat dissipation packaging structure of the utility model comprises two metal substrate frames 1; the upper surfaces of the two metal substrate frames 1 are both printed with a first conductive material layer 2; the upper surfaces of the first conductive material layer 2 are both mounted with a first chip 3; the upper surfaces of the first chip 3 are both printed with a second conductive material layer 4; the same first conductive medium component 5 is mounted on the two second conductive material layers 4; any end of the first conductive medium component 5 is bent downward; the upper surface of the first conductive medium component 5 directly above any metal substrate frame is printed with a third conductive material layer 6, and the upper surface of the third conductive material layer 6 is both mounted with a second conductive medium component 7; the upper surface of the second conductive medium component 7 is provided with a metal layer 12;
[0048] The entire internal component is covered with a plastic packaging layer 11 , and the lower surfaces of the two metal substrate frames 1 , the upper surface of a metal layer 12 , and a bent end of the first conductive medium component 5 are all exposed outside the plastic packaging layer 11 .
[0049] In this embodiment, the metal layer 12 is connected to the upper surface of the second conductive medium component 7 by copper plating, sputtering or electroplating.
[0050] In this embodiment, the upper surface of the first conductive medium component 5 directly above the metal substrate frame 1 and not mounted with the second conductive medium component 7 is printed with a fourth conductive material layer 8, and a second chip 9 is mounted on the fourth conductive material layer 8. The second chip 9 is electrically connected to the first conductive medium component 5 through a welding wire 10.
[0051] Specifically, in this embodiment, the first conductive medium component 5 and the second conductive medium component 7 are made of metal;
[0052] The first conductive material layer 2 , the second conductive material layer 4 , the third conductive material layer 6 and the fourth conductive material layer 8 are made of metal.
[0053] In this embodiment, the metal layer 12 is made of copper.
[0054] Example 2
[0055] A preparation process of a double-sided heat dissipation packaging structure comprises the following steps:
[0056] B1. Take N metal substrate frames 1 and print the first conductive material layer 2 on the upper surface thereof, where N is 1. Figure 2 ;
[0057] B2. Mounting the first chip 3 on the first conductive material layer 2, such as Figure 3 As shown;
[0058] B3, printing a second conductive material layer 4 on the upper surface of the first chip 3, such as Figure 4 As shown;
[0059] B4, the same first conductive medium component 5 is mounted on the second conductive material layer 4, and the third conductive material layer 6 is printed on the upper surface of the first conductive medium component 5 directly above any metal substrate frame, such as Figure 5 As shown;
[0060] B5. Mount the second conductive medium component 7 on the third conductive material layer 6. Figure 6 As shown;
[0061] B6, printing a fourth conductive material layer 8 on the area of the first conductive medium component 5 directly above the metal substrate frame where the second conductive medium component 7 is not mounted, and mounting a second chip 9 on the fourth conductive material layer 8, as shown in FIG. Figure 7 and Figure 8 As shown;
[0062] B7, realize electrical connection between the second chip 9 and the second conductive medium component 7 through the bonding wire 10, such as Fig. 9 As shown;
[0063] B8, on the internal component formed after step B7, plastic sealing is performed to form a plastic sealing layer 11 on the periphery of the internal component, and the lower surfaces of the N metal substrate frames 1 and one end of the second conductive medium component 7 are exposed outside the plastic sealing layer 11, such as Fig.10 As shown;
[0064] B9, a plurality of conductive / thermal conductive structures are uniformly exposed on the top of the plastic sealing layer 11 located directly above the first conductive medium component 7, and a copper plating / sputtering and electroplating process is adopted to increase and expand the metal layer 12, such as Fig.11 shown.
[0065] In this embodiment, a laser opening or mechanical drilling process is adopted to evenly expose a number of conductive / thermal conductive structures on the top of the plastic packaging layer 11 located directly above the first conductive medium component 7, and copper plating / sputtering and electroplating processes are adopted to increase and expand the metal layer 12 to improve the thermal conductivity effect.
[0066] The plastic sealing layer 11 of the high heat dissipation plastic sealing material using the FAM process protects the internal product components and allows the metal terminals to leak out, while effectively isolating the influence of external water vapor and electrical interference, and copper plating / sputtering and electroplating processes are used to increase and expand the metal layer 12.
[0067] The preferred embodiments of the present invention have been specifically described above, but the present invention is not limited to the described embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention, and these equivalent modifications or substitutions are all within the scope defined by the claims of this application.
Claims
1. A double-sided heat dissipation packaging structure, characterized in that: It includes N metal substrate frames, N≥2; The first conductive material layer is printed on the upper surfaces of the N metal substrate frames; The upper surface of the first conductive material layer is mounted with a first chip; A second conductive material layer is printed on the upper surface of the first chip; The same first conductive medium component is mounted on the N second conductive material layers; Any end of the first conductive medium member is bent downward; In N metal substrate frames, the upper surfaces of the first conductive medium components located directly above A metal substrate frames are all printed with a third conductive material layer, and the upper surfaces of the third conductive material layers are all mounted with a second conductive medium component, wherein 1≤A<N; The upper surface of each of the second conductive medium components is provided with a metal layer; The entire internal component is covered with a plastic packaging layer, and the lower surfaces of the N metal substrate frames, the upper surfaces of the A metal layers and the bent end of the first conductive medium component are all exposed outside the plastic packaging layer.
2. A double-sided heat dissipation packaging structure as claimed in claim 1, characterized in that: The metal layer is connected to the upper surface of the second conductive medium component by copper plating, sputtering or electroplating.
3. A double-sided heat dissipation packaging structure as claimed in claim 1 or 2, characterized in that: N is 2 and A is 1.
4. A double-sided heat dissipation packaging structure as claimed in claim 1, characterized in that: A fourth conductive material layer is printed on the upper surface of the first conductive medium component directly above the metal substrate frame and not mounted with the second conductive medium component. A second chip is mounted on the fourth conductive material layer. The second chip is electrically connected to the first conductive medium component through a bonding wire.
5. A double-sided heat dissipation packaging structure as claimed in claim 4, characterized in that: The first conductive medium component and the second conductive medium component are made of metal; The first conductive material layer, the second conductive material layer, the third conductive material layer and the fourth conductive material layer are made of metal.
6. A double-sided heat dissipation packaging structure as claimed in claim 2, characterized in that: The material of the metal layer is copper.