Three-level resonant circuit based on pulse frequency modulation and pulse width modulation control

Abstract

The embodiment of the utility model discloses a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control. The circuit comprises N resonant circuits, the input side of the circuit is formed by connecting the N resonant circuits in parallel; the output side of the circuit is formed by connecting the N resonant circuits in series, and N is a positive integer; the circuit is controlled by pulse frequency modulation and pulse width modulation. Therefore, according to the scheme provided by the embodiment of the invention, the conversion efficiency is improved and the cost of a switching device is reduced by adopting a structure that the N resonant circuits are connected in parallel at the input side; the structure that the N resonant circuits are connected in series is adopted on the output side, the voltage stress of the diode is effectively reduced, a pulse frequency modulation and pulse width modulation type hybrid control mode is adopted for control, and the output voltage range of the resonant circuits is widened.

Description

Technical Field

[0001] The present application relates to the field of switching power supplies, and in particular to a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control. Background Art

[0002] With the development of high-voltage and high-power switching power supplies, how to balance the low cost, high efficiency and wide range of DC-DC has become a research focus. Since the input voltage in high-power scenarios generally comes from rectified three-phase AC, the input voltage of DC-DC generally reaches 800V, which increases the power cost. At the same time, high power will cause a lot of heat in the switching device, resulting in reduced power efficiency.

[0003] In recent years, LLC resonant circuits have been widely used in DC-DC conversion scenarios. However, in high-voltage and high-power scenarios, when the resonant frequency deviates, especially when the switching frequency is higher than the resonant frequency, the LLC loss will increase significantly, which is not conducive to high-power applications. In addition, traditional pulse frequency modulation control is difficult to further reduce the LLC output voltage, and when the switching frequency is high, the output voltage increases with the increase of the switching frequency, which increases the difficulty of control.

[0004] In summary, how to reduce the voltage stress of LLC switching devices and widen the output voltage range has become an urgent problem to be solved by those skilled in the art. Utility Model Content

[0005] The embodiment of the present application provides a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control, which can reduce the voltage stress of LLC switching devices and widen the output voltage range.

[0006] The present application provides a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control, the circuit comprising N resonant circuits;

[0007] The input side of the circuit is composed of the N resonant circuits connected in parallel; the output side of the circuit is composed of the N resonant circuits connected in series, where N is a positive integer;

[0008] The circuit is controlled by pulse frequency modulation and pulse width modulation.

[0009] Optionally, the resonant circuit includes an input capacitor, and the input capacitor includes a first DC capacitor and a second DC capacitor;

[0010] The positive electrode of the first DC capacitor is connected to the positive electrode of the input voltage, and the negative electrode of the second DC capacitor is connected to the negative electrode of the input voltage;

[0011] The negative electrode of the first DC capacitor is connected to the positive electrode of the second DC capacitor.

[0012] Optionally, the resonant circuit includes an inverter bridge arm, and the inverter bridge arm includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a third capacitor, a first diode, and a second diode;

[0013] The first field effect transistor, the second field effect transistor, the third field effect transistor and the fourth field effect transistor are connected in series in sequence;

[0014] The drain of the first field effect transistor is connected to the positive electrode of the input voltage, and the source of the fourth field effect transistor is connected to the negative electrode of the input voltage;

[0015] The positive electrode of the third capacitor is connected to the source electrode of the first field effect transistor, and the negative electrode of the third capacitor is connected to the drain electrode of the fourth field effect transistor;

[0016] The cathode of the first diode is connected to the source of the first field effect transistor, and the anode of the second diode is connected to the drain of the fourth field effect transistor; the cathodes of the anode of the first diode and the anode of the second diode are connected to the midpoint.

[0017] Optionally, the resonant circuit includes a resonant cavity, and the resonant cavity includes a resonant inductor, a resonant capacitor and a transformer;

[0018] The input end of the resonant cavity is connected to the source of the second field effect tube, and the output end of the resonant cavity is connected to the input end of the rectifier bridge.

[0019] Optionally, the resonant circuit includes a rectifier bridge, and the rectifier bridge includes a third diode, a fourth diode, a fifth diode and a sixth diode;

[0020] The connection point of the anode of the third diode and the cathode of the fourth diode is the first intersection; the connection point of the anode of the fifth diode and the cathode of the sixth diode is the second intersection; the first intersection and the second intersection are respectively connected to two points at the output end of the resonant cavity.

[0021] Optionally, the resonant circuit includes a load, and when N is 2, the load includes a fourth output capacitor, a fifth output capacitor and a resistor;

[0022] The positive electrode of the fourth output capacitor and the negative electrode of the fifth output capacitor are connected to both ends of the resistor, and the negative electrode of the fourth output capacitor and the positive electrode of the fifth output capacitor are connected.

[0023] Optionally, the first field effect transistor, the second field effect transistor, the third field effect transistor and the fourth field effect transistor are controlled to maintain a duty cycle of 50% by the pulse frequency modulation to adjust the voltage across the fourth output capacitor.

[0024] Optionally, controlling the resonant circuit by pulse frequency modulation and pulse width modulation includes:

[0025] When the switching frequency of the resonant circuit is lower than a preset switching frequency threshold, the resonant circuit is controlled by pulse frequency modulation;

[0026] When the resonant circuit reaches the preset switching frequency threshold, the resonant circuit is controlled by pulse width modulation.

[0027] Optionally, the circuit includes a driving circuit;

[0028] The driving circuit provides driving signals with a phase difference of 360° / N to the N resonant circuits respectively.

[0029] Optionally, a voltage stress of a switching device at an input end of the resonant circuit is half of an input voltage.

[0030] The embodiment of the present application discloses a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control. The circuit includes N resonant circuits; the input side of the circuit is composed of the N resonant circuits in parallel; the output side of the circuit is composed of the N resonant circuits in series, N is a positive integer; the circuit is controlled by pulse frequency modulation and pulse width modulation. It can be seen that, using the solution provided by the embodiment of the present application, the structure of N resonant circuits in parallel on the input side is used to improve the conversion efficiency and reduce the cost of switching devices; the structure of N resonant circuits in series on the output side is used to effectively reduce the diode voltage stress, and the hybrid control method of pulse frequency modulation and pulse width modulation is also used for control, which broadens the output voltage range of the resonant circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0032] Figure 1 A topological diagram of a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control provided by an embodiment of the utility model;

[0033] Figure 2 This is a schematic diagram of the working mode of each resonant circuit under pulse frequency modulation control in an embodiment of the utility model;

[0034] Figure 3 It is a schematic diagram of the working mode of each resonant circuit under pulse width modulation control in an embodiment of the utility model. DETAILED DESCRIPTION

[0035] The embodiment of the present application provides a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control, which can reduce the voltage stress of LLC switching devices and widen the output voltage range.

[0036] For ease of understanding, the application scenarios of the embodiments of the present application are first introduced.

[0037] With the development of high-voltage and high-power switching power supplies, how to balance the low cost, high efficiency and wide range of DC-DC has become a research focus. Since the input voltage in high-power scenarios generally comes from rectified three-phase AC, the input voltage of DC-DC generally reaches 800V, which increases the cost of the power supply. At the same time, high power will cause a lot of heat in the switching devices, resulting in reduced power supply efficiency. Finally, what kind of simple and feasible control method to use to widen the output voltage range and ensure high efficiency has also become an important challenge today.

[0038] In recent years, LLC has been widely used in DC-DC conversion scenarios, but it has the following problems in high voltage and high power scenarios:

[0039] (1) The voltage stress of the switching device on the input side of the traditional LLC is consistent with the input voltage. In the scenario of high-voltage input, the cost of the switching device is too high and its application is limited.

[0040] (2) When the frequency deviates from the resonant frequency, especially when the switching frequency is higher than the resonant frequency, the loss of LLC will increase significantly, which is not conducive to high-power applications.

[0041] (3) Traditional pulse frequency modulation (PFM) control is difficult to further reduce the LLC output voltage, and when the switching frequency is high, the output voltage increases with the increase of the switching frequency, which increases the difficulty of control.

[0042] In view of this, the purpose of the utility model is to provide a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control, using a multi-channel parallel mode and a three-level LLC technology on the input side to improve the conversion efficiency and reduce the cost of switching devices, and using an N-channel series structure on the output side to effectively reduce the diode voltage stress, so as to solve the problems of high cost, low power and poor performance of traditional LLC. The utility model also adopts a mixed control method of PFM and pulse width modulation (PWM), which broadens the output voltage range of LLC.

[0043] See also Figure 1 , which is a topological diagram of a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control provided in an embodiment of the present application. The three-level resonant circuit based on pulse frequency modulation and pulse width modulation control provided in an embodiment of the present application includes N LLC circuits, where N is a positive integer. The input side is connected in parallel to ensure that the input voltage of each circuit is U in The output side adopts the series connection mode to ensure that the output voltage of each channel is U out / N. At the same time, natural current sharing among multiple LLCs is achieved, reducing the complexity of control.

[0044] Each LLC in the embodiment of the present application is composed of an input capacitor, an inverter bridge arm, a resonant cavity, a rectifier bridge and a load.

[0045] The resonant circuit includes an input capacitor, which includes a first DC capacitor and a second DC capacitor; the positive electrode of the first DC capacitor is connected to the positive electrode of the input voltage, and the negative electrode of the second DC capacitor is connected to the input voltage U in the negative electrode of the first DC capacitor is connected to the positive electrode of the second DC capacitor.

[0046] The resonant circuit includes an inverter bridge arm, which includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a third capacitor, a first diode and a second diode; the first field effect transistor, the second field effect transistor, the third field effect transistor and the fourth field effect transistor are connected in series in sequence; the drain of the first field effect transistor is connected to the positive electrode of the input voltage, and the source of the fourth field effect transistor is connected to the negative electrode of the input voltage; the positive electrode of the third capacitor is connected to the source of the first field effect transistor, and the negative electrode of the third capacitor is connected to the drain of the fourth field effect transistor; the cathode of the first diode is connected to the source of the first field effect transistor, and the anode of the second diode is connected to the drain of the fourth field effect transistor; the anode of the first diode and the cathode of the anode of the second diode are connected to the midpoint.

[0047] The resonant circuit includes a rectifier bridge, which includes a third diode, a fourth diode, a fifth diode and a sixth diode; the connection point of the anode of the third diode and the cathode of the fourth diode is a first intersection; the connection point of the anode of the fifth diode and the cathode of the sixth diode is a second intersection; the first intersection and the second intersection are respectively connected to two points at the output end of the resonant cavity.

[0048] The resonant circuit includes a load, and when N is 2, the load includes a fourth output capacitor, a fifth output capacitor and a resistor; the positive electrode of the fourth output capacitor and the negative electrode of the fifth output capacitor are connected to both ends of the resistor, and the negative electrode of the fourth output capacitor and the positive electrode of the fifth output capacitor are connected.

[0049] Specifically, Figure 1 Take the top LLC circuit as an example. The input capacitor includes a first DC capacitor C1 and a second DC capacitor C2. The positive electrode of the first DC capacitor C1 is connected to the input voltage U in The positive electrode of the second DC capacitor C2 is connected to the input voltage U in The negative electrode of the first DC capacitor C1 and the positive electrode of the second DC capacitor C2 are connected to form a midpoint, which is clamped for the inverter bridge arm and is used to provide AC input for the resonant cavity.

[0050] The inverter bridge arm includes the first field effect transistor S1, the second field effect transistor S2, the third field effect transistor S3, the fourth field effect transistor S4, the third capacitor C3, the first diode D1 and the second diode D2. The four switch devices (i.e., field effect transistors) are connected end to end in sequence, and the drain of S1 is connected to the input voltage U in The positive electrode of S4 is connected to the input voltage U in The positive electrode of capacitor C3 is connected to the source of S1, and the negative electrode of capacitor C3 is connected to the drain of S4. C3 ensures that the sum of the drain-source voltage of S2 and S3 is always U in / 2. The cathode of D1 is connected to the source of S1, and the anode of D2 is connected to the drain of S4. The anode of D1 and the cathode of D2 are connected to the midpoint, which provides a clamping path for the field effect tube device in PWM mode to stabilize the voltage between its drain and source.

[0051] The resonant cavity includes the resonant inductor Lr and the resonant capacitor C r and transformer T. The input end of the resonant cavity is connected between the source of S2 (the source of S2 is connected to the drain of S3 =) and the intersection of D1 and D2, and the output of the resonant cavity is connected to the input end of the rectifier bridge.

[0052] The rectifier bridge includes a third diode D3, a fourth diode D4, a fifth diode D5 and a sixth diode D6. The anode of D3 (ie, the cathode of D4) and the anode of D5 (ie, the cathode of D6) are connected to two points of the output end of the resonant cavity.

[0053] The load consists of N output capacitors and resistor R o , see Figure 1 Includes 2-way LLC, namely Figure 1 The example N is 2, therefore, the embodiment of the present application Figure 1The load of the example includes a fourth output capacitor C4, a fifth output capacitor C5, and a resistor R o The positive electrode of the fourth output capacitor C4 and the negative electrode of the fifth output capacitor C5 are connected to the resistor R o The negative pole of C4 and the positive pole of C5 are connected together. C4 provides output filtering for the top LLC circuit, and C5 provides output filtering for the bottom LLC circuit. o Consumes all the energy provided by the two LLCs.

[0054] By adjusting the driving signal of the switching device, the output voltage can be controlled.

[0055] Taking the top LLC circuit as an example, S1, S2, S3 and S4 use PFM control to maintain a duty cycle of 50% (excluding dead time). By adjusting the pulse frequency, the voltage across C4 can be adjusted.

[0056] See also Figure 2 , which is a schematic diagram of the working mode of each resonant circuit under pulse frequency modulation control in an embodiment of the utility model, wherein i Lr is the current flowing through the resonant inductor L r The current, i Lm is the primary magnetizing inductance L flowing through transformer T m The current, u A for Figure 1 The voltage between point A and the midpoint, i D3 is the current flowing through D3, U gs14 is the driving signal of S1 and S4, U gs23 is the driving signal of S2 and S3. s / 2 The mode of a single-channel LLC is explained.

[0057] At time 0 to T1, the drive signals of S1 and S2 change from low to high, and S1 and S2 begin to conduct. Lr Changes in the shape of a sine wave, i Lm The slope rises. D3 and D6 are turned on, and energy is transferred from the primary side of transformer T to the secondary side of transformer T until time T1, i Lr and i Lm Equal, i D3 is equal to 0.

[0058] At the time T1-T2, the drive signals S1 and S2 are maintained high, and the energy is not transferred to the secondary side of the transformer T. D3, D4, D5, and D6 are all turned off, and L r , C r and L m The three devices resonate, i Lr and i Lm equal.

[0059] In T2~T s / 2, the drive signals of S1 and S2 change from high to low, i Lr and i Lm Basically remain unchanged, Lr The junction capacitance of S1 and S2 is charged until its voltage rises to U in / 2, discharge the junction capacitance of S3 and S4 until its voltage drops to 0 and turns on the body diodes of S3 and S4, and wait for the drive signal of S3 and S4 to change from low to high to realize soft switching.

[0060] When the LLC switching frequency reaches the maximum value, if the output voltage continues to be reduced, the switching frequency remains unchanged, the drive signals of S2 and S3 can be maintained, and the drive signals of S1 and S4 can be adjusted by PWM. The specific adjustment method is to make the opening time of S1 consistent with that of S2, and the opening time of S4 consistent with that of S3. The pulse widths of S1 and S4 are reduced, and the reduction amounts are the same. The greater the reduction amount of S1 relative to S2 and S4 relative to S3, the lower the LLC output voltage.

[0061] See also Figure 3 , which is a schematic diagram of the working mode of each resonant circuit under pulse width modulation control in an embodiment of the utility model, wherein i Lr is the current flowing through the resonant inductor L r The current, i Lm is the primary magnetizing inductance L flowing through transformer T m The current, u A for Figure 1 The voltage between point A and the midpoint, i D3 is the current flowing through D3, U gs1 is the driving signal of S1, U gs4 is the driving signal of S4, U gs2 is the driving signal of S2, U gs3 is the driving signal of S3. The following is the half cycle T s / 2 The mode of a single-channel LLC is explained.

[0062] At time 0 to T3, the drive signals of S1 and S2 change from low to high, and S1 and S2 begin to conduct. Lr Changes in the shape of a sine wave, i Lm The slope rises. D3 and D6 are turned on, and energy is transferred from the primary side of transformer T to the secondary side of transformer T until time T3. Lr and i Lm equal.

[0063] At time T3-T4, the S1 drive signal changes from high to low, and D1 is turned on to maintain the drain-source voltage of S1 at U in / 2, so that the voltage at point A and the midpoint voltage (i.e. the voltage at the midpoint formed by the negative pole of C1 and the positive pole of C2) are consistent. Energy continues to transfer from the primary side of transformer T to the secondary side, i Lm The slope continues to rise, but due to the decrease in the inductor voltage, i Lr Rapidly descend until time T4 Lr and i Lm The two are equal, i D3 is equal to 0.

[0064] At time T4-T5, energy is no longer transferred from the primary side of transformer T to the secondary side. D3 =0, D3, D4, D5 and D6 are turned off. r , C r and L m The three devices resonate, i Lr and i Lm equal.

[0065] In T5~T s / 2, the drive signals of S1 and S2 change from high to low, i Lr and i Lm Basically remain unchanged, Lr Charge the junction capacitance of S2 until its voltage rises to U in / 2, discharge the junction capacitance of S3 until its voltage drops to 0 and make the body diodes of S3 and S4 conduct, and wait for the drive signals of S3 and S4 to change from low to high to realize soft switching.

[0066] In one implementation of the embodiment of the present application, the driving circuit provides a driving signal with a phase difference of 360° / N for each LLC, so as to reduce the voltage ripple on the input side and improve the circuit efficiency.

[0067] In one implementation of the embodiment of the present application, the voltage stress of the switch device at the input side of the LLC circuit is U in / 2, which is half of the full-bridge and half-bridge LLC. Therefore, when the input side is high voltage, the three-level LLC can reduce the cost of switching devices.

[0068] In one implementation of the embodiment of the present application, the circuit adopts the form of output side series connection, and the voltage stress of the diode and output capacitor of each LLC is U out / N, reducing the cost of the circuit. In addition, each LLC can achieve natural current sharing without the need for additional control.

[0069] In one implementation of the embodiment of the present application, when the LLC switching frequency is lower than a preset switching frequency threshold, the LLC is controlled by PFM. When the LLC has reached the preset switching frequency threshold and needs to continue to reduce the output voltage, the LLC is controlled by PWM.

[0070] The embodiment of the present application discloses a three-level resonant circuit based on pulse frequency modulation and pulse width modulation control. The circuit includes N resonant circuits; the input side of the circuit is composed of the N resonant circuits in parallel; the output side of the circuit is composed of the N resonant circuits in series, N is a positive integer; the circuit is controlled by pulse frequency modulation and pulse width modulation. It can be seen that, using the solution provided by the embodiment of the present application, the structure of N resonant circuits in parallel on the input side is used to improve the conversion efficiency and reduce the cost of switching devices; the structure of N resonant circuits in series on the output side is used to effectively reduce the diode voltage stress, and the hybrid control method of pulse frequency modulation and pulse width modulation is also used for control, which broadens the output voltage range of the resonant circuit.

[0071] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0072] The above specific implementation methods further describe in detail the purpose, technical solutions and beneficial effects of the present utility model. It should be understood that the above are only specific implementation methods of the present utility model.

[0073] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A three-level resonant circuit based on pulse frequency modulation and pulse width modulation control, characterized in that: The circuit comprises N resonant circuits; The input side of the circuit is composed of the N resonant circuits connected in parallel; the output side of the circuit is composed of the N resonant circuits connected in series, where N is a positive integer; The circuit is controlled by pulse frequency modulation and pulse width modulation.

2. The circuit according to claim 1, characterized in that The resonant circuit includes an input capacitor, and the input capacitor includes a first DC capacitor and a second DC capacitor; The positive electrode of the first DC capacitor is connected to the positive electrode of the input voltage, and the negative electrode of the second DC capacitor is connected to the negative electrode of the input voltage; The negative electrode of the first DC capacitor is connected to the positive electrode of the second DC capacitor.

3. The circuit according to claim 2, characterized in that The resonant circuit comprises an inverter bridge arm, and the inverter bridge arm comprises a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a third capacitor, a first diode and a second diode; The first field effect transistor, the second field effect transistor, the third field effect transistor and the fourth field effect transistor are connected in series in sequence; The drain of the first field effect transistor is connected to the positive electrode of the input voltage, and the source of the fourth field effect transistor is connected to the negative electrode of the input voltage; The positive electrode of the third capacitor is connected to the source electrode of the first field effect transistor, and the negative electrode of the third capacitor is connected to the drain electrode of the fourth field effect transistor; The cathode of the first diode is connected to the source of the first field effect transistor, and the anode of the second diode is connected to the drain of the fourth field effect transistor; the cathodes of the anode of the first diode and the anode of the second diode are connected to the midpoint.

4. The circuit according to claim 3, characterized in that The resonant circuit includes a resonant cavity, and the resonant cavity includes a resonant inductor, a resonant capacitor and a transformer; The input end of the resonant cavity is connected to the source of the second field effect tube, and the output end of the resonant cavity is connected to the input end of the rectifier bridge.

5. The circuit according to claim 4, characterized in that The resonant circuit comprises a rectifier bridge, and the rectifier bridge comprises a third diode, a fourth diode, a fifth diode and a sixth diode; The connection point of the anode of the third diode and the cathode of the fourth diode is the first intersection; the connection point of the anode of the fifth diode and the cathode of the sixth diode is the second intersection; the first intersection and the second intersection are respectively connected to two points at the output end of the resonant cavity.

6. The circuit according to claim 5, characterized in that The resonant circuit includes a load, and when N is 2, the load includes a fourth output capacitor, a fifth output capacitor and a resistor; The positive electrode of the fourth output capacitor and the negative electrode of the fifth output capacitor are connected to both ends of the resistor, and the negative electrode of the fourth output capacitor and the positive electrode of the fifth output capacitor are connected.

7. The circuit according to claim 6, characterized in that The first field effect transistor, the second field effect transistor, the third field effect transistor and the fourth field effect transistor are controlled by the pulse frequency modulation to maintain a duty cycle of 50% so as to adjust the voltage across the fourth output capacitor.

8. The circuit according to claim 1, characterized in that The controlling of the resonant circuit by pulse frequency modulation and pulse width modulation comprises: When the switching frequency of the resonant circuit is lower than a preset switching frequency threshold, the resonant circuit is controlled by pulse frequency modulation; When the resonant circuit reaches the preset switching frequency threshold, the resonant circuit is controlled by pulse width modulation.

9. The circuit according to claim 1, characterized in that The circuit includes a driving circuit; The driving circuit provides driving signals with a phase difference of 360° / N to the N resonant circuits respectively.

10. The circuit according to claim 1, characterized in that The voltage stress of the switch device at the input end of the resonant circuit is half of the input voltage.

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