Curved surface display panel

Abstract

The utility model discloses a curved-surface display panel which comprises a curved-surface opposite substrate, a liquid crystal layer and a curved-surface array substrate, and the liquid crystal layer is arranged between the curved-surface opposite substrate and the curved-surface array substrate. The curved surface array substrate comprises a substrate, an organic filter layer, an organic flat layer, a common electrode layer, a thin film transistor, a passivation layer and a pixel electrode layer, the organic filter layer is arranged on the substrate; the organic flat layer is arranged on one surface, far away from the substrate, of the organic filter layer; the common electrode layer is arranged on the surface, away from the substrate, of the organic flat layer. The thin film transistor covers the common electrode layer and the thin film transistor; the pixel electrode layer is arranged on the surface, away from the substrate, of the passivation layer, and the pixel electrode layer is electrically connected with the thin film transistor. The organic filter layer is arranged on the substrate, and the organic flat layer is arranged on the surface, away from the substrate, of the organic filter layer, so that the distance between the pixel electrode layer and the common electrode layer can be reduced, and the problem that an electric field of driving liquid crystal of the curved-surface display panel is weakened is solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a curved display panel. Background Art

[0002] In order to realize the display of the curved display panel with FFS structure of the bottom common electrode, the curved display panel needs to adopt COA (Color-filter On Array) technology. Figure 1 and Figure 2 Conventional curved display panels using COA technology set the organic filter layer between the common electrode layer and the pixel electrode layer, thereby increasing the distance between the common electrode layer and the pixel electrode layer. On the one hand, this leads to a decrease in the storage capacitance Cst of the curved display panel, and on the other hand, it leads to a weakening of the electric field driving the liquid crystal. Utility Model Content

[0003] The embodiments of the present application provide a curved display panel to improve the problem of weakening of the electric field driving liquid crystal in the curved display panel.

[0004] In a first aspect, an embodiment of the present application provides a curved display panel, the curved display panel comprising a curved counter substrate, a liquid crystal layer and a curved array substrate, the liquid crystal layer being arranged between the curved counter substrate and the curved array substrate, wherein the curved array substrate comprises:

[0005] substrate;

[0006] An organic filter layer, wherein the organic filter layer is disposed on the substrate;

[0007] An organic flat layer, the organic flat layer being disposed on a surface of the organic filter layer away from the substrate;

[0008] A common electrode layer, the common electrode layer being disposed on a surface of the organic planar layer away from the substrate;

[0009] A thin film transistor, wherein the thin film transistor is disposed on a surface of the organic planar layer away from the substrate;

[0010] a passivation layer, the passivation layer covering the common electrode layer and the thin film transistor;

[0011] A pixel electrode layer is disposed on a surface of the passivation layer away from the substrate, and the pixel electrode layer is electrically connected to the thin film transistor.

[0012] Furthermore, the thin film transistor includes a gate metal layer and a gate insulating layer, the gate metal layer is arranged on a surface of the organic flat layer away from the substrate, the gate insulating layer is arranged on a surface of the organic flat layer away from the substrate, and the gate insulating layer covers the gate metal layer and the common electrode layer, and the passivation layer is arranged on the gate insulating layer.

[0013] Furthermore, the curved display panel further includes an inorganic layer, and the inorganic layer is located between the gate metal layer and the organic planar layer.

[0014] Furthermore, a first groove is provided on the organic planar layer, and a part of the inorganic layer fills the first groove.

[0015] Furthermore, a second groove is provided on the filter layer, and a part of the organic planar layer fills the second groove.

[0016] Furthermore, the second groove is directly opposite to the first groove.

[0017] Furthermore, the second groove is offset from the first groove.

[0018] Furthermore, the size of the opening of the first groove is larger than the size of the bottom of the first groove.

[0019] Furthermore, the organic planar layer is provided with a protrusion, and the inorganic layer covers the protrusion.

[0020] Furthermore, the curved display panel further includes a buffer layer, and the buffer layer is arranged between the substrate and the organic filter layer.

[0021] Beneficial effects of this application:

[0022] The present application provides a curved display panel, comprising a substrate, an organic filter layer, an organic flat layer, a common electrode layer, a thin film transistor, a passivation layer and a pixel electrode layer; the organic filter layer is arranged on the substrate; the organic flat layer is arranged on a surface of the organic filter layer away from the substrate; the common electrode layer is arranged on a surface of the organic flat layer away from the substrate; the thin film transistor is arranged on a surface of the organic flat layer away from the substrate; the passivation layer is arranged on a surface of the common electrode layer away from the substrate, and the passivation layer covers the thin film transistor; the pixel electrode layer is arranged on a surface of the passivation layer away from the substrate, and the pixel electrode layer is electrically connected to the thin film transistor. By arranging the organic filter layer on the substrate and the organic flat layer on a surface of the organic filter layer away from the substrate, the distance between the pixel electrode layer and the common electrode layer can be reduced, which can improve the problem of reduced storage capacitance of the curved display panel on the one hand, and can also improve the problem of weakened electric field driving liquid crystal on the other hand. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a schematic diagram of a display panel with a conventional FFS structure of a bottom common electrode;

[0024] Figure 2 is a schematic diagram of a curved display panel with a conventional FFS structure of a bottom common electrode;

[0025] Figure 3 is a schematic diagram of a curved display panel of the first structure in the present application;

[0026] Figure 4 is a schematic diagram of a curved display panel of the second structure in the present application;

[0027] Figure 5 is a schematic diagram of a curved display panel of the third structure in the present application;

[0028] Figure 6 yes Figure 5 A schematic diagram of an embodiment in which a first groove is provided on the organic flat layer of the curved display panel shown;

[0029] Figure 7 yes Figure 5 The schematic diagram of an embodiment in which protrusions are arranged on the organic flat layer of the curved display panel is shown.

[0030] 100-substrate; 200-organic filter layer; 300-organic flat layer, 310-protrusion, 320-first groove; 400-common electrode layer; 500-thin film transistor, 510-gate metal layer, 520-gate insulating layer, 530-active part, 540-source and drain part, 550-via; 600-passivation layer; 700-pixel electrode layer; 800-inorganic layer; 900-buffer layer; 1000-first metal conductive layer. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The technical solutions described below are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0032] In addition, the terms "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0033] Multiple embodiments of the present application are similar, and different embodiments can be combined with each other.

[0034] In order to realize the display of the curved display panel with FFS structure of the bottom common electrode, the curved display panel needs to adopt COA (Color-filter On Array) technology. Figure 1 and Figure 2 Conventional curved display panels using COA technology set the organic filter layer between the common electrode layer and the pixel electrode layer, thereby increasing the distance between the common electrode layer and the pixel electrode layer. On the one hand, this leads to a decrease in the storage capacitance Cst of the curved display panel, and on the other hand, it leads to a weakening of the electric field driving the liquid crystal.

[0035] Therefore, an embodiment of the present application provides a curved display panel, which includes a curved surface opposing substrate, a liquid crystal layer and a curved surface array substrate, wherein the liquid crystal layer is arranged between the curved surface opposing substrate and the curved surface array substrate. Figure 3The curved array substrate includes a substrate 100, an organic filter layer 200, an organic flat layer 300, a common electrode layer 400, a thin film transistor 500, a passivation layer 600 and a pixel electrode layer 700; the organic filter layer 200 is disposed on the substrate 100; the organic flat layer 300 is disposed on a surface of the organic filter layer 200 away from the substrate 100; the common electrode layer 400 is disposed on a surface of the organic flat layer 300 away from the substrate 100; the thin film transistor 500 is disposed on a surface of the organic flat layer 300 away from the substrate 100; the passivation layer 600 covers the common electrode layer 400 and the thin film transistor 500; the pixel electrode layer 700 is disposed on a surface of the passivation layer 600 away from the substrate 100, and the pixel electrode layer 700 is electrically connected to the thin film transistor 500.

[0036] By disposing the organic filter layer 200 on the substrate 100 and the organic planar layer 300 on a surface of the organic filter layer 200 away from the substrate 100, the distance between the pixel electrode layer 700 and the common electrode layer 400 can be reduced. On the one hand, the storage capacitance of the curved display panel can be reduced, and on the other hand, the problem of the weakening of the electric field driving the liquid crystal can be improved.

[0037] In this embodiment, the substrate 100 is made of glass.

[0038] In this embodiment, the material of the organic planar layer 300 is a polyperfluoropropylene film layer.

[0039] In this embodiment, the organic filter layer 200 includes one of polyimide, polycarbonate, polystyrene, and acrylic resin.

[0040] refer to Figure 4 In this embodiment, the curved display panel further includes a buffer layer 900, and the buffer layer 900 is disposed between the substrate 100 and the organic filter layer 200. Since the contact between the organic filter layer 200 and the substrate 100 is poor, and the contact between the buffer layer 900 is located between the substrate 100 and the organic filter layer 200, the curved display panel further includes a buffer layer 900, and the buffer layer 900 is disposed between the substrate 100 and the organic filter layer 200, so that the organic filter layer 200 can be stably connected to the substrate 100 through the buffer layer 900.

[0041] In this embodiment, the material of the buffer layer 900 is SINx.

[0042] In this embodiment, the thin film transistor 500 includes a gate metal layer 510 and a gate insulating layer 520. The gate metal layer 510 is disposed on a surface of the organic planarizing layer 300 away from the substrate 100. The gate insulating layer 520 is disposed on a surface of the organic planarizing layer 300 away from the substrate 100. The gate insulating layer 520 covers the gate metal layer 510 and the common electrode layer 400. The passivation layer 600 is disposed on the gate insulating layer 520.

[0043] In this embodiment, the thin film transistor 500 also includes an active portion 530 and a source-drain portion 540, wherein the active portion 530 is disposed on a surface of the gate insulating layer 520 away from the substrate 100, and the source-drain portion 540 is disposed on a surface of the active portion 530 away from the substrate 100, wherein the pixel electrode layer 700 is electrically connected to the source-drain portion 540 through a via 550 that penetrates the film layer between the pixel electrode layer 700 and the source-drain portion 540.

[0044] In this embodiment, the curved display panel further includes a first metal conductive layer 1000 . The first metal conductive layer 1000 is disposed on a surface of the common electrode layer 400 away from the substrate 100 , wherein the gate insulating layer 520 covers the first metal conductive layer.

[0045] In this embodiment, the first metal conductive layer 1000 is located at the edge of the common electrode layer 400 .

[0046] refer to Figure 5 In this embodiment, the curved display panel further includes an inorganic layer 800, and the inorganic layer 800 is located between the gate metal layer 510 and the organic flat layer 300. Since the contact property of the inorganic layer 800 is located between the organic flat layer 300 and the gate metal layer 510, by setting the curved display panel to further include the inorganic layer 800, and the inorganic layer 800 is located between the gate metal layer 510 and the organic flat layer 300, the adhesion between the gate metal layer 510 and the organic flat layer 300 can be increased, thereby improving the working stability of the thin film transistor 500.

[0047] refer to Figure 6 In this embodiment, since the organic planar layer 300 is an organic film layer and the inorganic layer 800 is an inorganic film layer, the elastic coefficient and expansion coefficient of the organic film layer and the inorganic film layer are greatly different, so that the contact between the organic planar layer 300 and the inorganic layer 800 is poor. Therefore, a first groove 320 is provided on the organic planar layer 300, and a part of the inorganic layer 800 fills the first groove 320, which can increase the contact area between the organic planar layer 300 and the inorganic layer 800, absorb the stress between the organic planar layer 300 and the inorganic layer 800, and thus improve the peeling problem between the organic planar layer 300 and the inorganic layer 800.

[0048] In this embodiment, the sidewall of the first groove 320 is an arc-shaped surface, and the center of curvature of the arc-shaped surface is located on the same side as the inorganic layer 800 .

[0049] In this embodiment, the sidewall of the first groove 320 is an arc-shaped surface, and the center of curvature of the arc-shaped surface and the inorganic layer 800 are located on different sides.

[0050] In this embodiment, a second groove is disposed on the filter layer 200 , and a portion of the organic planar layer 300 fills the second groove.

[0051] In this embodiment, the second groove is directly opposite to the first groove 320 .

[0052] In this embodiment, the second groove is offset from the first groove 320 .

[0053] In this embodiment, the size of the opening of the first groove 320 is larger than the size of the bottom of the first groove 320 .

[0054] refer to Figure 7 In this embodiment, since the organic planar layer 300 is an organic film layer and the inorganic layer 800 is an inorganic film layer, the elastic coefficient and expansion coefficient of the organic film layer and the inorganic film layer are greatly different, so that the contact between the organic planar layer 300 and the inorganic layer 800 is poor. Therefore, the protrusion 310 is provided on the organic planar layer 300, and the inorganic layer 800 covers the protrusion 310, which can increase the contact area between the organic planar layer 300 and the inorganic layer 800, absorb the stress between the organic planar layer 300 and the inorganic layer 800, and thus improve the peeling problem between the organic planar layer 300 and the inorganic layer 800.

[0055] In this embodiment, the sidewall of the protrusion 310 is an arc-shaped surface, and the center of curvature of the arc-shaped surface is located on the same side as the inorganic layer 800 .

[0056] In this embodiment, the sidewall of the protrusion 310 is an arc-shaped surface, and the center of curvature of the arc-shaped surface and the inorganic layer 800 are located on different sides.

[0057] Preparation method of curved display panel:

[0058] First, a substrate 100 is provided;

[0059] A buffer layer 900 is formed on the substrate 100;

[0060] An organic filter layer 200 is formed on the buffer layer 900;

[0061] An organic flat layer 300 is formed on the organic filter layer 200;

[0062] Forming an inorganic layer 800 on the organic planar layer 300;

[0063] A common electrode layer 400 and a gate metal layer 510 are formed on the inorganic layer 800 , and the common electrode layer 400 is located on one side of the gate metal layer 510 ;

[0064] A first metal conductive layer 1000 is formed on the common electrode layer 400;

[0065] A gate insulating layer 520 is formed on the inorganic layer 800 , and the gate insulating layer 520 covers the gate metal layer 510 , the first metal conductive layer 1000 and the common electrode layer 400 ;

[0066] A semiconductor layer is formed on the gate insulating layer 520 , wherein the semiconductor layer includes an active portion 530 ;

[0067] A second metal conductive layer is formed on the semiconductor layer, wherein the second metal conductive layer includes a source-drain portion 540;

[0068] Forming a passivation layer 600 on the gate insulating layer 520, and making the passivation layer 600 cover the second metal conductive layer;

[0069] Making a via hole 550 on the passivation layer 600 and passing the via hole 550 through the passivation layer 600;

[0070] A pixel electrode layer 700 is formed on the passivation layer 600 , and the pixel electrode layer 700 is electrically connected to the source / drain portion 540 of the second metal conductive layer through the via hole 550 .

[0071] The technical solution of this application is specifically as follows:

[0072] Since the organic filter layer 200 of the conventional curved display panel using COA technology is arranged between the common electrode layer 400 and the pixel electrode layer 700, the distance between the common electrode layer 400 and the pixel electrode layer 700 is increased, which on the one hand leads to a decrease in the storage capacitance of the curved display panel, and on the other hand leads to a decrease in the magnitude of the electric field driving the liquid crystal. Therefore, in the curved display panel of the present application, the organic filter layer 200 is arranged below the common electrode layer 400, which will neither affect the storage capacitance between the common electrode layer 400 and the pixel electrode layer 700 nor affect the driving of the liquid crystal by the electric field; and in order to improve the contact between the organic filter layer 200 and the glass substrate 100, a buffer layer is first deposited on the glass substrate 100, and then the organic filter layer 200 is deposited on the glass substrate 100; finally, in order to improve the problem of poor contact between the organic flat layer 300 and the inorganic layer 800, a first groove 320 is arranged on the organic flat layer 300, and the inorganic layer 800 fills the first groove 320, or a protrusion 310 is arranged on the organic flat layer 300, and the inorganic layer 800 covers the protrusion 310, which can increase the contact area between the organic flat layer 300 and the inorganic layer 800, absorb the stress between the organic flat layer 300 and the inorganic layer 800, and thus improve the peeling problem between the organic flat layer 300 and the inorganic layer 800.

[0073] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. A curved display panel, characterized in that: The curved display panel comprises a curved surface counter substrate, a liquid crystal layer and a curved surface array substrate, wherein the liquid crystal layer is arranged between the curved surface counter substrate and the curved surface array substrate, wherein the curved surface array substrate comprises: substrate; An organic filter layer, wherein the organic filter layer is disposed on the substrate; An organic flat layer, the organic flat layer being disposed on a surface of the organic filter layer away from the substrate; A common electrode layer, the common electrode layer being disposed on a surface of the organic planar layer away from the substrate; A thin film transistor, wherein the thin film transistor is disposed on a surface of the organic planar layer away from the substrate; a passivation layer, the passivation layer covering the common electrode layer and the thin film transistor; A pixel electrode layer is disposed on a surface of the passivation layer away from the substrate, and the pixel electrode layer is electrically connected to the thin film transistor.

2. The curved display panel according to claim 1, characterized in that: The thin film transistor includes a gate metal layer and a gate insulating layer, the gate metal layer is arranged on a surface of the organic flat layer away from the substrate, the gate insulating layer is arranged on a surface of the organic flat layer away from the substrate, and the gate insulating layer covers the gate metal layer and the common electrode layer, and the passivation layer is arranged on the gate insulating layer.

3. The curved display panel according to claim 2, characterized in that: The curved display panel further includes an inorganic layer, and the inorganic layer is located between the gate metal layer and the organic planar layer.

4. The curved display panel according to claim 3, characterized in that: A first groove is provided on the organic planar layer, and a portion of the inorganic layer fills the first groove.

5. The curved display panel according to claim 4, characterized in that: A second groove is provided on the filter layer, and a part of the organic planar layer fills the second groove.

6. The curved display panel according to claim 5, characterized in that: The second groove is directly opposite to the first groove.

7. The curved display panel according to claim 5, characterized in that: The second groove is offset from the first groove.

8. The curved display panel according to claim 4, characterized in that: The size of the opening of the first groove is larger than the size of the bottom of the first groove.

9. The curved display panel according to claim 3, characterized in that: The organic flat layer is provided with protrusions, and the inorganic layer covers the protrusions.

10. The curved display panel according to claim 1, characterized in that: The curved display panel further comprises a buffer layer, and the buffer layer is arranged between the substrate and the organic filter layer.

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