Comparator and oscillating circuit
By designing the first protection module in the comparator and using natural field effect transistors and multiplexer for buck output, the problem of component damage in the face of unexpected overvoltage or instantaneous voltage spikes is solved, and effective protection of sensitive components is achieved.
Patent Information
- Application Number
- CN202421159482.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-24
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2034-05-24
AI Technical Summary
In the face of unexpected overvoltage or instantaneous voltage spikes, sensitive semiconductor components are susceptible to damage, resulting in latch phenomenon and output signal saturation or distortion.
A comparator is designed, including a first protection module and a comparison module. The first protection module detects and reduces the output according to the voltage value of the input signal through a natural field effect transistor and a multiplexer to prevent overvoltage damage.
It effectively protects the sensitive semiconductor components inside the comparator, prevents damage caused by accidental overvoltage or instantaneous voltage spikes, and avoids latch phenomenon and saturation or distortion of the output signal.
Smart Images
Figure CN222582403U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of electronic engineering and circuit design, in particular to a comparator and an oscillating circuit. Background Art
[0002] A comparator is an electronic component whose basic function is to compare the size of two voltage or current signals and output a binary signal (usually a high level or a low level) based on the comparison result. The core working principle of the comparator is to compare two input signals (non-inverting input and inverting input). When the voltage at the non-inverting input is higher than the voltage at the inverting input, the output is a high level; conversely, when the voltage at the inverting input is higher than the voltage at the non-inverting input, the output is a low level.
[0003] As a key electronic component, the performance of the comparator depends largely on the sensitivity of the components used inside. Comparators require very sensitive components that can quickly and accurately detect and respond to tiny input voltage differences. To achieve this goal, high-precision, low-noise, and fast-response semiconductor components such as transistors, MOSFETs, diodes, and precision resistors are usually used inside the comparator. The high input impedance of these components helps to reduce the load effect on the previous circuit and maintain the integrity of the signal. At the same time, their temperature stability ensures that the comparator can provide consistent performance under different environmental conditions. In addition, in order to further improve the sensitivity and response speed of the comparator, designers will also use special processes and technologies to optimize the performance of these components, so that the comparator can achieve accurate voltage comparison and fast logic judgment in various applications.
[0004] However, when faced with unexpected overvoltage or instantaneous voltage spikes, the sensitive semiconductor components inside the comparator are easily damaged and may cause latch-up, which ultimately leads to saturation or distortion of the output signal. In order to ensure the stability, reliability and safety of the entire circuit system, while also helping to extend the service life of the comparator and meet specific design standards and application requirements, a new comparator is urgently needed to protect the sensitive semiconductor components inside the comparator.
[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present application. Utility Model Content
[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a comparator and an oscillation circuit for solving the problems in the prior art that when faced with unexpected overvoltage or instantaneous voltage spikes, the sensitive semiconductor components inside the comparator are easily damaged and may cause latch-up phenomena.
[0007] To achieve the above-mentioned object and other related objects, the utility model provides a comparator, comprising: a first protection module and a comparison module;
[0008] The first end of the first protection module is connected to P first input signals, the second end is connected to the first power supply voltage, and the third end is connected to the first input end of the comparison module, and the voltage value of the first input signal is detected based on the first power supply voltage; when the voltage value of the first input signal is less than or equal to the first power supply voltage, the first input signal is input to the comparison module; when the voltage value of the first input signal is higher than the first power supply voltage, the resistance of the first protection module is increased to reduce the voltage of the first input signal and output it to the comparison module; p is an integer greater than or equal to 1;
[0009] The second input terminal of the comparison module is connected to a preset reference voltage, and the output signal of the overvoltage protection module is compared based on the reference voltage to obtain a comparison result.
[0010] Optionally, the comparison module includes an input unit and an output unit; the first input end of the input unit is connected to the first protection module, and the second input end is connected to the preset reference voltage to differentially amplify the output signal of the first protection module and the preset reference voltage; the output unit is connected to the output end of the input unit, and is used to amplify and output the differentially amplified signal again.
[0011] Optionally, the input unit includes a first PMOS tube, a second PMOS tube, a first NMOS tube, a second NMOS tube and a third NMOS tube; the sources of the first PMOS tube and the second PMOS tube are both connected to the power supply voltage; the drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the gate is connected to the drain; the drain of the second PMOS tube is connected to the drain of the second NMOS tube, and the gate is connected to the gate of the first PMOS tube; the source of the first NMOS tube is connected to the drain of the third NMOS tube, and the gate is connected to the output end of the first protection module; the source of the second NMOS tube is connected to the drain of the third NMOS tube, and the gate is connected to the preset reference voltage; and the drain of the second NMOS tube serves as the output end of the input unit; the source of the third NMOS tube is grounded, and the gate is connected to the bias voltage.
[0012] Optionally, the output unit includes a third PMOS tube, a fourth NMOS tube and a capacitor; the source of the third PMOS tube is connected to the power supply voltage, the gate receives the output end connected to the input unit, and the drain is connected to the drain of the fourth NMOS tube; the source of the fourth NMOS tube is grounded, the gate is connected to the bias voltage, and the drain serves as the output end of the output unit; the first plate of the capacitor is connected to the drain of the fourth NMOS tube, and the second plate is grounded.
[0013] Optionally, the comparator further includes a pull-up resistor; a first end of the pull-up resistor is connected to the output end of the comparator, and a second end of the pull-up resistor is connected to a third supply voltage.
[0014] Optionally, the first protection module includes P natural field effect transistors and a first multiplexer; each natural field effect transistor is arranged in one-to-one correspondence with each first input signal; wherein the gate of each natural field effect transistor is connected to the first supply voltage; the source of each natural field effect transistor is connected to the corresponding first input signal, and the drain is connected to P input terminals of the first multiplexer; the control terminal of the first multiplexer receives a selection signal, and the output terminal is connected to the first input terminal of the comparison module, and the corresponding input terminal is turned on based on the selection signal, and the signal input by the input terminal is output to the comparison module.
[0015] Optionally, the comparator also includes a second protection module arranged at the second input end of the comparison module; the second end of the second protection module is connected to Q second input signals, the second end is connected to the second power supply voltage, and the third end outputs a preset reference voltage, and the voltage value of the second input signal is detected based on the second power supply voltage; when the voltage value of the second input signal is less than or equal to the second power supply voltage, the second input signal is input to the comparison module as the preset reference voltage; when the voltage value of the second input signal is higher than the second power supply voltage, the resistance of the second protection module is increased to reduce the voltage of the second input signal and output it to the comparison module as a preset reference voltage; Q is an integer greater than or equal to 1.
[0016] Optionally, the second protection module includes Q natural field effect transistors and a second multiplexer;
[0017] Each natural field effect transistor is arranged in one-to-one correspondence with each second input signal; wherein the gate of each natural field effect transistor is connected to the second power supply voltage; the source of each natural field effect transistor is connected to the corresponding second input signal, and the drain is connected to Q input terminals of the second multiplexer;
[0018] The control end of the second multiplexer receives a selection signal, the output end is connected to the second input end of the comparison module, the corresponding input end is turned on based on the selection signal, and the signal input from the input end is output to the comparison module.
[0019] To achieve the above object and other related objects, the utility model provides an oscillation circuit including the above comparator.
[0020] As described above, a comparator and an oscillator circuit of the utility model have the following beneficial effects:
[0021] The comparator and oscillation circuit of the utility model are provided with a natural field effect transistor at the input end of the comparator for overvoltage protection. On the one hand, the gate-source voltage of the natural field effect transistor is used to control the on-off relationship to control the signal input and output. On the other hand, the gate-source voltage of the natural field effect transistor is used to control the working area of the natural field effect transistor, so that the amplitude of the output voltage can be changed by changing the internal resistance, thereby solving the problem that the sensitive semiconductor components inside the comparator are easily damaged and the latch phenomenon may be caused when facing unexpected overvoltage or instantaneous voltage spikes.
[0022] At the same time, the comparator and oscillation circuit of the utility model have simple structures and can effectively save the layout area. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 Shown is a schematic diagram of the framework of the comparator of the present invention.
[0024] Figure 2 Shown is a structural schematic diagram of the comparison module of the present utility model.
[0025] Figure 3 Shown is a structural schematic diagram of a comparator of the utility model.
[0026] Figure 4 Displayed is a voltage variation diagram of the input signal of the present invention.
[0027] Component number description
[0028] 1 Comparator
[0029] 11. First protection module
[0030] 111 Natural Field Effect Transistor
[0031] 112 First multiplexer
[0032] 12 Comparison Module
[0033] 121 Input unit
[0034] 122 Output Units
[0035] 13 Second protection module
[0036] 131 Natural Field Effect Transistor
[0037] 132 Second multiplexer
[0038] 133 Common mode voltage generating unit DETAILED DESCRIPTION
[0039] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0040] See also Figure 1 to Figure 4 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the utility model in a schematic manner, and the drawings only show the components related to the utility model rather than the number, shape and size of the components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0041] Example
[0042] like Figure 1 As shown, this embodiment provides a comparator 1 including: a first protection module 11 and a comparison module 12 .
[0043] like Figure 1 As shown, the first end of the first protection module 11 is connected to P first input signals Signal1, the second end is connected to the first power supply voltage AVDD1, and the third end is connected to the first input end of the comparison module 12, and the voltage value of the first input signal Signal1 is detected based on the first power supply voltage AVDD1; when the voltage value of the first input signal Signal1 is less than or equal to the first power supply voltage AVDD1, the first input signal Signal1 is input to the comparison module 12; when the voltage value of the first input signal Signal1 is higher than the first power supply voltage AVDD1, the resistance of the first protection module 11 is increased to reduce the voltage of the first input signal Signal1 and output it to the comparison module 12; p is an integer greater than or equal to 1.
[0044] Specifically, Figure 3 As shown, the first protection module 11 includes P natural field effect transistors 111 and a first multiplexer 112 .
[0045] As an example, each natural field effect transistor 111 is set in one-to-one correspondence with each first input signal Signal1; wherein, the gate of each natural field effect transistor 111 is connected to the first power supply voltage AVDD1; the source of each natural field effect transistor is connected to the corresponding first input signal Signal1, and the drain is connected to the P input terminals of the first multiplexer 112; the control terminal of the first multiplexer 112 receives a selection signal, and the output terminal is connected to the first input terminal of the comparison module 12, and the corresponding input terminal is turned on based on the selection signal, and the signal input at the input terminal is output to the comparison module 12.
[0046] It should be noted that the natural field effect transistor (NVT) is a semiconductor device that uses the electric field effect to control the flow of current. It usually consists of an insulating layer (such as silicon dioxide) and a gate. The current flow between the source and the drain is controlled by applying a voltage to the gate. NVT is particularly suitable for applications such as switching, amplification and signal processing in analog and digital circuits. Compared with traditional field effect transistors NVT, NVT has lower leakage current, higher switching speed and better thermal stability, making it play an important role in high-performance electronic systems. NVT is formed naturally without relying on external structures, which helps to simplify the manufacturing process and improve the reliability of the device.
[0047] like Figure 1 As shown, the second input terminal of the comparison module 12 is connected to a preset reference voltage VREF, and the output signal of the first protection module is compared based on the reference voltage VREF to obtain a comparison result.
[0048] Specifically, Figure 2 As shown, the comparison module 12 includes an input unit 121 and an output unit 122 .
[0049] As an example, the first input end of the input unit 121 is connected to the first protection module 11 (connected to the output signal of the first multiplexer 112 in this embodiment), and the second input end is connected to the preset reference voltage VREF to differentially amplify the output signal of the first protection module 11 and the preset reference voltage VREF; the output unit 122 is connected to the output end of the input unit 121, and is used to amplify and output the differentially amplified signal again.
[0050] In the present embodiment, the input unit 121 includes a first PMOS transistor MP1, a second PMOS transistor MP2, a first NMOS transistor MN1, a second NMOS transistor MN2 and a third NMOS transistor MN3; the sources of the first PMOS transistor MP1 and the second PMOS transistor MP2 are both connected to a power supply voltage (the third power supply voltage AVDD3 in the present embodiment); the drain of the first PMOS transistor MP1 is connected to the drain of the first NMOS transistor MN1, and the gate is connected to the drain; the drain of the second PMOS transistor MP2 is connected to the drain of the second NMOS transistor MN2, and the gate is connected to the gate of the first PMOS transistor MP1; the source of the first NMOS transistor MN1 is connected to the drain of the third NMOS transistor MN3, and the gate is connected to the output end (first input voltage Vip) of the first protection module 11; the source of the second NMOS transistor MN2 is connected to the drain of the third NMOS transistor MN3, and the gate is connected to the preset reference voltage VREF; and the drain of the second NMOS transistor MN2 serves as the output end of the input unit 121; the source of the third NMOS transistor MN3 is grounded, and the gate is connected to the bias voltage.
[0051] In this embodiment, the output unit 122 includes a third PMOS tube MP3, a fourth NMOS tube MN4 and a capacitor C; the source of the third PMOS tube MP3 is connected to the power supply voltage (the third power supply voltage AVDD3 in this embodiment), the gate is connected to the output end of the input unit 121, and the drain is connected to the drain of the fourth NMOS tube MN4; the source of the fourth NMOS tube MN4 is grounded, the gate is connected to the bias voltage, and the drain serves as the output end of the output unit 122; the first plate of the capacitor C is connected to the drain of the fourth NMOS tube MN4, and the second plate is grounded.
[0052] In this embodiment, the comparison module 12 also includes a fifth NMOS transistor MN5 and a bias current source IB; the drain of the fifth NMOS transistor MN5 is connected to the power supply voltage AVDD3 via the bias current source IB, the source is grounded, and the gate is respectively connected to the third NMOS transistor MN3 in the input unit 121 and the fourth NMOS transistor MN4 in the output unit 122 to provide corresponding bias voltages.
[0053] It should be noted that the specific configuration of the comparison module is not limited to this embodiment, and any configuration that can obtain a comparison result based on a dual-port input falls within the protection scope of this embodiment.
[0054] Specifically, Figure 3 As shown, the comparator 1 further includes a second protection module 13 arranged at the second input end of the comparison module 12 .
[0055] As an example, the second end of the second protection module 13 is connected to Q second input signals Signal2, the second end is connected to the second power supply voltage AVDD2, and the third end outputs a preset reference voltage (in this embodiment, the second input voltage Vin), and the voltage value of the second input signal Signal2 is detected based on the second power supply voltage AVDD2; when the voltage value of the second input signal Signal2 is less than or equal to the second power supply voltage AVDD2, the second input signal Signal2 is input to the comparison module 12 as the preset reference voltage VREF; when the voltage value of the second input signal Signal2 is higher than the second power supply voltage AVDD2, the resistance of the second protection module 13 is increased to reduce the voltage of the second input signal Signal2 and output it to the comparison module 12 as a preset reference voltage (in this embodiment, the second input voltage Vin); Q is an integer greater than or equal to 1.
[0056] In this embodiment, the second protection module includes Q natural field effect transistors 131 and a second multiplexer 132; each natural field effect transistor 131 is arranged in one-to-one correspondence with each second input signal; wherein the gate of each natural field effect transistor 131 is connected to the second supply voltage; the source of each natural field effect transistor 131 is connected to the corresponding second input signal, and the drain is connected to Q input terminals of the second multiplexer 132; the control terminal of the second multiplexer 132 receives a selection signal, and the output terminal is connected to the second input terminal of the comparison module 12, and the corresponding input terminal is turned on based on the selection signal, and the signal input from the input terminal is output to the comparison module 12.
[0057] In this embodiment, the second protection module 13 further includes a voltage generating unit 133, which is used to directly input a preset voltage from the inside to the second input terminal of the comparison module 12. The unit has two gears of 1V and 2.5V, and each large gear has 32 adjustment gears for adjusting the input voltage. By using the common mode voltage generating unit 133 to make the power supply of the second input terminal an internal power supply, the use of an external power supply is reduced, and the input stability of the second input terminal of the comparison module 12 is greatly increased.
[0058] It should be noted that the first protection module 11 and / or the second protection module 13 of this embodiment are completely opposite to the principle of the natural field effect transistor of this embodiment compared with the clamping diode (using MOS tube as a diode) with the same voltage limiting function in some comparative examples. When the MOS tube is used as a diode, the D pole and the G pole are connected and work in the saturation region. However, when the natural field effect transistor of this embodiment has the voltage limiting function, it works in the cut-off region of the MOS tube instead of the saturation region. At the same time, the clamping diode in the comparative example is often set to a plurality of diode structures, which requires the use of a plurality of MOS tubes; on the other hand, the natural field effect transistor of this embodiment only needs a single one to achieve this effect, which can further improve the circuit simplicity of the comparator and further reduce the layout area. In addition, most of these comparative examples are applied to the external circuit of the chip, and very few can realize the voltage limiting function inside the chip, which is fundamentally different from the starting point of the comparator designed to withstand high input voltage in this embodiment. Even if the input signal of the comparator 1 of this embodiment is higher than the voltage VDD of the comparator, it can ensure that the voltage entering the chip will not be too large, thereby avoiding the consequences of damaging the chip.
[0059] After testing, such as Figure 4 As shown, when the input signal is less than VDD (3.3V), the comparator inputs different input voltages. When the input voltage is greater than the comparator's power supply voltage VDD, the internal natural field effect transistor module will play a voltage limiting role. When the input signal is 5V (VDD = 3.3V), the voltage entering the chip is 3.5V after testing, which effectively avoids exceeding the comparator's power supply voltage withstand value (3.3V × 1.1 = 3.6V).
[0060] like Figure 1 As shown, the comparator further includes a pull-up resistor R; a first end of the pull-up resistor R is connected to the output end of the comparator 12, and a second end of the pull-up resistor R is connected to a fourth power supply voltage AVDD4.
[0061] Specifically, the pull-up resistor R can further output the voltage at a preset level to improve the linearity of the comparator output.
[0062] It should be noted that in this embodiment, the first power supply voltage AVDD1, the second power supply voltage AVDD2, the third power supply voltage AVDD3 and the fourth power supply voltage AVDD4 are all the same power supply voltage (3.3V). In fact, the value of each power supply voltage can be set based on actual needs and is not limited to this embodiment.
[0063] This embodiment further provides an oscillation circuit, characterized in that: the oscillation circuit comprises the above-mentioned comparator 1.
[0064] The oscillation circuit generates a continuous oscillation signal with a specific frequency and waveform, which is used to generate a clock signal, a test signal, a modulation signal, etc. The comparator of this embodiment compares two voltage or current signals, and generates a high level or low level signal at the output terminal to indicate the relative size between the two input signals. Based on this continuous comparison process, the oscillation circuit is realized.
[0065] In summary, the utility model provides a comparator and an oscillation circuit, including: a first protection module and a comparison module; the first end of the first protection module is connected to P first input signals, the second end is connected to the first power supply voltage, and the third end is connected to the first input end of the comparison module, and the voltage value of the first input signal is detected based on the first power supply voltage; when the voltage value of the first input signal is less than or equal to the first power supply voltage, the first input signal is input to the comparison module; when the voltage value of the first input signal is higher than the first power supply voltage, the resistance of the first protection module is increased to reduce the voltage of the first input signal and output it to the comparison module; the second input end of the comparison module is connected to a preset reference voltage, and the output signal of the overvoltage protection module is compared based on the reference voltage to obtain a comparison result. The utility model is used to solve the problem that the sensitive semiconductor components inside the comparator are easily damaged when facing unexpected overvoltage or instantaneous voltage spikes. Therefore, the utility model effectively overcomes the various shortcomings of the prior art and has a high industrial utilization value.
[0066] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.
Claims
1. A comparator, characterized in that: The comparator at least includes: a first protection module and a comparison module; The first end of the first protection module is connected to P first input signals, the second end is connected to the first power supply voltage, and the third end is connected to the first input end of the comparison module, and the voltage value of the first input signal is detected based on the first power supply voltage; when the voltage value of the first input signal is less than or equal to the first power supply voltage, the first input signal is input to the comparison module; when the voltage value of the first input signal is higher than the first power supply voltage, the resistance of the first protection module is increased to reduce the voltage of the first input signal and output it to the comparison module; p is an integer greater than or equal to 1; The second input terminal of the comparison module is connected to a preset reference voltage, and the output signal of the first protection module is compared based on the reference voltage to obtain a comparison result.
2. The comparator according to claim 1, characterized in that: The comparison module includes an input unit and an output unit; The first input end of the input unit is connected to the first protection module, and the second input end is connected to the preset reference voltage, so as to differentially amplify the output signal of the first protection module and the preset reference voltage; The output unit is connected to the output end of the input unit and is used to amplify and output the differentially amplified signal again.
3. The comparator according to claim 2, characterized in that: The input unit includes a first PMOS tube, a second PMOS tube, a first NMOS tube, a second NMOS tube and a third NMOS tube; The sources of the first PMOS tube and the second PMOS tube are both connected to a power supply voltage; The drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the gate is connected to the drain; The drain of the second PMOS tube is connected to the drain of the second NMOS tube, and the gate is connected to the gate of the first PMOS tube; The source of the first NMOS tube is connected to the drain of the third NMOS tube, and the gate is connected to the output end of the first protection module; The source of the second NMOS tube is connected to the drain of the third NMOS tube, and the gate is connected to the preset reference voltage; and the drain of the second NMOS tube serves as the output end of the input unit; The source of the third NMOS tube is grounded, and the gate is connected to a bias voltage.
4. The comparator according to claim 2, characterized in that: The output unit includes a third PMOS tube, a fourth NMOS tube and a capacitor; The source of the third PMOS tube is connected to the power supply voltage, the gate receives the output end connected to the input unit, and the drain is connected to the drain of the fourth NMOS tube; The source of the fourth NMOS tube is grounded, the gate is connected to the bias voltage, and the drain serves as the output end of the output unit; The first plate of the capacitor is connected to the drain of the fourth NMOS tube, and the second plate is grounded.
5. The comparator according to claim 1, wherein: The comparator further comprises a pull-up resistor; a first end of the pull-up resistor is connected to the output end of the comparator, and a second end of the pull-up resistor is connected to a fourth power supply voltage.
6. The comparator according to claim 1, characterized in that: The first protection module includes P natural field effect transistors and a first multiplexer; Each natural field effect transistor is arranged in one-to-one correspondence with each first input signal; wherein the gate of each natural field effect transistor is connected to the first power supply voltage; the source of each natural field effect transistor is connected to the corresponding first input signal, and the drain is connected to P input terminals of the first multiplexer; The control end of the first multiplexer receives a selection signal, the output end is connected to the first input end of the comparison module, the corresponding input end is turned on based on the selection signal, and the signal input from the input end is output to the comparison module.
7. The comparator according to any one of claims 1 to 6, characterized in that: The comparator further comprises a second protection module arranged at a second input terminal of the comparison module; The second end of the second protection module is connected to Q second input signals, the second end is connected to the second power supply voltage, the third end outputs a preset reference voltage, and the voltage value of the second input signal is detected based on the second power supply voltage; when the voltage value of the second input signal is less than or equal to the second power supply voltage, the second input signal is input into the comparison module as the preset reference voltage; When the voltage value of the second input signal is higher than the second supply voltage, the resistance of the second protection module is increased to reduce the voltage of the second input signal and output it to the comparison module as a preset reference voltage; Q is an integer greater than or equal to 1.
8. The comparator according to claim 7, characterized in that: The second protection module includes Q natural field effect transistors and a second multiplexer; Each natural field effect transistor is arranged in one-to-one correspondence with each second input signal; wherein the gate of each natural field effect transistor is connected to the second power supply voltage; the source of each natural field effect transistor is connected to the corresponding second input signal, and the drain is connected to Q input terminals of the second multiplexer; The control end of the second multiplexer receives a selection signal, the output end is connected to the second input end of the comparison module, the corresponding input end is turned on based on the selection signal, and the signal input from the input end is output to the comparison module.
9. An oscillator circuit, characterized in that: The oscillation circuit comprises the comparator according to any one of claims 1 to 8.