ADC sampling circuit

Abstract

The utility model provides an ADC sampling circuit, and relates to the technical field of electronic circuits. According to the ADC sampling circuit, the input end of a resonance circuit is connected with the input end of a filter circuit, the output end of the resonance circuit is connected with the input end of a signal conversion module, the filter circuit is used for performing low-pass filtering processing on a received signal and then transmitting the signal to the resonance circuit, and the filter circuit comprises a Butterworth low-pass filter; the resonance circuit is used for processing the signal transmitted by the filter circuit and transmitting the signal to the signal conversion module; and the signal conversion module is used for converting the signal transmitted by the resonance circuit into a digital signal and outputting the digital signal. According to the Butterworth low-pass filter provided by the embodiment of the invention, low-frequency signals in analog signals are effectively reduced under the action of the filter circuit and the resonance circuit, so that the effects of low noise and low distortion are achieved, the accuracy of output signals of the ADC sampling circuit is improved, and the application scenarios of the ADC sampling circuit are expanded.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to an ADC sampling circuit. Background Art

[0002] In the process of analog signal storage and transmission, noise and distortion will be accumulated, which will have a negative effect on signal processing. With the emergence of very large-scale integrated circuits, various signal processing functions with higher accuracy, higher reliability and lower price can be realized in the digital domain than in the analog domain. The ability of digital signals to suppress noise is much greater than that of analog signals, and in the digital domain, digital signals can be stored and transmitted losslessly.

[0003] In telecommunications, voice, video, computers and many other occasions, in order to take advantage of these advantages of digital signal processing, the ADC (Anlog to Digital Converter) sampling circuit is often used to convert analog signals into digital signals. However, this sampling circuit is easily affected by the low-frequency noise in the analog signal when in use, resulting in high noise and distortion of the output digital signal, which limits the use of the ADC sampling circuit. Utility Model Content

[0004] The embodiment of the present application provides an ADC sampling circuit, which can solve the problem that the existing ADC sampling circuit is easily affected by low-frequency noise, and the output digital signal has high noise and high distortion. To achieve this purpose, the embodiment of the present application provides the following solutions.

[0005] According to one aspect of an embodiment of the present application, an ADC sampling circuit is provided, comprising: a signal conversion module, a filtering circuit, and a resonant circuit, wherein an input end of the resonant circuit is connected to an input end of the filtering circuit, and an output end of the resonant circuit is connected to an input end of the signal conversion module.

[0006] The filtering circuit is used to transmit the received signal to the resonant circuit after low-pass filtering, and the filtering circuit includes a Butterworth low-pass filter;

[0007] The resonant circuit is used to process the signal transmitted by the filter circuit and transmit it to the signal conversion module;

[0008] The signal conversion module is used to convert the signal transmitted by the resonant circuit into a digital signal and output the digital signal.

[0009] In a possible implementation, the invention further includes a first impedance matching circuit and an amplifier connected to the first impedance matching circuit, wherein the first impedance matching circuit receives a signal transmitted by an external device and transmits the signal to the amplifier;

[0010] The output end of the amplifier is connected to the input end of the filter circuit. The amplifier is used to amplify the signal and transmit the amplified signal to the filter circuit.

[0011] In a possible implementation, the first impedance matching circuit includes a first resistor and a second capacitor, the first end of the first resistor is connected to the external device, the second end of the first resistor is connected to the first end of the second capacitor, and the second end of the second capacitor is connected to the amplifier.

[0012] In a possible implementation, the amplifier includes a first RF amplifier, a first capacitor, and a fourth capacitor, the input end of the first RF amplifier is connected to the output end of the first impedance matching circuit and the first end of the first capacitor, the second end of the first capacitor and the second end of the fourth capacitor are grounded, and the output end of the first RF amplifier is connected to the first end of the fourth capacitor and the input end of the filter circuit.

[0013] In a possible implementation, the filtering circuit includes a first power filtering circuit, a filter, and a second impedance matching circuit, wherein an input end of the first power filtering circuit is connected to a reference voltage source, and an output end of the first power filtering circuit is connected to an output end of the amplifier and an input end of the filter;

[0014] The output end of the filter is connected to the input end of the second impedance matching circuit, the input end of the Butterworth low-pass filter is connected to the input end of the second impedance matching circuit, and the input end of the resonant circuit is connected to the output end of the Butterworth low-pass filter.

[0015] In a possible implementation, the second impedance matching circuit includes a fifth inductor, a sixth inductor and a forty-sixth capacitor, the first end of the fifth inductor is connected to the output end of the filter and the first end of the forty-sixth capacitor, the second end of the fifth inductor is grounded, the second end of the forty-sixth capacitor is connected to the first end of the sixth inductor and the input end of the Butterworth filter, and the second end of the sixth inductor is grounded.

[0016] In a possible implementation, a balun is further included, wherein an input end of the balun is connected to an output end of the resonant circuit, and an input end of the signal conversion module is connected to an output end of the balun.

[0017] In a possible implementation, a balancing circuit is further included, wherein an input end of the balancing circuit is connected to an output end of the balanced-unbalanced transformer, and an output end of the balancing circuit is connected to an input end of the signal conversion module.

[0018] In a possible implementation, it also includes a filter capacitor and a third impedance matching circuit, wherein the first end of the filter capacitor is connected to the input end of the balancing circuit and the third impedance matching circuit, the second end is grounded, and the output end of the second impedance matching circuit is connected to the output end of the filter capacitor.

[0019] In one possible implementation, the signal conversion module includes an analog-to-digital converter and a second power supply filter circuit, the analog-to-digital converter is connected to the output end of the resonant circuit, and the second power supply filter circuit is connected to the voltage input end of the analog-to-digital converter to transmit the filtered voltage to the analog-to-digital converter.

[0020] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0021] In the ADC sampling circuit provided by the present application, the input end of the resonant circuit is connected to the input end of the filter circuit, and the output end of the resonant circuit is connected to the input end of the signal conversion module. The filter circuit is used to transmit the received signal to the resonant circuit after low-pass filtering, and the filter circuit includes a Butterworth low-pass filter; the resonant circuit is used to process the signal transmitted by the filter circuit and transmit it to the signal conversion module; the signal conversion module is used to convert the signal transmitted by the resonant circuit into a digital signal and output the digital signal. In the embodiment of the present application, a filter circuit including a Butterworth low-pass filter and a resonant circuit are set in the ADC sampling circuit. Through the action of the two, the low-frequency signal in the analog signal received by the analog-to-digital converter is effectively reduced, thereby achieving the effect of low noise and low distortion, improving the accuracy of the output signal of the ADC sampling circuit, and expanding the application scenario of the ADC sampling circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following is a brief introduction to the drawings required for use in describing the embodiments of the present application.

[0023] Figure 1 A structural diagram of an ADC sampling circuit provided in an embodiment of the present application;

[0024] Figure 2 A schematic diagram of signal transmission in an ADC sampling circuit provided in the present application;

[0025] Figure 3 A partial circuit diagram of an embodiment of an ADC sampling circuit provided in an embodiment of the present application;

[0026] Figure 4 A circuit diagram of an analog-to-digital converter in an ADC sampling circuit provided in an embodiment of the present application;

[0027] Figure 5A circuit diagram of a second power supply filter circuit in an ADC sampling circuit provided in an embodiment of the present application.

[0028] Explanation of reference numerals: C8, eighth capacitor; C9, ninth capacitor; L2, second inductor; L3, third inductor; L4, fourth inductor; C10, tenth capacitor; R1, first resistor; C2, second capacitor; U1, first RF amplifier; C1, first capacitor; C4, fourth capacitor; C5, fifth capacitor; C6, sixth capacitor; C7, seventh capacitor; L1, first inductor; C3, third capacitor; L5, fifth inductor; L6, sixth inductor; C46, ​​forty-sixth capacitor; U2, filter; U3, balanced-unbalanced converter; C32, thirty-second capacitor; C40, fortieth capacitor; R2, second resistor; R3, third resistor; C41, forty-first capacitor; R4, fourth resistor; R5, fifth resistor; C33, thirty-third capacitor; U4, analog-to-digital converter. DETAILED DESCRIPTION

[0029] The embodiments of the present application are described below in conjunction with the drawings in the present application. It should be understood that the implementation methods described below in conjunction with the drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions of the embodiments of the present application.

[0030] It will be understood by those skilled in the art that, unless specifically stated, the singular forms "one", "said", and "the" used herein may also include plural forms. It should be further understood that the terms "including" and "comprising" used in the embodiments of the present application refer to that the corresponding features can be implemented as the presented features, information, data, steps, operations, elements and / or components, but do not exclude the implementation of other features, information, data, steps, operations, elements, components and / or combinations thereof supported by the present technical field. It should be understood that when we say that an element is "connected" or "coupled" to another element, the one element may be directly connected or coupled to the other element, or it may refer to that the one element and the other element establish a connection relationship through an intermediate element. In addition, the "connection" or "coupling" used herein may include wireless connection or wireless coupling. The term "and / or" used herein indicates at least one of the items defined by the term, for example, "A and / or B" indicates that it is implemented as "A", or is implemented as "A", or is implemented as "A and B".

[0031] In order to make the purpose, technical solutions and advantages of the present invention more clear, the implementation methods of the present invention will be further described in detail below with reference to the accompanying drawings.

[0032] The following describes several exemplary embodiments to illustrate the technical solutions of the embodiments of the utility model and the technical effects produced by the technical solutions of the utility model. It should be noted that the following embodiments can refer to, draw on or combine with each other, and the same terms, similar features and similar implementation steps in different embodiments will not be described repeatedly.

[0033] The ADC sampling circuit provided in the present application is intended to solve at least one technical problem existing in the prior art.

[0034] An ADC sampling circuit is provided in an embodiment of the present application. The ADC sampling circuit receives a signal transmitted by an external device, converts the analog signal into a digital signal, and outputs the digital signal to an object for digital signal processing and analysis.

[0035] Optionally, the signal transmitted by the external device is an analog signal, and the external device outputting the analog signal may include a radio frequency component, and the radio frequency component generates an analog signal or transmits the analog signal received in a wired or wireless manner to the filtering circuit.

[0036] In one embodiment, the frequency of the analog signal transmitted by the external device is 2140 MHZ.

[0037] like Figure 1-5 As shown, the ADC sampling circuit includes a signal conversion module, a filtering circuit, and a resonant circuit. The input end of the resonant circuit is connected to the input end of the filtering circuit, and the output end of the resonant circuit is connected to the input end of the signal conversion module. The filtering circuit is used to transmit the received signal to the resonant circuit after low-pass filtering. The filtering circuit includes a Butterworth low-pass filter; the resonant circuit is used to process the signal transmitted by the filtering circuit and transmit it to the signal conversion module; the signal conversion module is used to convert the signal transmitted by the resonant circuit into a digital signal and output the digital signal.

[0038] Optionally, the resonant circuit may be an LC oscillation circuit, the Butterworth low-pass filter filters out interference signals, and further reduces low-frequency signals through the LC oscillation circuit, thereby achieving low noise and low distortion effects.

[0039] In one embodiment, the Butterworth low-pass filter includes an eighth capacitor C8, a ninth capacitor C9, a second inductor L2, and a third inductor L3. The second end of the eighth capacitor C8 is grounded, and the first end receives a signal transmitted by an external device. The first end of the second inductor L2 is connected to the first end of the eighth capacitor C8, the second end of the second inductor L2 is connected to the first end of the ninth capacitor C9 and the first end of the third inductor L3, and the second end of the third inductor L3 is connected to the input end of the resonant circuit. The LC oscillation circuit includes a fourth inductor L4 and a tenth capacitor C9. The first end of the fourth inductor L4 is connected to the second end of the third inductor L3 and the first end of the tenth capacitor C9, and the input end of the signal conversion module. The second end of the fourth inductor L4 and the second end of the tenth capacitor C9 are grounded.

[0040] Optionally, the ADC sampling circuit also includes a first impedance matching circuit and an amplifier connected to the first impedance matching circuit, the first impedance matching circuit receives a signal transmitted by an external device and transmits the signal to the amplifier; the output end of the amplifier is connected to the input end of the filter circuit, the amplifier is used to amplify the signal and transmit the amplified signal to the filter circuit.

[0041] Optionally, the first impedance matching circuit includes a first resistor R1 and a second capacitor C2, wherein a first end of the first resistor R1 is connected to an external device, a second end of the first resistor R1 is connected to a first end of the second capacitor C2, and a second end of the second capacitor C2 is connected to an amplifier.

[0042] In one embodiment, the resistance of the first resistor R1 is 50Ω, and the capacitance of the second capacitor C2 is 22pF.

[0043] Optionally, the amplifier includes a first RF amplifier U1, a first capacitor C1, and a fourth capacitor C4, the input end of the first RF amplifier U1 is connected to the output end of the first impedance matching circuit and the first end of the first capacitor C1, the second end of the first capacitor C1 and the second end of the fourth capacitor C4 are grounded, and the output end of the first RF amplifier U1 is connected to the first end of the fourth capacitor C4 and the input end of the filter circuit.

[0044] In one embodiment, the model of the first RF amplifier U1 is ADL5544ARKZ-R7, and the ground terminal of the first RF amplifier U1 is connected to the second end of the first capacitor C1 and is grounded.

[0045] Optionally, the filter circuit includes a first power filter circuit, a filter U2, and a second impedance matching circuit. The input end of the first power filter circuit is connected to the reference voltage source, and the output end is connected to the output end of the amplifier and the input end of the filter U2; the output end of the filter U2 is connected to the input end of the second impedance matching circuit, the input end of the Butterworth low-pass filter is connected to the input end of the second impedance matching circuit, and the input end of the resonant circuit is connected to the output end of the Butterworth low-pass filter. The first power filter circuit transmits the current of the reference voltage source to the amplifier and the filter U2 in the filter circuit, and the interference signal in the reference voltage source is filtered out by the first power filter circuit.

[0046] In one embodiment, the first power supply filter circuit includes three capacitors connected in parallel (a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7), one end of the three capacitors connected in parallel is connected to a reference voltage source, and the other end is grounded.

[0047] Optionally, the filtering circuit also includes a first inductor L1 and a third capacitor C3. The first end of the first inductor L1 is connected to the output end of the first power supply filtering circuit, and the other end is connected to the output end of the amplifier and the first end of the third capacitor C3. The second end of the third capacitor C3 is connected to the input end of the filter U2.

[0048] In one embodiment, the model of the filter U2 is LFL151G81TF1E320. The second impedance matching circuit is a π-type matching circuit, including a fifth inductor L5, a sixth inductor L6, and a forty-sixth capacitor C46, ​​wherein a first end of the fifth inductor L5 is connected to an output end of the filter U2 and a first end of the forty-sixth capacitor C46, ​​a second end of the fifth inductor L5 is grounded, a second end of the forty-sixth capacitor C46 is connected to a first end of the sixth inductor L6 and an input end of the Butterworth filter U2, and a second end of the sixth inductor L6 is grounded.

[0049] Optionally, the ADC sampling circuit further includes a balanced-unbalanced transformer U3, an input end of the balanced-unbalanced transformer U3 is connected to an output end of the resonance circuit, and an input end of the signal conversion module is connected to an output end of the balanced-unbalanced transformer U3.

[0050] In one embodiment, the balun U3 converts the signal transmitted by the resonant circuit into a differential signal. Specifically, the model of the balun U3 is DEA202450BT-7227A1-H.

[0051] Optionally, the ADC sampling circuit further includes a balanced circuit, the input end of the balanced circuit is connected to the output end of the balanced-unbalanced converter U3, and the output end of the balanced circuit is connected to the input end of the signal conversion module. The balanced circuit is used to suppress common-mode interference of differential information output by the balanced-unbalanced converter U3 to improve the signal-to-noise ratio.

[0052] In one embodiment, the balanced circuit may be a differential double balanced circuit, which includes a 32nd capacitor C32, a 40th capacitor C40, a second resistor R2, and a third resistor R3, wherein the first end of the 32nd capacitor C32 is connected to the balanced-unbalanced converter U3, and the second end is connected to the first end of the second resistor R2 and the input end of the signal conversion module, the first end of the 40th capacitor C40 is connected to the balanced-unbalanced converter U3, and the second end of the 40th capacitor C40 is connected to the second end of the third resistor R3 and the input end of the signal conversion module. The second end of the second resistor R2 is connected to the first end of the third resistor R3.

[0053] Optionally, the ADC sampling circuit also includes a filter capacitor and a third impedance matching circuit, the first end of the filter capacitor is connected to the input end of the balancing circuit and the third impedance matching circuit, the second end is grounded, and the output end of the second impedance matching circuit is connected to the output end of the filter capacitor.

[0054] In one embodiment, the filter capacitor may be a forty-first capacitor C41, a first end of the forty-first capacitor C41 is connected to the second end of the second resistor R2 and the first end of the third resistor R3, and a second end of the forty-first capacitor C41 is grounded. The third impedance matching circuit includes a fourth resistor R4, a fifth resistor R5, and a thirty-third capacitor C33, a first end of the fourth resistor R4 is connected to the first output end of the balancing circuit, a second output end of the fourth resistor R4 is connected to the first end of the thirty-third capacitor C33 and the first input end of the signal conversion module. The second end of the thirty-third capacitor C33 is connected to the second end of the fifth resistor R5 and the second input end of the signal conversion module, and the first input end of the fifth resistor R5 is connected to the second output end of the balancing circuit.

[0055] Optionally, the signal conversion module includes an analog-to-digital converter U4 and a second power supply filter circuit, the analog-to-digital converter U4 is connected to the output end of the resonant circuit, and the second power supply filter circuit is connected to the voltage input end of the analog-to-digital converter U4 to transmit the filtered voltage to the analog-to-digital converter U4.

[0056] In one embodiment, Figure 4 , Figure 5 As shown, the model of the analog-to-digital converter U4 can be AD9628BCPZ-125, and the second power supply filter circuit is respectively connected to the analog power supply and digital power supply corresponding to the analog-to-digital converter U4 for providing voltage. Among them, the second power supply filter circuit includes multiple independent circuits, each circuit is connected to the corresponding pin on the analog-to-digital converter U4 (such as Figure 5The 10th and 49th pins are connected, and each includes two parallel capacitors. The ungrounded end of the parallel capacitor is connected to the pin on the analog-to-digital converter U4 and the power supply (analog power supply or digital power supply). The interference signal of the power supply or digital power supply is simulated through the parallel capacitor. Specifically, the voltage of the analog power supply or digital power supply is 1.8V.

[0057] According to the above embodiment, the input signal in the ADC sampling circuit of the present application is first processed by the first impedance matching circuit, and then transmitted to the amplifier, which is amplified by the amplifier. The first power supply filter circuit connected to the amplifier is provided with a capacitor, and the interference signal from the power supply is reduced by the capacitor. After the signal passes through the amplifier, it is filtered out by the filter U2, and then impedance matching is performed by the second impedance matching circuit composed of two 22nH and one 18pF to reduce the attenuation of the signal in the line transmission. The signal is then low-pass filtered by the Butterworth filter U2, and the signal after low-pass filtering passes through the resonant circuit to further reduce the proportion of low-frequency signals in the signal and improve the filtering effect. The signal output by the resonant circuit is then converted from a single-ended signal to a differential signal by the balanced-unbalanced converter U3, and the differential signal is input into a differential double-balanced coupling circuit, and the differential double-balanced coupling circuit performs common-mode interference suppression to improve the signal-to-noise ratio. The signal is finally impedance matched by the third impedance matching circuit, and the signal is transmitted to the ADC sampling chip for sampling. Among them, the amplifier will increase the gain of the input signal, and at the same time, the low noise factor (2.9dB at 900MHz) and low distortion characteristics of the amplifier ensure that the performance of the ADC sampling circuit is not affected. The filter circuit filters the interference signal generated in the amplifier, removes unnecessary interference signals and noise, and at the same time, the second impedance matching circuit at the output end is used to match the impedance of the output end of the filter U2 and the input end of the balanced-unbalanced converter U3 to ensure the efficiency of signal transmission. The Butterworth low-pass filter is used for secondary filtering. The signal output by the Butterworth low-pass filter passes through the shunt LC oscillation circuit to further reduce the low-frequency signal to achieve the effect of low noise and low distortion. In addition, the balanced-unbalanced converter U3 converts the input single-ended signal into a differential signal, which is more stable than the balun circuit and can meet high performance requirements.

[0058] The terms "first", "second", "third", "fourth", "1", "2", etc. (if any) in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than that shown or described in the drawings.

[0059] It should be understood that, although each operation step is indicated by arrows in the flowchart of the embodiment of the present application, the implementation order of these steps is not limited to the order indicated by the arrows. Unless clearly stated herein, in some implementation scenarios of the embodiment of the present application, the implementation steps in each flowchart can be performed in other orders according to demand. In addition, some or all of the steps in each flowchart may include multiple sub-steps or multiple stages based on actual implementation scenarios. Some or all of these sub-steps or stages may be executed at the same time, and each sub-step or stage in these sub-steps or stages may also be executed at different times respectively. In different scenarios of execution time, the execution order of these sub-steps or stages may be flexibly configured according to demand, and the embodiment of the present application does not limit this.

[0060] The above is only an optional implementation method for some implementation scenarios of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the technical concept of the solution of the present application, other similar implementation methods based on the technical ideas of the present application are also within the protection scope of the embodiments of the present application.

Claims

1. An ADC sampling circuit, characterized in that: include: A signal conversion module, a filter circuit, and a resonance circuit, wherein the input end of the resonance circuit is connected to the input end of the filter circuit, and the output end of the resonance circuit is connected to the input end of the signal conversion module. The filtering circuit is used to transmit the received signal to the resonant circuit after low-pass filtering, and the filtering circuit includes a Butterworth low-pass filter; The resonant circuit is used to process the signal transmitted by the filter circuit and transmit it to the signal conversion module; The signal conversion module is used to convert the signal transmitted by the resonant circuit into a digital signal and output the digital signal.

2. The ADC sampling circuit according to claim 1, characterized in that: It also includes a first impedance matching circuit and an amplifier connected to the first impedance matching circuit, wherein the first impedance matching circuit receives a signal transmitted by an external device and transmits the signal to the amplifier; The output end of the amplifier is connected to the input end of the filter circuit. The amplifier is used to amplify the signal and transmit the amplified signal to the filter circuit.

3. The ADC sampling circuit according to claim 2, characterized in that: The first impedance matching circuit includes a first resistor and a second capacitor. The first end of the first resistor is connected to the external device, the second end of the first resistor is connected to the first end of the second capacitor, and the second end of the second capacitor is connected to the amplifier.

4. The ADC sampling circuit according to claim 2, characterized in that: The amplifier includes a first RF amplifier, a first capacitor, and a fourth capacitor. The input end of the first RF amplifier is connected to the output end of the first impedance matching circuit and the first end of the first capacitor. The second end of the first capacitor and the second end of the fourth capacitor are grounded. The output end of the first RF amplifier is connected to the first end of the fourth capacitor and the input end of the filter circuit.

5. The ADC sampling circuit according to claim 2, characterized in that: The filter circuit comprises a first power filter circuit, a filter, and a second impedance matching circuit, wherein the input end of the first power filter circuit is connected to a reference voltage source, and the output end is connected to the output end of the amplifier and the input end of the filter; The output end of the filter is connected to the input end of the second impedance matching circuit, the input end of the Butterworth low-pass filter is connected to the input end of the second impedance matching circuit, and the input end of the resonant circuit is connected to the output end of the Butterworth low-pass filter.

6. The ADC sampling circuit according to claim 5, characterized in that: The second impedance matching circuit includes a fifth inductor, a sixth inductor and a forty-sixth capacitor, the first end of the fifth inductor is connected to the output end of the filter and the first end of the forty-sixth capacitor, the second end of the fifth inductor is grounded, the second end of the forty-sixth capacitor is connected to the first end of the sixth inductor and the input end of the Butterworth low-pass filter, and the second end of the sixth inductor is grounded.

7. The ADC sampling circuit according to claim 5, characterized in that: It also includes a balanced-unbalanced transformer, the input end of the balanced-unbalanced transformer is connected to the output end of the resonant circuit, and the input end of the signal conversion module is connected to the output end of the balanced-unbalanced transformer.

8. The ADC sampling circuit according to claim 7, characterized in that: It also includes a balanced circuit, the input end of the balanced circuit is connected to the output end of the balanced-unbalanced transformer, and the output end of the balanced circuit is connected to the input end of the signal conversion module.

9. The ADC sampling circuit according to claim 8, characterized in that: It also includes a filter capacitor and a third impedance matching circuit. The first end of the filter capacitor is connected to the input end of the balancing circuit and the third impedance matching circuit, the second end is grounded, and the output end of the second impedance matching circuit is connected to the output end of the filter capacitor.

10. The ADC sampling circuit according to claim 1, characterized in that: The signal conversion module includes an analog-to-digital converter and a second power supply filtering circuit. The analog-to-digital converter is connected to the output end of the resonant circuit. The second power supply filtering circuit is connected to the voltage input end of the analog-to-digital converter to transmit the filtered voltage to the analog-to-digital converter.

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