Discharging circuit and display panel

Abstract

The utility model provides a discharging circuit and a display panel, the discharging circuit comprises a switch module, a first voltage dividing module, a second voltage dividing module and a discharging resistor, one end of the first voltage dividing module is electrically connected with a first direct-current low-voltage power supply signal end, and the other end of the first voltage dividing module is electrically connected with a second direct-current low-voltage power supply signal end; the other end of the first voltage dividing module is electrically connected with the control end of the switch module and one end of the second voltage dividing module, the other end of the second voltage dividing module is electrically connected with the input end of the switch module and a second direct-current low-voltage power supply signal end, and the output end of the switch module is electrically connected with one end of the discharging resistor. When the display panel is turned off, the switch module is turned on, and the second direct-current low-voltage power supply signal end can realize quick discharge through the discharge resistor, so that a storage capacitor of a pixel is quickly discharged; when the display panel is shut down, the display panel gate drive circuit does not output a scanning signal capable of turning on a thin film transistor switch of a pixel, so that the problem of line lightening when the liquid crystal display panel is shut down can be solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a discharge circuit and a display panel. Background Art

[0002] A gate-driver on array (GOA) integrated with an array substrate of a liquid crystal display (LCD) panel usually uses a start signal to control a DC low-voltage power signal to discharge a connection node between a pull-up module and a pull-up control module.

[0003] Since the start signal simultaneously controls the multiple gate drive units in the gate drive circuit, the transistors controlled by the start signal in each gate drive unit cannot be fully turned on, resulting in the charge of the connection node between the pull-up module and the pull-up control module in the gate drive unit cannot be cleared. Therefore, when the liquid crystal display panel is turned off, the gate of the transistor of the pull-up module is not fully closed, resulting in the gate drive unit outputting a scanning signal that can turn on the thin-film transistor switch of the pixel to the pixel of the liquid crystal display panel, and the data signal transmitted by the data line of the liquid crystal display panel charges the storage capacitor of the pixel, resulting in the problem of bright lines still appearing on the liquid crystal display panel after the liquid crystal display panel is turned off.

[0004] Therefore, it is necessary to provide a discharge circuit and a display panel to improve this defect. Utility Model Content

[0005] The embodiments of the present application provide a discharge circuit and a display panel to solve the problem that bright lines still appear on a liquid crystal display panel after the panel is turned off.

[0006] An embodiment of the present application provides a discharge circuit, including a switch module, a first voltage divider module, a second voltage divider module and a discharge resistor, wherein one end of the first voltage divider module is electrically connected to a first DC low-voltage power supply signal end, the other end of the first voltage divider module is electrically connected to a control end of the switch module and one end of the second voltage divider module, the other end of the second voltage divider module is electrically connected to an input end of the switch module and a second DC low-voltage power supply signal end, the output end of the switch module is electrically connected to one end of the discharge resistor, and the other end of the discharge resistor is electrically connected to a ground wire.

[0007] According to one embodiment of the present application, the switching module includes a field effect transistor, the gate of the field effect transistor is electrically connected to the first voltage divider module, the source of the field effect transistor is electrically connected to the second voltage divider module and the second DC low-voltage power supply signal end, and the drain of the field effect transistor is electrically connected to the discharge resistor.

[0008] According to an embodiment of the present application, the first voltage divider module includes a first resistor, one end of the first resistor is electrically connected to the first DC low-voltage power supply signal end, and the other end of the first resistor is electrically connected to the gate of the field effect tube.

[0009] According to an embodiment of the present application, a resistance value of the first resistor is greater than or equal to 8 kilo-ohms and less than or equal to 12 kilo-ohms.

[0010] According to one embodiment of the present application, the second voltage divider module includes a second resistor, one end of the second resistor is electrically connected to the gate of the field effect transistor, and the other end of the second resistor is electrically connected to the source of the field effect transistor and the second DC low-voltage power supply signal end.

[0011] According to an embodiment of the present application, a resistance value of the second resistor is greater than or equal to 1 kiloohm and less than or equal to 1.2 kiloohms.

[0012] According to an embodiment of the present application, the field effect transistor is an N-type field effect transistor.

[0013] According to an embodiment of the present application, a resistance value of the discharge resistor is greater than or equal to 180 ohms and less than or equal to 220 ohms.

[0014] According to an embodiment of the present application, the first voltage output by the first DC low-voltage power signal terminal is -6V, and the second voltage output by the first DC low-voltage power signal terminal is 30V;

[0015] When the switch module is turned on, the voltage output by the first DC low-voltage power signal terminal is switched from the first voltage to the second voltage.

[0016] An embodiment of the present application also provides a display panel, which includes a gate drive circuit and a discharge circuit as described above, wherein the gate drive circuit includes a plurality of cascaded gate drive circuit units, and the gate drive circuit unit includes a pull-up control module, a pull-up module and a pull-down module, wherein the pull-up control module is electrically connected to the pull-up module and the pull-down module at a first node, and the pull-down module is electrically connected to the second DC low-voltage power supply signal terminal, and the second DC low-voltage power supply signal terminal is used to discharge the first node after each frame scan is completed.

[0017] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a discharge circuit and a display panel, wherein the discharge circuit includes a switch module, a first voltage divider module, a second voltage divider module and a discharge resistor, by electrically connecting one end of the first voltage divider module to the first DC low-voltage power supply signal end, the other end of the first voltage divider module to the control end of the switch module and one end of the second voltage divider module, the other end of the second voltage divider module to the input end of the switch module and the second DC low-voltage power supply signal end, the output end of the switch module to one end of the discharge resistor, and the other end of the discharge resistor to the ground wire, when the display panel is turned off, the switch module is turned on, and the second DC low-voltage power supply signal end can be quickly discharged through the discharge resistor, so that the storage capacitor of the pixel is quickly discharged, ensuring that when the display panel is turned off, the display panel gate drive circuit does not output a scanning signal that can turn on the thin-film transistor switch of the pixel, thereby solving the problem of bright lines still appearing on the liquid crystal display panel after being turned off. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of a discharge circuit provided in an embodiment of the present application;

[0019] Figure 2 A schematic diagram of a gate driving circuit unit provided in an embodiment of the present application;

[0020] Figure 3 A schematic diagram of another gate driving circuit unit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] The present application is further described below in conjunction with the accompanying drawings and specific embodiments.

[0022] The embodiments of the present application provide a discharge circuit and a display panel, which can quickly discharge the DC voltage power signal when shutting down, so as to quickly discharge the storage capacitor and ensure that the transistor is completely turned off when shutting down, thereby solving the problem of bright lines when shutting down.

[0023] like Figure 1 As shown, Figure 1 A structural schematic diagram of a discharge circuit provided for an embodiment of the present application, the discharge circuit includes a switch module 1, a first voltage divider module 2, a second voltage divider module 3 and a discharge resistor Rdis, one end of the first voltage divider module 2 is electrically connected to the first DC low-voltage power supply signal terminal VSSG, the other end of the first voltage divider module 2 is electrically connected to the control end of the switch module 1 and one end of the second voltage divider module 3, the other end of the second voltage divider module 3 is electrically connected to the input end of the switch module 1 and the second DC low-voltage power supply signal terminal VSSQ, the output end of the switch module 1 is electrically connected to one end of the discharge resistor Rdis, and the other end of the discharge resistor Rdis is electrically connected to the ground wire.

[0024] In some embodiments, the resistance value of the discharge resistor Rdis is greater than or equal to 180 ohms and less than or equal to 220 ohms, so that the resistance value of the discharge resistor can be kept smaller, thereby reducing the discharge time.

[0025] In one embodiment, the resistance value of the discharge resistor Rdis is 200 ohms. In practical applications, the resistance value of the discharge resistor Rdis is not limited to 200 ohms in the above embodiment, but can also be 180 ohms, 190 ohms, 210 ohms or 220 ohms, etc., and only needs to be between 180 ohms and 220 ohms.

[0026] The switch module 1 includes a field effect transistor MOS, the gate of the field effect transistor MOS is electrically connected to the first voltage divider module 2, the source of the field effect transistor MOS is electrically connected to the second voltage divider module 3 and the second DC low-voltage power supply signal terminal VSSQ, and the drain of the field effect transistor MOS is electrically connected to the discharge resistor Rid.

[0027] In one embodiment, the field effect transistor MOS is an N-type field effect transistor NMOS.

[0028] The first voltage dividing module 2 comprises a first resistor R1 , one end of which is electrically connected to the first DC low-voltage power signal terminal VSSG, and the other end of which is electrically connected to the gate of the field effect transistor MOS.

[0029] In some embodiments, the resistance value of the first resistor R1 is greater than or equal to 8 kilo-ohms and less than or equal to 12 kilo-ohms. Using the first resistor R1 with a larger resistance value for current limiting can reduce the loss of the discharge circuit when the display panel is working normally, thereby speeding up the discharge speed of the discharge circuit and reducing the discharge time.

[0030] In one embodiment, the resistance value of the first resistor R1 is 10 kilo-ohms. In practical applications, the resistance value of the first resistor R1 is not limited to 10 kilo-ohms in the above embodiment, but can also be 8 kilo-ohms, 9 kilo-ohms, 11 kilo-ohms or 12 kilo-ohms, etc., and only needs to be between 8 kilo-ohms and 12 kilo-ohms.

[0031] The second voltage divider module 3 includes a second resistor R2, one end of which is electrically connected to the gate of the field effect transistor MOS, and the other end of which is electrically connected to the source of the field effect transistor MOS and the second DC low voltage power signal terminal VSSQ.

[0032] In some embodiments, the resistance value of the second resistor R2 is greater than or equal to 1 kilo-ohm and less than or equal to 1.2 kilo-ohm.

[0033] In one embodiment, the resistance value of the second resistor R2 is 1 kiloohm. In practical applications, the resistance value of the second resistor R2 is not limited to 1 kiloohm in the above embodiment, but can also be 1 kiloohm, 1.1 kiloohm or 1.2 kiloohm, etc., and only needs to be between 1 kiloohm and 1.2 kiloohm.

[0034] The first voltage output by the first DC low-voltage power signal terminal VSSG is -6V, and the second voltage output by the first DC low-voltage power signal terminal VSSG is 30V. When switching from the first state to the second state, the voltage output by the first DC low-voltage power signal terminal VSSG switches from the first voltage to the second voltage.

[0035] It should be noted that the first state is the power-on state, and the second state is the power-off state. When the display panel switches from the power-on state to the power-off state, the first DC low-voltage power signal terminal VSSG performs a discharge action, and the voltage output by the first DC low-voltage power signal terminal VSSG changes from the first voltage -6V to the second voltage 30V, the field effect tube MOS is turned on, and the second DC low-voltage power signal terminal VSSQ realizes rapid discharge through the discharge resistor Rdis, thereby solving the problem of bright lines when the power is turned off.

[0036] An embodiment of the present application further provides a display panel, which includes a gate driving circuit and a discharge circuit as provided in the above embodiment, wherein the gate driving circuit includes a plurality of cascaded gate driving circuit units.

[0037] like Figure 2 As shown, Figure 2 A schematic diagram of a gate drive circuit unit provided for an embodiment of the present application, taking the N-th level gate drive circuit unit as an example, the gate drive circuit unit includes a pull-up control module 4, a pull-up module 5 and a pull-down module 6, the pull-up module 4 is connected to the start signal STV, the pull-up module 5 is connected to the clock signal CK, the pull-up control module 4 is electrically connected to the pull-up module 5 and the pull-down module 6 at the first node Q, the pull-up module 5 and the pull-down module 6 are electrically connected to the N-th level scan signal output terminal G(N), the pull-down module 6 is electrically connected to the N+M-th level scan signal output terminal G(N+M), the pull-down module 6 is electrically connected to the second DC low-voltage power supply signal terminal VSSQ, and the second DC low-voltage power supply signal terminal VSSQ is used to discharge the first node Q after each frame scan is completed.

[0038] Specifically, the pull-up control module 4 includes a pull-up control transistor T1, the pull-up module 5 includes a pull-up transistor T2, and the pull-down module 6 includes a first pull-down transistor T3 and a second pull-down transistor T4, wherein the gate and source of the pull-up control transistor T1 are both connected to the start signal STV, the drain of the pull-up control transistor T1, the gate of the pull-up transistor T2, and the drain of the second pull-down transistor T4 are electrically connected to the first node Q, the source of the pull-up transistor T2 is connected to the clock signal CK, the drain of the pull-up transistor T2 and the drain of the first pull-down transistor T3 are electrically connected to the Nth level scan signal output terminal G(N), the source of the first pull-down transistor T3 and the source of the second pull-down transistor T4 are electrically connected to the second DC low-voltage power supply signal terminal VSSQ, the gate of the first pull-down transistor T3 and the gate of the second pull-down transistor T4 are electrically connected to the N+Mth level scan signal output terminal G(N+M), wherein M is a positive integer, and the value of M can be set according to the specific circuit level transmission relationship.

[0039] Combination Figure 1 and Figure 2 As shown, set Figure 2 The first-level gate drive circuit unit is shown, M is 1, the drain of the pull-up transistor T2 and the drain of the first pull-down transistor T3 are electrically connected to the N-level scan signal output terminal G(1), and the drain of the pull-up transistor T2 and the drain of the first pull-down transistor T3 are electrically connected to the second-level scan signal output terminal G(2). When the display panel switches from the on state to the off state, the N+M-level scan signal output terminal G(N+M) outputs the N+M-level scan signal to control the first pull-down transistor T3 and the second pull-down transistor T4 to turn on, and the first DC low-voltage power supply signal terminal VSSG performs a discharge action, and the voltage output by the first DC low-voltage power supply signal terminal VSSG changes from the first voltage -6V to the second voltage 30V, the field effect transistor MOS is turned on, and the second DC low-voltage power supply signal terminal VSSQ is quickly discharged through the discharge resistor Rdis, thereby clearing the charge of the first node Q, ensuring that the transistor is completely turned off when shutting down, and the storage capacitor is quickly discharged, so that the problem of bright line when shutting down can be solved.

[0040] like Figure 3 As shown, Figure 3A schematic diagram of another gate drive circuit unit provided for an embodiment of the present application, the gate drive circuit unit includes a pull-up control module 4, a pull-up module 5, a pull-down module 6 and a pull-down maintaining module 7, the pull-up control module 4 is electrically connected to the pull-up module 5, the pull-down module 6 and the pull-down maintaining module 7 at a first node Q, the pull-down module 6 is electrically connected to a first DC low-voltage power signal terminal VSSG and a second DC low-voltage power signal terminal VSSQ, respectively, the pull-down maintaining module 7 is electrically connected to the first DC low-voltage power signal terminal VSSG and the second DC low-voltage power signal terminal VSSQ, and the second DC low-voltage power signal terminal VSSQ is used to discharge the first node Q after each frame scan is completed.

[0041] like Figure 2 As shown, the pull-up control module 4 includes a first transistor T11, the pull-up module 5 includes a second transistor T21 and a third transistor T22, the pull-down module 6 includes a fourth transistor T31 and a fifth transistor T41, and the pull-down maintaining module 7 includes a sixth transistor T32, a seventh transistor T33, an eighth transistor T42, a ninth transistor T43, a tenth transistor T51, an eleventh transistor T52, a twelfth transistor T53, a thirteenth transistor T54, a fourteenth transistor T61, a fifteenth transistor T62, a sixteenth transistor T63, a seventeenth transistor T64, an eighteenth transistor T71, a nineteenth transistor T72, and a twentieth transistor T73.

[0042] Taking the N-th level gate drive circuit unit as an example, the gate of the first transistor T11 is connected to the N-3-th level start signal STV (N-3), the source of the first transistor T11 is connected to the N-3-th level scan signal G (N-3), the source of the second transistor T21 and the third transistor T22 is connected to the N-th level clock signal CK (N), the drain of the third transistor is connected to the N-th level transfer signal ST (N), the gate of the fourth transistor T31 and the fifth transistor T41 is connected to the N+3-th level transfer signal STN (N+3), and the gate of the eighteenth transistor T71 is connected to the start signal STV.

[0043] When the display panel switches from the on state to the off state, the start signal STV controls the eighteenth transistor T71 to turn on, and the first DC low-voltage power signal terminal VSSG performs a discharge action. The voltage output by the first DC low-voltage power signal terminal VSSG changes from the first voltage -6V to the second voltage 30V, and the field effect transistor MOS is turned on. The second DC low-voltage power signal terminal VSSQ is quickly discharged through the discharge resistor Rdis, thereby clearing the charge of the first node Q, ensuring that the transistor is completely turned off when shutting down, and quickly discharging the storage capacitor, thereby solving the problem of bright lines when shutting down.

[0044] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a discharge circuit and a display panel, wherein the discharge circuit includes a switch module, a first voltage divider module, a second voltage divider module and a discharge resistor, by electrically connecting one end of the first voltage divider module to the first DC low-voltage power supply signal end, the other end of the first voltage divider module to the control end of the switch module and one end of the second voltage divider module, the other end of the second voltage divider module to the input end of the switch module and the second DC low-voltage power supply signal end, the output end of the switch module to one end of the discharge resistor, and the other end of the discharge resistor to the ground wire, when the display panel is turned off, the switch module is turned on, and the second DC low-voltage power supply signal end can be quickly discharged through the discharge resistor, so that the storage capacitor of the pixel is quickly discharged, ensuring that when the display panel is turned off, the display panel gate drive circuit does not output a scanning signal that can turn on the thin-film transistor switch of the pixel, thereby solving the problem of bright lines still appearing on the liquid crystal display panel after being turned off.

[0045] In summary, although the present application is disclosed as above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application is based on the scope defined by the claims.

Claims

1. A discharge circuit, characterized in that: It includes a switch module, a first voltage divider module, a second voltage divider module and a discharge resistor, one end of the first voltage divider module is electrically connected to the first DC low-voltage power supply signal end, the other end of the first voltage divider module is electrically connected to the control end of the switch module and one end of the second voltage divider module, the other end of the second voltage divider module is electrically connected to the input end of the switch module and the second DC low-voltage power supply signal end, the output end of the switch module is electrically connected to one end of the discharge resistor, and the other end of the discharge resistor is electrically connected to the ground wire.

2. The discharge circuit according to claim 1, characterized in that: The switch module includes a field effect tube, a gate of the field effect tube is electrically connected to the first voltage divider module, a source of the field effect tube is electrically connected to the second voltage divider module and the second DC low-voltage power supply signal end, and a drain of the field effect tube is electrically connected to the discharge resistor.

3. The discharge circuit according to claim 2, characterized in that: The first voltage divider module includes a first resistor, one end of the first resistor is electrically connected to the first DC low-voltage power supply signal end, and the other end of the first resistor is electrically connected to the gate of the field effect tube.

4. The discharge circuit according to claim 3, characterized in that: The resistance value of the first resistor is greater than or equal to 8 kilohms and less than or equal to 12 kilohms.

5. The discharge circuit according to claim 2, characterized in that: The second voltage divider module includes a second resistor, one end of the second resistor is electrically connected to the gate of the field effect tube, and the other end of the second resistor is electrically connected to the source of the field effect tube and the second DC low-voltage power supply signal end.

6. The discharge circuit according to claim 5, characterized in that: The resistance value of the second resistor is greater than or equal to 1 kiloohm and less than or equal to 1.2 kiloohm.

7. The discharge circuit according to claim 2, characterized in that: The field effect tube is an N-type field effect tube.

8. The discharge circuit according to claim 1, characterized in that: The resistance value of the discharge resistor is greater than or equal to 180 ohms and less than or equal to 220 ohms.

9. The discharge circuit according to claim 1, characterized in that: The first voltage output by the first DC low-voltage power signal terminal is -6V, and the second voltage output by the first DC low-voltage power signal terminal is 30V; When the switch module is turned on, the voltage output by the first DC low-voltage power signal terminal is switched from the first voltage to the second voltage.

10. A display panel, characterized in that: It comprises a gate drive circuit and a discharge circuit as claimed in any one of claims 1 to 9, wherein the gate drive circuit comprises a plurality of cascaded gate drive circuit units, the gate drive circuit unit comprises a pull-up control module, a pull-up module and a pull-down module, the pull-up control module is electrically connected to the pull-up module and the pull-down module at a first node, the pull-down module is electrically connected to the second DC low-voltage power supply signal terminal, and the second DC low-voltage power supply signal terminal is used to discharge the first node after each frame scan is completed.

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