Signal conditioning circuit

Abstract

The utility model relates to a signal conditioning circuit. The signal conditioning circuit comprises a negation circuit. The input end of the negation circuit is used for being connected with the target output end of the power control circuit, and the output end of the negation circuit is used for being connected with the first input end of a driving circuit of the electric equipment; the target output end is any one of a plurality of PWM signal output ends of the power control circuit, and the negation circuit is used for receiving PWM signals output by the power control circuit; the target output end of the power control circuit is further connected with the second input end of the drive circuit. By adopting the signal conditioning circuit, the dependence and limitation on chip resources can be reduced.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a signal conditioning circuit. Background Art

[0002] With the popularity of electric and hybrid vehicles, the safety of motor control systems has become increasingly important. In the automotive field, overcurrent protection is a common protection mechanism used to prevent motor overload and damage.

[0003] At present, the existing overcurrent protection methods mostly adopt the protection method of positive and negative dual symmetrical overcurrent values, which requires designing a high and a low voltage value (ie, outputting complementary PWM signals) for comparison and then triggering the protection.

[0004] However, the above solution requires the chip to be equipped with more I / O pins when outputting complementary PWM signals, and has limited usage resources of the I / O pins, and is highly dependent on the chip. Utility Model Content

[0005] Based on this, it is necessary to provide a signal conditioning circuit that is highly adaptable and can reduce the dependence and limitation on chip resources.

[0006] A signal conditioning circuit, the signal conditioning circuit comprising:

[0007] an inversion circuit, wherein the input end of the inversion circuit is used to connect to the target output end of the power control circuit, and the output end of the inversion circuit is used to connect to the first input end of the drive circuit of the electric device; the target output end is any one of the multiple PWM signal output ends of the power control circuit, and the inversion circuit is used to receive the PWM signal output by the power control circuit;

[0008] Wherein, the target output terminal of the power control circuit is also connected to the second input terminal of the driving circuit.

[0009] In one embodiment, the negation circuit includes:

[0010] An inverter, wherein the input end of the inverter is used to connect to the target output end of the power control circuit, and the output end of the inverter is used to connect to the first input end of the driving circuit.

[0011] In one embodiment, the signal conditioning circuit further comprises:

[0012] A filter circuit, wherein the first input end of the filter circuit is connected to the output end of the inversion circuit, and the first output end of the filter circuit is used to connect to the first input end of the drive circuit; the second input end of the filter circuit is used to connect to the target output end of the power control circuit, and the second output end of the filter circuit is used to connect to the second input end of the drive circuit.

[0013] In one embodiment, the filtering circuit comprises:

[0014] A first filter, wherein an input end of the first filter is connected to an output end of the negation circuit, and an output end of the first filter is used to connect to a first input end of the driving circuit;

[0015] The second filter has an input end connected to a target output end of the power control circuit, and an output end of the second filter connected to a second input end of the driving circuit.

[0016] In one embodiment, the first filter and the second filter are both second-order filters.

[0017] In one embodiment, the signal conditioning circuit further comprises:

[0018] A sampling circuit, wherein the first input end of the sampling circuit is connected to the first output end of the filtering circuit, the second input end of the sampling circuit is connected to the second output end of the filtering circuit, the first output end of the sampling circuit is used to connect to the sampling end of the power control circuit, and the second output end of the sampling circuit is used to connect to the sampling end of the power control circuit.

[0019] In one embodiment, the sampling circuit includes:

[0020] A first sampling and filtering unit, wherein an input end of the first sampling and filtering unit is connected to a first output end of the filtering circuit, and an output end of the first sampling and filtering unit is used to connect to a sampling end of the power control circuit;

[0021] A second sampling and filtering unit, wherein the input end of the second sampling and filtering unit is connected to the second output end of the filtering circuit, and the output end of the second sampling and filtering unit is used to connect to the sampling end of the power control circuit.

[0022] In one embodiment, the signal conditioning circuit further comprises:

[0023] A comparison circuit, wherein the first input terminal of the comparison circuit is connected to the first output terminal of the filter circuit, the second input terminal of the comparison circuit is connected to the second output terminal of the filter circuit, the first reference terminal of the comparison circuit is used to access the first reference voltage, the second reference terminal of the comparison circuit is used to access the second reference voltage, and the output terminal of the comparison circuit is used to connect to the control signal receiving terminal of the power control circuit.

[0024] In one embodiment, the comparison circuit includes:

[0025] A first comparison unit, wherein an input end of the first comparison unit is connected to a first output end of the filter circuit, an output end of the first comparison unit is used to connect to a control signal receiving end of the power control circuit, and a reference end of the first comparison unit is used to access a first reference voltage;

[0026] The second comparison unit, the input end of the second comparison unit is connected to the second output end of the filter circuit, the output end of the second comparison unit is used to connect to the control signal receiving end of the power control circuit, and the reference end of the second comparison unit is used to access the second reference voltage.

[0027] In one embodiment, the comparison circuit further includes:

[0028] A first pull-up resistor, wherein a first end of the first pull-up resistor is used to access a first pull-up voltage, and a second end of the first pull-up resistor is respectively connected to an output end of the first comparison unit and an output end of the second comparison unit;

[0029] a third filter, wherein an input end of the third filter is connected to an output end of the first comparison unit and an output end of the second comparison unit respectively, and an output end of the third filter is used to connect to a control signal receiving end of the power control circuit;

[0030] A discharge unit, wherein an input end of the discharge unit is connected to an output end of the third filter, and an output end of the discharge unit is connected to a second end of the first pull-up resistor.

[0031] In one embodiment, the signal conditioning circuit further comprises:

[0032] A second pull-up resistor, wherein a first end of the second pull-up resistor is used to access a second pull-up voltage, and a second end of the second pull-up resistor is respectively connected to an output end of the inverter circuit and a first input end of the drive circuit;

[0033] A pull-down resistor, a first end of the pull-down resistor is grounded, and a second end of the pull-down resistor is used to connect the target output end of the power control circuit and the second input end of the drive circuit respectively.

[0034] The above signal conditioning circuit has at least the following beneficial effects:

[0035] Compared with the solution in the prior art that requires two I / O ports with complementary functions of the power control circuit to achieve dual-channel complementary PWM signal output, an inversion circuit is set at any PWM signal output end of the power control circuit to invert the original PWM signal, thereby obtaining two complementary PWM signals, reducing dependence on chip resources, saving the utilization of chip resource pins, and having strong applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 is a schematic diagram of the structure of a signal conditioning circuit according to an embodiment;

[0038] Figure 2 is a schematic diagram of the structure of a signal conditioning circuit in another embodiment;

[0039] Figure 3 FIG. 4 is a schematic diagram of the structure of a comparison circuit in an embodiment. DETAILED DESCRIPTION

[0040] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0042] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0043] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0044] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least part of an element” means part or all of an element.

[0045] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0046] At present, there are two main methods of hardware protection (symmetrical protection method) for motor phase current in the automotive field. One is to use pure hardware to set the overcurrent protection value, that is, resistor voltage division. However, this protection method cannot be changed after setting the protection value of the whole machine, which is not conducive to one model corresponding to multiple motor controls with different current protection values; the other is, as described in the background technology, to set the overcurrent protection value through software settings and send complementary PWM signals. This method can meet the use of motors with different overcurrent protection values ​​by setting different overcurrent values ​​through software. However, this method requires the power control circuit (such as MCU / DSP) to use two I / O ports, and the use requirements of these two I / Os are relatively high. They must be in the form of PWM complementary output to meet the symmetrical design of the current protection value (output complementary PWM signals), so that subsequent comparisons can be made based on the complementary PWM signals, and overcurrent protection can be triggered based on the comparison results.

[0047] It can be seen that the existing technical solutions have poor applicability due to their strict requirements on I / O pins that require more power control circuits and the usage resources of I / O pins.

[0048] Based on the above reasons, in an exemplary embodiment, Figure 1 As shown, a signal conditioning circuit is provided, and the signal conditioning circuit includes an inversion circuit 2. The input end of the inversion circuit 2 is used to connect to the target output end of the power control circuit 30, and the output end of the inversion circuit 2 is used to connect to the first input end of the drive circuit 50 of the electric device; the target output end is any one of the multiple PWM signal output ends of the power control circuit 30, and the inversion circuit 2 is used to receive the PWM signal output by the power control circuit 30; wherein, the target output end of the power control circuit 30 is also connected to the second input end of the drive circuit 50.

[0049] The inversion circuit 2 is used to invert the level of the input signal, for example, in the application of PWM signal, it is used to convert the high level (logic "1") to the low level (logic "0"), and vice versa. The power control circuit 30 may refer to a DSP (Digital Signal Processing) chip or an MCU (Digital Signal Processing). The electric device may refer to a vehicle motor. In a specific embodiment, the power control circuit 30 may refer to the power control circuit of the vehicle motor.

[0050] Exemplarily, the power control circuit 30 (MCU / DSP) outputs a PWM signal through a port, and the signal contains information required to control the electrical equipment (such as the vehicle motor), such as the speed and direction of the motor. The inversion circuit 2 receives the PWM signal from the power control circuit 30, and inverts the level of the PWM signal, that is, the original high level (logic "1") becomes a low level (logic "0"), and the low level becomes a high level. Based on this, the PWM signal output by the power control circuit 30 is directly input to the driving circuit 50 of the electrical equipment, that is, two complementary PWM signals are formed: the original PWM signal and the inverted PWM signal.

[0051] Compared with the solution in the prior art that requires two I / O ports with complementary functions of the power control circuit 30 to achieve dual-channel complementary PWM signal output, the above-mentioned signal conditioning circuit sets an inversion circuit 2 at any PWM signal output end of the power control circuit 30 to invert the original PWM signal, thereby obtaining two complementary PWM signals, reducing dependence on chip resources, saving the utilization of chip resource pins, and having strong applicability.

[0052] In an exemplary embodiment, the inverter circuit 2 includes an inverter. The input end of the inverter is used to connect to the target output end of the power control circuit 30 , and the output end of the inverter is used to connect to the first input end of the driving circuit 50 .

[0053] Among them, Figure 2 As shown, the inverter may refer to a NOT gate U1, or may refer to a logic circuit formed by a transistor (such as a BJT or a MOSFET), or a TTL (Transistor-Transistor Logic) circuit of a transistor and a diode.

[0054] In this embodiment, the inverter is a basic logic gate circuit with a very simple structure, which can invert the level of the input signal. The use of the AND gate U1 can simplify the circuit design, and no complex circuit configuration is required to achieve the inversion of the signal, thereby reducing the volume of the entire signal conditioning circuit. Secondly, the NOT gate U1 has a fast response, which can meet the use requirements of fast-switching PWM signals and ensure that the inversion of the signal does not introduce significant delays.

[0055] In an exemplary embodiment, the signal conditioning circuit further includes:

[0056] The filter circuit 4 has a first input end connected to the output end of the inversion circuit 2, and a first output end of the filter circuit 4 is used to connect to a first input end of the drive circuit 50; a second input end of the filter circuit 4 is used to connect to a target output end of the power control circuit 30, and a second output end of the filter circuit 4 is used to connect to a second input end of the drive circuit 50.

[0057] The filter circuit 4 is used to remove unwanted components, such as noise or unnecessary frequency components, from the signal, and only allow the desired frequency components to pass.

[0058] Exemplarily, the two input ends of the filter circuit 4 are respectively connected to the output of the inversion circuit 2 and the target output end of the power control circuit 30, and simultaneously receive the original PWM signal and the inverted PWM signal to remove noise and unnecessary frequency components in the two PWM signals, ensuring the quality and stability of the signals, thereby providing an accurate signal source for subsequent overcurrent protection based on the original PWM signal and the inverted PWM signal.

[0059] In an exemplary embodiment, Figure 2 As shown, the filter circuit 4 includes a first filter 42 and a second filter 44. The input end of the first filter 42 is connected to the output end of the negation circuit 2, and the output end of the first filter 42 is used to connect to the first input end of the drive circuit 50; the input end of the second filter 44 is used to connect to the target output end of the power control circuit 30, and the output end of the second filter 44 is used to connect to the second input end of the drive circuit 50.

[0060] Exemplarily, by respectively providing the first filter 42 and the second filter 44 , not only can the interference of the original PWM signal and the inverted PWM signal be filtered out respectively, but also the PWM signal can be converted into an analog quantity.

[0061] In an exemplary embodiment, Figure 2 As shown, the first filter 42 and the second filter 44 are both second order filters.

[0062] In this embodiment, the second-order filter can provide a faster attenuation rate than the first-order filter, so that high-frequency noise and unwanted signal components can be more effectively suppressed. In addition, the second-order filter has a sharper frequency response, provides a flatter passband within the required frequency range, and rapidly attenuates outside the cutoff frequency.

[0063] In an exemplary embodiment, Figure 2 As shown, the signal conditioning circuit further includes a sampling circuit 6. A first input end of the sampling circuit 6 is connected to a first output end of the filter circuit 4, a second input end of the sampling circuit 6 is connected to a second output end of the filter circuit 4, a first output end of the sampling circuit 6 is used to connect to a sampling end of the power control circuit 30, and a second output end of the sampling circuit 6 is used to connect to a sampling end of the power control circuit 30.

[0064] Exemplarily, the actual analog quantity (IAC_H and IAC_L) converted by the filter circuit 4 is fed back to the sampling end of the power control circuit 30 through the sampling circuit 6, and compared with the preset overcurrent protection threshold to determine whether they are consistent. In the case of inconsistency, the duty cycle of the PWM signal output by the power control circuit 30 is adjusted so that the actual analog quantity (IAC_H and IAC_L) reaches the preset overcurrent protection threshold, thereby avoiding the internal impedance of the PWM signal output port of the power control circuit 30 affecting the duty cycle of the PWM signal, resulting in a large deviation between the actual analog quantity and the preset overcurrent protection threshold.

[0065] In this embodiment, by setting the sampling circuit 6, the actual analog quantity (IAC_H and IAC_L) is collected in real time and the duty cycle of the output PWM signal is adjusted, so that the electrical equipment can operate safely within the preset over-protection threshold and achieve high-precision protection.

[0066] In an exemplary embodiment, Figure 2 As shown, the sampling circuit 6 includes a first sampling filter unit 62 and a second sampling filter unit 64. The input end of the first sampling filter unit 62 is connected to the first output end of the filter circuit 4, and the output end of the first sampling filter unit 62 is used to connect to the sampling end of the power control circuit 30; the input end of the second sampling filter unit 64 is connected to the second output end of the filter circuit 4, and the output end of the second sampling filter unit 64 is used to connect to the sampling end of the power control circuit 30.

[0067] Among them, Figure 2 As an example of the signal conditioning circuit shown in FIG. 1 , the first sampling filter unit 62 includes a resistor R7 and a capacitor C5, and the second sampling filter unit 64 includes a resistor R8 and a capacitor C6. The specific connection relationship can be directly obtained from Figure 2 It should be noted that the above diagram is only for illustrative purposes, and the specific structures of the first sampling filter unit and the second filtering unit are not limited to the following. Figure 2 The structure shown.

[0068] Exemplarily, the actual analog quantities (IAC_H and IAC_L) obtained after conversion by the filter circuit 4 are respectively passed through the first sampling filter unit 62 and the second sampling filter unit 64 to obtain the sampling values ​​(IAC_AD_H and IAC_AD_L), and are input to the sampling end of the power control circuit 30, so that the power control circuit 30 adjusts the duty cycle of the output PWM signal. In this embodiment, a specific implementation method is provided for the implementation of the sampling circuit 6.

[0069] In an exemplary embodiment, Figure 3As shown, the signal conditioning circuit further includes a comparison circuit 8. A first input terminal of the comparison circuit 8 is connected to a first output terminal of the filter circuit 4, a second input terminal of the comparison circuit 8 is connected to a second output terminal of the filter circuit 4, a first reference terminal of the comparison circuit 8 is used to access a first reference voltage, a second reference terminal of the comparison circuit 8 is used to access a second reference voltage, and an output terminal of the comparison circuit 8 is used to connect to a control signal receiving terminal of the power control circuit 30.

[0070] Among them, since the amplitudes of the two actual analog quantities output by the filter circuit 4 are equal, the first reference voltage and the second reference voltage can be equal. Further, the first reference voltage and the second reference voltage can both be set to a preset overcurrent protection threshold.

[0071] For example, Figure 3 As shown, the actual analog value IAC_H output from the first output terminal of the filter circuit 4 is input to the first input terminal of the comparison circuit 8, and is compared with the first reference voltage PC_U1_AI connected to the first reference terminal; and the actual analog value IAC_L output from the second output terminal of the filter circuit 4 is input to the second input terminal of the comparison circuit 8, and is compared with the second reference voltage PC_U1_AI connected to the second reference terminal. When the output terminal of the comparison circuit 8 outputs a low level, it indicates that an overcurrent phenomenon occurs at this time. At this time, after receiving the low level signal, the power control circuit 30 performs an overcurrent protection operation to avoid damage to the electrical equipment.

[0072] In this embodiment, by setting a comparison circuit 8, the actual analog quantity (IAC_H and IAC_L) obtained based on the output of the filter circuit 4 is compared with the preset overcurrent protection threshold to determine whether an overcurrent phenomenon occurs. When an overcurrent phenomenon occurs, the power control circuit 30 can perform an overcurrent protection operation in time to avoid damage to electrical equipment.

[0073] In an exemplary embodiment, Figure 3 As shown, the comparison circuit 8 includes a first comparison unit 82 and a second comparison unit 84. The input end of the first comparison unit 82 is connected to the first output end of the filter circuit 4, the output end of the first comparison unit 82 is used to connect to the control signal receiving end of the power control circuit 30, and the reference end of the first comparison unit 82 is used to access the first reference voltage; the input end of the second comparison unit 84 is connected to the second output end of the filter circuit 4, the output end of the second comparison unit 84 is used to connect to the control signal receiving end of the power control circuit 30, and the reference end of the second comparison unit 84 is used to access the second reference voltage.

[0074] Among them, Figure 3 As shown, the first comparison unit may refer to the first comparator X1 and its peripheral circuits; the second comparison unit may refer to the second comparator X2 and its peripheral circuits. Figure 3 As shown, in addition to connecting the corresponding actual analog quantity and reference voltage to the input terminal and reference terminal of the first comparator X1, and the input terminal and reference terminal of the second comparator X2, filters can be set between the above input terminals and reference terminals according to actual needs to eliminate unnecessary signal interference. Figure 3 As shown, a filter composed of a resistor R11 and a capacitor C11 can be provided at the input end of the first comparator X1, a filter composed of a resistor R14 and a capacitor C7 can be provided at the reference end of the first comparator X1, a filter composed of a resistor R13 and a capacitor C9 can be provided at the input end of the second comparator X2, and a filter composed of a resistor R12 and a capacitor C10 can be provided at the reference end of the second comparator X2. The specific connection relationship of the above electronic components can be obtained from Figure 3 In addition, the first comparison unit 82 and the second comparison unit 84 can also be logic gate circuits, digital potentiometers and other circuits, for example, a NAND gate can be used to detect whether one signal is higher than another signal plus a fixed threshold.

[0075] For example, Figure 3 The structural schematic diagram of the comparison circuit shown in the figure is used as an example to illustrate that the actual analog value IAC_H output from the first output end of the filter circuit 4 is input to the input end of the first comparator X1, and is compared with the first reference voltage PC_U1_AI connected to the reference end of the first comparator X1; and the actual analog value IAC_L output from the second output end of the filter circuit 4 is input to the input end of the second comparator X2, and is compared with the second reference voltage PC_U1_AI connected to the reference end of the second comparator X2. When the output end of the first comparator X1 and the output end of the second comparator X2 both output low levels, it means that an overcurrent phenomenon occurs at this time. At this time, after receiving the low-level signal, the power control circuit 30 performs an overcurrent protection operation to avoid damage to the electrical equipment. In this embodiment, a specific implementation method is provided for the implementation of the comparison circuit 8.

[0076] In an exemplary embodiment, Figure 3 As shown, the comparison circuit 8 further includes a first pull-up resistor R16, a third filter 86 and a discharge unit 88. The first end of the first pull-up resistor R16 is used to access the first pull-up voltage, and the second end of the first pull-up resistor R16 is respectively connected to the output end of the first comparison unit 82 and the output end of the second comparison unit 84; the input end of the third filter 86 is respectively connected to the output end of the first comparison unit 82 and the output end of the second comparison unit 84, and the output end of the third filter 86 is used to connect to the control signal receiving end of the power control circuit 30; the input end of the discharge unit 88 is connected to the output end of the third filter 86, and the output end of the discharge unit 88 is connected to the second end of the first pull-up resistor R16.

[0077] In a specific embodiment, the first pull-up voltage may be the same as the supply voltage of the first comparison unit 84, that is, Figure 3 As shown, the first end of the first pull-up resistor R16 can be connected to the positive power supply terminal of the second comparator X2 to share the power supply voltage V2, thereby simplifying the circuit structure. Figure 3 As shown, the third filter 82 includes a resistor R15 and a capacitor C8, and the discharge unit 84 includes a diode D1 and a resistor R17. The specific connection relationship can be obtained from the figure and will not be repeated here.

[0078] For example, Figure 3 As shown, when the comparison circuit 8 starts to work, the power supply voltage V2 of the second comparator X2 will charge the capacitor C8 through the first pull-up resistor R16 and the resistor R15. When the protection condition is triggered (for example, the first comparator X1 and the second comparator X2 both output a low level), the charge on the capacitor C8 is discharged through the diode D1 and the resistor R17 to avoid high voltage across the capacitor C8 and damage to other electronic components in the circuit.

[0079] In this embodiment, the third filter 88 is provided to improve the signal quality of the control signal receiving end of the power control circuit 30, and the first pull-up resistor R16 is provided to provide a certain reference voltage level for the circuit and reduce noise, and the discharge unit 86 can quickly discharge the charge on the capacitor to prevent the voltage from rising to a level that may damage other electronic components in the circuit. The combination of the above parts improves the stability and safety of the motor control system, and effectively protects the circuit from damage caused by overcurrent.

[0080] In an exemplary embodiment, Figure 2 As shown, the signal conditioning circuit further includes a second pull-up resistor R3 and a pull-down resistor R4. The first end of the second pull-up resistor R3 is used to access the second pull-up voltage, and the second end of the second pull-up resistor R3 is respectively connected to the output end of the inverter circuit 2 and the first input end of the drive circuit 50; the first end of the pull-down resistor R4 is grounded, and the second end of the pull-down resistor R4 is respectively connected to the target output end of the power control circuit 30 and the second input end of the drive circuit 50.

[0081] Among them, Figure 3 As shown, the second pull-up voltage may refer to the power supply voltage V1.

[0082] Exemplarily, the second pull-up resistor R3 can clamp the port at a high level through the power supply V1, and the pull-down resistor R4 can clamp the port at a low level, avoiding random states caused by the pin being suspended, improving signal stability and reliability, and thus avoiding false triggering.

[0083] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0084] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0085] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A signal conditioning circuit, characterized in that: The signal conditioning circuit comprises: an inversion circuit, wherein the input end of the inversion circuit is used to connect to the target output end of the power control circuit, and the output end of the inversion circuit is used to connect to the first input end of the driving circuit of the electric device; the target output end is any one of the multiple PWM signal output ends of the power control circuit, and the inversion circuit is used to receive the PWM signal output by the power control circuit; Wherein, the target output terminal of the power control circuit is also connected to the second input terminal of the driving circuit.

2. The signal conditioning circuit according to claim 1, characterized in that: The negation circuit comprises: An inverter, wherein the input end of the inverter is used to connect to the target output end of the power control circuit, and the output end of the inverter is used to connect to the first input end of the drive circuit.

3. The signal conditioning circuit according to any one of claims 1 or 2, characterized in that: The signal conditioning circuit further includes: A filter circuit, wherein the first input end of the filter circuit is connected to the output end of the inversion circuit, and the first output end of the filter circuit is used to connect to the first input end of the drive circuit; the second input end of the filter circuit is used to connect to the target output end of the power control circuit, and the second output end of the filter circuit is used to connect to the second input end of the drive circuit.

4. The signal conditioning circuit according to claim 3, characterized in that: The filtering circuit comprises: A first filter, wherein an input end of the first filter is connected to an output end of the negation circuit, and an output end of the first filter is used to connect to a first input end of the driving circuit; A second filter, wherein the input end of the second filter is used to connect to the target output end of the power control circuit, and the output end of the second filter is used to connect to the second input end of the driving circuit.

5. The signal conditioning circuit according to claim 4, characterized in that: The first filter and the second filter are both second-order filters.

6. The signal conditioning circuit according to claim 3, characterized in that: The signal conditioning circuit further includes: A sampling circuit, wherein the first input end of the sampling circuit is connected to the first output end of the filtering circuit, the second input end of the sampling circuit is connected to the second output end of the filtering circuit, the first output end of the sampling circuit is used to connect to the sampling end of the power control circuit, and the second output end of the sampling circuit is used to connect to the sampling end of the power control circuit.

7. The signal conditioning circuit according to claim 6, characterized in that: The sampling circuit comprises: a first sampling and filtering unit, wherein an input end of the first sampling and filtering unit is connected to a first output end of the filtering circuit, and an output end of the first sampling and filtering unit is used to connect to a sampling end of the power control circuit; A second sampling and filtering unit, wherein the input end of the second sampling and filtering unit is connected to the second output end of the filtering circuit, and the output end of the second sampling and filtering unit is used to connect to the sampling end of the power control circuit.

8. The signal conditioning circuit according to claim 6, characterized in that: The signal conditioning circuit further comprises: A comparison circuit, wherein the first input terminal of the comparison circuit is connected to the first output terminal of the filter circuit, the second input terminal of the comparison circuit is connected to the second output terminal of the filter circuit, the first reference terminal of the comparison circuit is used to access a first reference voltage, the second reference terminal of the comparison circuit is used to access a second reference voltage, and the output terminal of the comparison circuit is used to connect to a control signal receiving terminal of the power control circuit.

9. The signal conditioning circuit according to claim 8, characterized in that: The comparison circuit comprises: a first comparing unit, wherein an input end of the first comparing unit is connected to a first output end of the filtering circuit, an output end of the first comparing unit is used to connect to a control signal receiving end of the power control circuit, and a reference end of the first comparing unit is used to access the first reference voltage; A second comparison unit, wherein the input end of the second comparison unit is connected to the second output end of the filter circuit, the output end of the second comparison unit is used to connect to the control signal receiving end of the power control circuit, and the reference end of the second comparison unit is used to access the second reference voltage.

10. The signal conditioning circuit according to claim 9, characterized in that: The comparison circuit further comprises: A first pull-up resistor, wherein a first end of the first pull-up resistor is used to access a first pull-up voltage, and a second end of the first pull-up resistor is respectively connected to an output end of the first comparison unit and an output end of the second comparison unit; a third filter, wherein an input end of the third filter is respectively connected to an output end of the first comparison unit and an output end of the second comparison unit, and an output end of the third filter is used to connect to a control signal receiving end of the power control circuit; A discharge unit, wherein an input end of the discharge unit is connected to an output end of the third filter, and an output end of the discharge unit is connected to a second end of the first pull-up resistor.

11. The signal conditioning circuit according to claim 1, characterized in that: The signal conditioning circuit further includes: A second pull-up resistor, wherein a first end of the second pull-up resistor is used to access a second pull-up voltage, and a second end of the second pull-up resistor is respectively connected to an output end of the barring circuit and a first input end of the driving circuit; A pull-down resistor, wherein a first end of the pull-down resistor is grounded, and a second end of the pull-down resistor is used to connect a target output end of the power control circuit and a second input end of the drive circuit respectively.

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