USOT adapter plate
By designing the USOT adapter board, using the pins to communicate with the optical module, combining the slow-start circuit and the mode selection circuit, the problems of high manufacturing cost and low adaptability of the USOT optical module development board are solved, and compatibility with the existing test environment is achieved and development costs are reduced.
Patent Information
- Application Number
- CN202421291831.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-06
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2034-06-06
AI Technical Summary
USOT optical module development board has high manufacturing cost and low adaptability, making it difficult to compatible with existing testing environments.
A USOT adapter board is designed, including a USOT optical module, an adapter board, a row of the row and a needle. It is communicated with the optical module through the row of the row, and a slow-start circuit and a mode selection circuit are set to realize the multiplexing of LOS/Txdis and IIC modes.
Without changing the test system that adapts to gold fingers, making the USOT optical module compatible with the existing test environment reduces development and manufacturing costs and increases adaptability.
Smart Images

Figure CN222618837U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the field of optical modules, and in particular relates to a USOT adapter plate. Background Art
[0002] With the widespread popularity of optical cables and optical modems, optical communications have penetrated into every aspect of our lives. As the communication hub of optical communications, optical modules play an important role in optical communication technology. As an ultra-small and compact packaged optical module, USOT has significant advantages over other packaged optical modules in terms of small size, light weight, and diversified application scenarios, which makes USOT optical modules have a very wide range of applications.
[0003] The USOT optical module has obvious differences in packaging from common SFP, SFP+, XFP and other optical modules. The difference is mainly reflected in the fact that the electrical interface of USOT is 1*10PIN pin header, while the electrical interface of the more common optical module is 20PIN gold finger. This packaging enables the USOT optical module to be firmly fixed to the use system by welding or screws, and has the advantages of anti-shake and anti-vibration. It is applied to use scenarios such as ships and aircraft. At the same time, the special electrical interface form makes the production of USOT optical modules difficult to be compatible with the existing test environment. Redesigning the development board is costly and requires the construction of an independent workstation. Utility Model Content
[0004] In view of the above-mentioned deficiencies in the prior art, the utility model provides a USOT adapter board which solves the problems of high manufacturing cost and low adaptability of the current USOT development board.
[0005] In order to achieve the above-mentioned invention object, the technical solution adopted by the utility model is: a USOT adapter board, including a USOT optical module, an adapter board, a female header and a pin header;
[0006] The USOT optical module is fixedly connected to the adapter board, the female header and the pin header are arranged on the upper surface of the adapter board, the female header is plug-in connected to the pin header of the USOT optical module, and the pin header is communicatively connected to the optical module.
[0007] Furthermore: the positioning post of the USOT optical module passes through the positioning hole of the adapter plate and is fixedly connected to the adapter plate.
[0008] Furthermore: a gold finger is arranged on the right side of the adapter board, and the gold finger is respectively connected to the slow-start circuit and the mode selection circuit, and the slow-start circuit and the mode selection circuit are both connected to the busbar.
[0009] Further: the slow-start circuit includes a chip U4, a grounding resistor R6, a grounding resistor R7, a grounding resistor R8, a grounding resistor R9, a grounding capacitor C1, a capacitor C2, a capacitor C3 and a grounding capacitor C4, and the slow-start circuit includes a chip U4 whose model is SPP2323TDN6RGB;
[0010] Among them, the pin No. 1 of the chip U4 is respectively connected to the grounding resistor R6, one end of the capacitor C2 and the VCC power supply, the pin No. 2 of the chip U4 is respectively connected to the other end of the capacitor C2 and the grounding capacitor C7, and the pin No. 3 of the chip U4 is respectively connected to the pin No. 8 of the chip U4 and the grounding capacitor C4;
[0011] Pin 4 of the chip U4 is respectively connected to one end of the capacitor C3, the grounding resistor R9 and the VCC power supply, pin 5 of the chip U4 is respectively connected to the other end of the capacitor C3 and the grounding resistor R8, and pin 6 of the chip U4 is respectively connected to pin 7 of the chip U4 and the grounding capacitor C1.
[0012] Further: the mode selection circuit includes an analog switch U1 and an analog switch U2, and the models of the analog switch U1 and the analog switch U2 are both TS5A3160;
[0013] Among them, pin 1 of the analog switch U1 is connected to the SCL pin of the gold finger, pin 2 of the analog switch U1 is grounded, pin 3 of the analog switch U1 is connected to the LOS pin of the gold finger, pin 4 of the analog switch U1 is connected to the SCL_LOS pin of the mother row 3, pin 5 of the analog switch U1 is connected to the VCC power supply of the gold finger, and pin 6 of the analog switch U1 is respectively connected to the RS0 pin of the gold finger, the pull-up resistor R2 and the pull-down resistor R3;
[0014] Pin 1 of the analog switch U2 is connected to the SDA pin of the gold finger, pin 2 of the analog switch U2 is grounded, pin 3 of the analog switch U2 is connected to the TXDIS pin of the gold finger, pin 4 of the analog switch U2 is connected to the SDA_TXDIS pin of the mother row 3, pin 5 of the analog switch U2 is connected to the VCC power supply of the gold finger, and pin 6 of the analog switch U2 is respectively connected to the RS1 pin of the gold finger, the pull-up resistor R4 and the pull-down resistor R5.
[0015] The beneficial effects of the utility model are:
[0016] (1) The utility model provides a USOT adapter board, which provides a basic adjustment and testing platform for the USOT optical module. Without changing the test system of the gold finger adapter, the USOT optical module is compatible with the existing test environment, thereby reducing the development and manufacturing costs.
[0017] (2) The utility model supports ordinary and IIC multiplexed USOT optical modules, which can be connected to the IIC pad of the ordinary USOT optical module PCBA through a pin header to realize communication with the host computer; the pin multiplexing of LOS / Txdis and IIC can also be realized through a mode selection circuit, thereby increasing the adaptability of the USOT adapter board. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 It is a schematic diagram of a USOT adapter board of the utility model.
[0019] Figure 2 This is a schematic diagram of the adapter board PCB.
[0020] Figure 3 This is the schematic diagram of the slow-start circuit.
[0021] Figure 4 Schematic diagram of the mode selection circuit.
[0022] Among them: 1. USOT optical module; 2. Adapter board; 3. Female header; 4. Pin header. DETAILED DESCRIPTION
[0023] The specific implementation modes of the present invention are described below to facilitate the understanding of the present invention by those skilled in the art. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those skilled in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.
[0024] like Figure 1 As shown, in one embodiment of the present utility model, a USOT adapter board includes a USOT optical module 1, an adapter board 2, a female header 3 and a pin header 4;
[0025] Among them, the USOT optical module 1 is fixedly connected to the adapter board 2, the female header 3 and the pin header 4 are arranged on the upper surface of the adapter board 2, the female header 3 is plug-in connected to the pin header of the USOT optical module 1, and the pin header 4 is communicatively connected to the module 1.
[0026] The female header 3 is used to connect to the USOT optical module 1, and the pin header 4 is used to connect to the USOT optical module 1 for host computer communication.
[0027] In this embodiment, the female header 3 is plug-in connected to the USOT optical module 1, and the pin header 4 is connected to the USOT optical module 1 by flying wire. For ordinary optical modules, the female header 3 is used for power supply and signal transmission of the USOT optical module 1, and the pin header 4 is used for adjustment and testing of the USOT optical module 1; for IIC multiplexed optical modules, the female header 3 is used for power supply, signal transmission and adjustment and testing of the USOT optical module 1, and the pin header 4 has no practical function.
[0028] The positioning post of the USOT optical module 1 passes through the positioning hole of the adapter plate 2 and is fixedly connected to the adapter plate 2 .
[0029] In this embodiment, the pin header 4 includes SDA and SCL pins of the IIC, which can be connected to the USOT optical module 1 through flying wires.
[0030] like Figure 2 As shown, a gold finger is provided on the right side of the adapter board 2 , and the gold finger is respectively connected to the slow-start circuit and the mode selection circuit, and the slow-start circuit and the mode selection circuit are both connected to the motherboard 3 .
[0031] The slow-start circuit includes a chip U4, a grounding resistor R6, a grounding resistor R7, a grounding resistor R8, a grounding resistor R9, a grounding capacitor C1, a capacitor C2, a capacitor C3 and a grounding capacitor C4. The slow-start circuit includes a chip U4 whose model is SPP2323TDN6RGB. The VCC_IN of the slow-start circuit is connected and input by a gold finger VCC power supply. The power supply voltage is processed by the slow-start circuit and output to VCC_OUT and VCC_OUT2, which are respectively connected to VCCTX and VCCRX of the motherboard 3.
[0032] Among them, the pin No. 1 of the chip U4 is respectively connected to the grounding resistor R6, one end of the capacitor C2 and the VCC power supply, the pin No. 2 of the chip U4 is respectively connected to the other end of the capacitor C2 and the grounding capacitor C7, and the pin No. 3 of the chip U4 is respectively connected to the pin No. 8 of the chip U4 and the grounding capacitor C4;
[0033] Pin 4 of the chip U4 is respectively connected to one end of the capacitor C3, the grounding resistor R9 and the VCC power supply, pin 5 of the chip U4 is respectively connected to the other end of the capacitor C3 and the grounding resistor R8, and pin 6 of the chip U4 is respectively connected to pin 7 of the chip U4 and the grounding capacitor C1.
[0034] In this embodiment, the slow-start circuit is composed of two MOS tubes and related peripheral circuits. After VCC enters the adapter board 2 through the gold finger, it flows to the transmitting power VCCT and the receiving power VCCR of the 1*10PIN mother row 3 after delaying the slow-start circuit. The slow-start circuit complies with the timing requirements of the module for the power supply by delaying the entry of the power supply, thereby ensuring the normal startup of the module.
[0035] The mode selection circuit includes an analog switch U1 and an analog switch U2 , and the models of the analog switch U1 and the analog switch U2 are both TS5A3160.
[0036] Pin 1 of the analog switch U1 is connected to the SCL pin of the gold finger, pin 2 of the analog switch U1 is grounded, pin 3 of the analog switch U1 is connected to the LOS pin of the gold finger, pin 4 of the analog switch U1 is connected to the SCL_LOS pin of the mother row 3, pin 5 of the analog switch U1 is connected to the VCC power supply of the gold finger, and pin 6 of the analog switch U1 is respectively connected to the RS0 pin of the gold finger, the pull-up resistor R2, and the pull-down resistor R3;
[0037] Pin 1 of the analog switch U2 is connected to the SDA pin of the gold finger, pin 2 of the analog switch U2 is grounded, pin 3 of the analog switch U2 is connected to the TXDIS pin of the gold finger, pin 4 of the analog switch U2 is connected to the SDA_TXDIS pin of the mother row 3, pin 5 of the analog switch U2 is connected to the VCC power supply of the gold finger, and pin 6 of the analog switch U2 is respectively connected to the RS1 pin of the gold finger, the pull-up resistor R4 and the pull-down resistor R5;
[0038] The above gold finger RS0 and RS1 pins are controlled by the host computer. When the mode is selected, it can be triggered by the level control of RS0 and RS1 by the host computer, or it can be triggered by the pull-up or pull-down of the R2, R3, R4, and R5 selective patches.
[0039] In this embodiment, the mode selection circuit is composed of two groups of analog switches, and the adapter board 2 is configured with two modes: LOS / Txdis mode and IIC mode. In LOS / Txdis mode, pins 5 and 6 of the header 3 are connected to the gold finger LOS and Txdis pins respectively; in IIC mode, pins 5 and 6 of the header 3 are connected to the gold finger SCL and SDA pins respectively. The pins of the header 3 are shown in Table 1.
[0040] Table 1 Pin information of female header 3
[0041]
[0042] The working process provided by the utility model is as follows: before the debugging process, the soft start circuit performs power-on delay, and the mode selection circuit selects the LOS / Txdis and IIC modes of the No. 5 pin and the No. 6 pin in the female header 3. When the IIC mode is selected to debug and test the USOT adapter board, the USOT optical module 1 is connected to the host computer through the female header 3 and the pin header 4 in sequence, and when the LOS / Txdis mode is selected to debug and test the USOT adapter board, the USOT optical module 1 is connected to the host computer through the female header 3 and the gold finger in sequence, and the function debugging and performance testing of the USOT optical module 1 are performed through the host computer.
[0043] The beneficial effects of the utility model are as follows: the utility model provides a USOT adapter board, which provides a basic adjustment and testing platform for the USOT optical module 1, and makes the USOT optical module 1 compatible with the existing test environment without changing the test system of the gold finger adapter, thereby reducing the development and manufacturing costs.
[0044] The utility model supports a USOT optical module 1 for common and IIC multiplexing, which can be connected to the IIC pad of the PCBA in the common USOT optical module through a pin header 4 to realize communication with a host computer; the pin multiplexing of LOS / Txdis and IIC can also be realized through a mode selection circuit, thereby increasing the adaptability of the USOT adapter board.
[0045] In the description of the present invention, it is necessary to understand that the orientation or positional relationship indicated by the terms "center", "thickness", "upper", "lower", "horizontal", "top", "bottom", "inner", "outer", "radial", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are used only for descriptive purposes, and cannot be understood as indicating or implying the relative importance or the number of implicitly specified technical features. Therefore, the features defined by "first", "second", and "third" may explicitly or implicitly include one or more of the features.
Claims
1. A USOT adapter board, characterized in that: It includes a USOT optical module (1), an adapter plate (2), a female header (3) and a pin header (4); The USOT optical module (1) is fixedly connected to the adapter plate (2), the female header (3) and the pin header (4) are arranged on the upper surface of the adapter plate (2), the female header (3) is plug-in connected to the pin header of the USOT optical module (1), and the pin header (4) is communicatively connected to the USOT optical module (1).
2. The USOT adapter plate according to claim 1, characterized in that: The positioning column of the USOT optical module (1) passes through the positioning hole of the adapter plate (2) and is fixedly connected to the adapter plate (2).
3. The USOT adapter plate according to claim 1, characterized in that: A gold finger is provided on the right side of the adapter board (2), and the gold finger is respectively connected to the slow start circuit and the mode selection circuit, and the slow start circuit and the mode selection circuit are both connected to the busbar (3).
4. The USOT adapter plate according to claim 3, characterized in that: The slow-start circuit includes a chip U4, a grounding resistor R6, a grounding resistor R7, a grounding resistor R8, a grounding resistor R9, a grounding capacitor C1, a capacitor C2, a capacitor C3 and a grounding capacitor C4. The slow-start circuit includes a chip U4 whose model is SPP2323TDN6RGB; Among them, the pin No. 1 of the chip U4 is respectively connected to the grounding resistor R6, one end of the capacitor C2 and the VCC power supply, the pin No. 2 of the chip U4 is respectively connected to the other end of the capacitor C2 and the grounding capacitor C7, and the pin No. 3 of the chip U4 is respectively connected to the pin No. 8 of the chip U4 and the grounding capacitor C4; Pin 4 of the chip U4 is respectively connected to one end of the capacitor C3, the grounding resistor R9 and the VCC power supply, pin 5 of the chip U4 is respectively connected to the other end of the capacitor C3 and the grounding resistor R8, and pin 6 of the chip U4 is respectively connected to pin 7 of the chip U4 and the grounding capacitor C1.
5. The USOT adapter plate according to claim 4, characterized in that: The mode selection circuit includes an analog switch U1 and an analog switch U2, and the models of the analog switch U1 and the analog switch U2 are both TS5A3160; wherein, pin 1 of the analog switch U1 is connected to the SCL pin of the gold finger, pin 2 of the analog switch U1 is grounded, pin 3 of the analog switch U1 is connected to the LOS pin of the gold finger, pin 4 of the analog switch U1 is connected to the SCL_LOS pin of the female header (3), pin 5 of the analog switch U1 is connected to the VCC power supply of the gold finger, and pin 6 of the analog switch U1 is respectively connected to the RS0 pin of the gold finger, the pull-up resistor R2, and the pull-down resistor R3; Pin 1 of the analog switch U2 is connected to the SDA pin of the gold finger, pin 2 of the analog switch U2 is grounded, pin 3 of the analog switch U2 is connected to the TXDIS pin of the gold finger, pin 4 of the analog switch U2 is connected to the SDA_TXDIS pin of the female header (3), pin 5 of the analog switch U2 is connected to the VCC power supply of the gold finger, and pin 6 of the analog switch U2 is respectively connected to the RS1 pin of the gold finger, the pull-up resistor R4 and the pull-down resistor R5.