T-shaped three-level topological structure and inverter

Abstract

According to the T-shaped three-level topological structure and the inverter provided by the utility model, metal oxide semiconductor field effect transistors (MOSFETs) are adopted as the two switch tubes which are connected in series in the midpoint connection branch, and the two silicon carbide diodes which are connected in parallel with the switch tubes are arranged, so that reverse conduction can be realized by using the MOSFETs, the conduction loss of the anti-parallel diodes is reduced, and the reliability of the inverter is improved. The turn-on loss of the outer tube is reduced, and the MOSFET has relatively low switching loss and relatively high switching frequency, so that the efficiency of the T-shaped three-level topological structure is improved, and the electric energy loss is reduced; and meanwhile, two ceramic capacitors are added in an upper half-cycle circuit and a lower half-cycle circuit, so that a commutation loop is reduced, and the stress problem caused by an overlarge commutation loop is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of voltage conversion, in particular to a T-shaped three-level topological structure and an inverter. Background Art

[0002] Inverters are widely used as equipment in the photovoltaic power generation industry. Inverters generally adopt a T-shaped three-level topology structure. The existing T-shaped three-level topology structure consists of a switch tube, an output inductor, and a capacitor branch. However, this type of structure uses the parasitic diode of the switch tube itself for reverse recovery, which places high demands on the reverse recovery ability of the switch tube. The reverse recovery current is large, which affects the efficiency. In addition, the commutation loop is large, which causes certain stress problems for the switch tube. Summary of the invention

[0003] The purpose of the utility model is to provide a T-shaped (T-type) three-level topology structure and inverter to solve the problems of low switching frequency, large power loss, and stress caused by excessive commutation circuit due to large reverse recovery current, slow recovery speed, and poor recovery characteristics of the parasitic diode of the switch tube in the existing T-shaped three-level topology structure.

[0004] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0005] On the one hand, the utility model provides a T-shaped three-level topology structure, which is used in an inverter, including a ground terminal, a capacitor branch and an output inductor, and also includes:

[0006] Half-bridge branch,

[0007] The first end of the half-bridge branch is connected to the first end of the capacitor branch,

[0008] The second end of the half-bridge branch is connected to the second end of the capacitor branch;

[0009] Midpoint connection branch,

[0010] The first end of the midpoint connecting branch is connected to the midpoint of the capacitor branch.

[0011] The second end of the midpoint connecting branch is connected to the midpoint of the half-bridge branch.

[0012] The midpoint of the capacitor branch is connected to the ground terminal, and the ground terminal is the input terminal of the T-shaped topological structure;

[0013] The midpoint of the half-bridge branch is connected to the output inductor, and the output inductor is the output end of the T-shaped topology structure;

[0014] in,

[0015] The midpoint connection branch comprises:

[0016] At least one switch tube, wherein the switch tube is a metal oxide semiconductor field effect transistor,

[0017] At least one anti-parallel diode, the anti-parallel diode is connected in parallel with the switch tube;

[0018] At least one capacitor, the capacitor is connected in series with the switch tube.

[0019] Furthermore, the half-bridge branch includes:

[0020] A first switch tube, wherein a first end of the first switch tube is connected to a first end of the capacitor branch, and a second end of the first switch tube is connected to a midpoint of the half-bridge branch;

[0021] A second switch tube, wherein a first end of the second switch tube is connected to a second end of the capacitor branch, and a second end of the second switch tube is connected to a midpoint of the half-bridge branch.

[0022] Furthermore, the capacitor branch includes:

[0023] A first capacitor, wherein a first end of the first capacitor is connected to a first end of the half-bridge branch, and a second end of the first capacitor is connected to a midpoint of the capacitor branch;

[0024] A second capacitor, wherein a first end of the second capacitor is connected to a second end of the half-bridge branch, and a second end of the second capacitor is connected to a midpoint of the capacitor branch.

[0025] Furthermore, the switch tube in the midpoint connection branch includes:

[0026] A third switch tube and a fourth switch tube, wherein the first end of the third switch tube is connected to the midpoint of the capacitor branch, the second end of the third switch tube is connected to the first end of the fourth switch tube, and the second end of the fourth switch tube is connected to the midpoint of the half-bridge branch.

[0027] Furthermore, the anti-parallel diode in the midpoint connection branch includes:

[0028] A first silicon carbide tube, wherein the first silicon carbide tube is connected in parallel with the third switch tube, and a first end of the first silicon carbide tube is connected to a first end of the third switch tube, and a second end of the first silicon carbide tube is connected to a second end of the third switch tube;

[0029] A second silicon carbide tube, wherein the second silicon carbide tube is connected in parallel with the fourth switch tube, and a first end of the second silicon carbide tube is connected to a first end of the fourth switch tube, and a second end of the second silicon carbide tube is connected to a second end of the fourth switch tube.

[0030] Furthermore, the first end of the half-bridge branch is connected to the first end of the capacitor branch via a positive busbar.

[0031] The second end of the half-bridge branch is connected to the second end of the capacitor branch through a negative busbar.

[0032] Furthermore, the capacitor in the midpoint connection branch includes a third capacitor and a fourth capacitor, the third capacitor and the fourth capacitor constitute a commutation branch, the commutation branch is located between the third silicon carbide tube and the fourth silicon carbide tube, and the first end of the commutation branch is connected to the positive bus, and the second end of the commutation branch is connected to the negative bus.

[0033] Further, a first end of the third capacitor is connected to the positive bus, and a second end of the third capacitor is connected between the third switch tube and the fourth switch tube;

[0034] A first end of the fourth capacitor is connected to the negative bus, and a second end of the fourth capacitor is connected between the third switch tube and the fourth switch tube.

[0035] On the other hand, the utility model further provides an inverter, which includes the T-shaped three-level topology structure described in any one of the above items.

[0036] The advantages of the utility model are:

[0037] This solution designs a T-shaped three-level topology structure for use in photovoltaic inverters. Compared with the existing technology, it has the following improvements:

[0038] 1. The two series-connected switch tubes in the midpoint connection branch use metal oxide semiconductor field effect transistors (MOSFETs), and two silicon carbide diodes are set in parallel with the switch tubes. The use of MOSFET can achieve reverse conduction, reduce the conduction loss of the reverse parallel diode, and reduce the external tube turn-on loss. MOSFET has lower switching loss and higher switching frequency to improve the efficiency of the T-shaped three-level topology structure and reduce energy loss.

[0039] 2. Add two ceramic capacitors in the upper and lower half-cycle circuits to reduce the commutation loop and improve the stress problem caused by the excessive commutation loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 Schematic diagram of a three-level topology structure in an embodiment of the utility model.

[0042] Figure 2 It is a schematic diagram of a large commutation circuit in a three-level topology structure without adding ceramic capacitors when the current flows outward.

[0043] Figure 3 It is a schematic diagram of a small commutation circuit with a ceramic capacitor in a three-level topology structure when the current flows outward.

[0044] Figure 4 It is a schematic diagram of a large commutation circuit in a three-level topology structure without adding ceramic capacitors when the current flows inward.

[0045] Figure 5 Schematic diagram of a small commutation circuit with ceramic capacitors in a three-level topology when current flows inward.

[0046] Figure 6 This is a schematic diagram of the inverter structure of another embodiment of the utility model.

[0047] The components in the figure are shown as follows:

[0048] 1. Ground terminal; 2. Capacitor branch; 3. Half-bridge branch; 4. Midpoint connection branch; 5. Output inductor;

[0049] 21. a first capacitor; 22. a second capacitor;

[0050] 31. a first switch tube; 32. a second switch tube;

[0051] 41. A third switch tube; 42. A fourth switch tube; 43. A first silicon carbide tube; 44. A second silicon carbide tube; 45. A third capacitor; 46. A fourth capacitor. DETAILED DESCRIPTION

[0052] The following describes the preferred embodiments of the present invention with reference to the drawings in the specification to prove that the present invention can be implemented. The invention embodiments can fully introduce the present invention to those skilled in the art, making the technical content clearer and easier to understand. The present invention can be embodied through many different forms of invention embodiments, and the protection scope of the present invention is not limited to the embodiments mentioned in the text.

[0053] In the drawings, components with the same structure are indicated by the same numerical labels, and components with similar structures or functions are indicated by similar numerical labels. The size and thickness of each component shown in the drawings are shown arbitrarily, and the present invention does not limit the size and thickness of each component. In order to make the illustration clearer, the thickness of the components is appropriately exaggerated in some places in the drawings.

[0054] In addition, the following descriptions of the various embodiments of the invention are made with reference to the attached diagrams to illustrate specific embodiments of the invention that the present invention can be implemented with. The directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", "inner", "outer", "side", etc., are only with reference to the directions of the attached diagrams. Therefore, the directional terms used are for better and clearer description and understanding of the present invention, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0055] When some components are described as being "on" another component, the component may be directly placed on the other component; there may also be an intermediate component on which the component is placed, and the intermediate component is placed on the other component. When a component is described as being "mounted on" or "connected to" another component, the two may be understood to be directly "mounted on" or "connected", or one component may be indirectly "mounted on" or "connected to" another component via an intermediate component.

[0056] Overview

[0057] As described in the background technology, the existing T-shaped three-level topology structure is composed of a switch tube, an output inductor, and a capacitor branch. However, this type of structure uses the parasitic diode of the switch tube itself for reverse recovery, which places high requirements on the reverse recovery ability of the switch tube. The reverse recovery current is large, which affects the efficiency. In addition, the commutation loop is large, which causes certain stress problems for the switch tube.

[0058] In order to overcome the efficiency problems caused by the large reverse recovery current, slow recovery speed and poor recovery characteristics of the parasitic diode of the switch tube in the prior art, and the stress problems caused by the low T-type three-level switching frequency, large power loss and excessive commutation circuit caused by the large use of IGBTs in the current market, the inventors proposed an improved T-shaped three-level topology structure.

[0059] Compared with the existing T-shaped three-level topology, the T-shaped three-level topology has the following improvements:

[0060] 1. The two series-connected switch tubes in the midpoint connection branch use metal oxide semiconductor field effect transistors (MOSFETs), and two silicon carbide diodes are set in parallel with the switch tubes. The use of MOSFET can achieve reverse conduction, reduce the conduction loss of the reverse parallel diode, and reduce the external tube turn-on loss. MOSFET has lower switching loss and higher switching frequency to improve the efficiency of the T-shaped three-level topology structure and reduce energy loss.

[0061] 2. The existing T-shaped three-level topology is only provided with capacitors for voltage stabilization (i.e., capacitor branches), while the solution adds two ceramic capacitors in the upper and lower half-cycle circuits to reduce the commutation loop and improve the stress problem caused by the excessively large commutation loop.

[0062] Based on the above concept, the present application will be exemplarily described below in conjunction with the accompanying drawings.

[0063] Example topology

[0064] This embodiment provides a T-shaped three-level topology structure, such as Figure 1 As shown, it includes:

[0065] Ground terminal 1, capacitor branch 2, output inductor 5, half-bridge branch 3 and midpoint connection branch 4, where:

[0066] The first end of the half-bridge branch 3 is connected to the first end of the capacitor branch 2.

[0067] The second end of the half-bridge branch 3 is connected to the second end of the capacitor branch 2;

[0068] The first end of the midpoint connecting branch 4 is connected to the midpoint of the capacitor branch 2.

[0069] The second end of the midpoint connecting branch 4 is connected to the midpoint of the half-bridge branch 3.

[0070] The midpoint of the capacitor branch 2 is connected to the ground terminal 1, and the ground terminal 1 is the input terminal of the T-shaped topological structure;

[0071] The midpoint of the half-bridge branch 3 is connected to the output inductor 5, and the output inductor 5 is the output end of the T-shaped topology structure;

[0072] in addition,

[0073] The midpoint connection branch 4 comprises:

[0074] Two switch tubes, both of which are metal oxide semiconductor field effect transistors;

[0075] Two anti-parallel diodes, both of which are silicon carbide diodes, and the two silicon carbide diodes are connected in parallel with two switch tubes respectively;

[0076] Two capacitors are respectively arranged in the upper and lower half-cycle circuits, and the capacitor in the upper half-cycle circuit is connected in series with one of the switch tubes in the midpoint connection branch 4, and the capacitor in the lower half-cycle circuit is connected in series with the other switch tube in the midpoint connection branch 4.

[0077] In this embodiment, the half-bridge branch 3 includes:

[0078] A first switch tube 31, wherein a first end of the first switch tube 31 is connected to a first end of the capacitor branch 2, and a second end of the first switch tube 31 is connected to a midpoint of the half-bridge branch 3;

[0079] A second switch tube 32 , wherein a first end of the second switch tube 32 is connected to a second end of the capacitor branch 2 , and a second end of the second switch tube 32 is connected to a midpoint of the half-bridge branch 3 .

[0080] In this embodiment, the capacitor branch 2 includes:

[0081] A first capacitor 21, wherein a first end of the first capacitor 21 is connected to a first end of the half-bridge branch 3, and a second end of the first capacitor 21 is connected to a midpoint of the capacitor branch 2;

[0082] A second capacitor 22 , wherein a first end of the second capacitor 22 is connected to a second end of the half-bridge branch 3 , and a second end of the second capacitor 22 is connected to a midpoint of the capacitor branch 2 .

[0083] In this embodiment, the switch tube in the midpoint connection branch 4 includes:

[0084] A third switch tube 41 and a fourth switch tube 42, wherein the first end of the third switch tube 41 is connected to the midpoint of the capacitor branch 2, the second end of the third switch tube 41 is connected to the first end of the fourth switch tube 42, and the second end of the fourth switch tube 42 is connected to the midpoint of the half-bridge branch 3.

[0085] In this embodiment, the anti-parallel diode in the midpoint connection branch 4 includes:

[0086] A first silicon carbide tube 43, wherein the first silicon carbide tube 43 is connected in parallel with the third switch tube 41, and a first end of the first silicon carbide tube 43 is connected to a first end of the third switch tube 41, and a second end of the first silicon carbide tube 43 is connected to a second end of the third switch tube 41;

[0087] The second silicon carbide tube 44 is connected in parallel with the fourth switch tube 42 , and a first end of the second silicon carbide tube 44 is connected to a first end of the fourth switch tube 42 , and a second end of the second silicon carbide tube 44 is connected to a second end of the fourth switch tube 42 .

[0088] In this embodiment, the first end of the half-bridge branch 3 is connected to the first end of the capacitor branch 2 via a positive bus.

[0089] The second end of the half-bridge branch 3 is connected to the second end of the capacitor branch 2 via a negative busbar.

[0090] In this embodiment, the capacitor in the midpoint connection branch 4 includes a third capacitor 45 and a fourth capacitor 46, and the third capacitor 45 and the fourth capacitor 46 constitute a commutation branch. The commutation branch is located between the third silicon carbide tube and the fourth silicon carbide tube, and the first end of the commutation branch is connected to the positive bus, and the second end of the commutation branch is connected to the negative bus.

[0091] In this embodiment, a first end of the third capacitor 45 is connected to the positive bus, and a second end of the third capacitor 45 is connected between the third switch tube 41 and the fourth switch tube 42;

[0092] A first end of the fourth capacitor 46 is connected to the negative bus, and a second end of the fourth capacitor 46 is connected between the third switch tube 41 and the fourth switch tube 42 .

[0093] In the above embodiment, the turn-on time of the first switch tube 31 , the second switch tube 32 , the third switch tube 41 and the fourth switch tube 42 is set to 1, and the turn-off time is set to 0;

[0094] When the current flows inward, the first silicon carbide tube 43 changes from 0001 (only the fourth switch tube 42 is turned on) to 0101 (when the second switch tube 32 and the fourth switch tube 42 are turned on together) and reverse recovery occurs at the commutation time;

[0095] When the current flows outward, the second silicon carbide tube 44 changes from 0010 (only the third switch tube 41 is turned on) to 1010 (when the first switch tube 31 and the third switch tube 41 are turned on together) and reverse recovery occurs at the commutation time;

[0096] It can be seen that the reverse recovery current is superimposed on the first switch tube 31 and the second switch tube 32, resulting in a significant increase in turn-on loss, increased thermal stress on the external tube, and reduced efficiency. Therefore, using MOSFET for the third switch tube 41 and the fourth switch tube 42 can achieve reverse conduction, reduce the conduction loss of the anti-parallel diode, and reduce the turn-on loss of the external tube.

[0097] In the above embodiment,

[0098] Displays the current flowing out when io<0.

[0099] like Figure 2 As shown in the large circle, when two ceramic capacitors are not added, it is a large commutation loop: the positive half cycle is when the first switch tube 31 and the third switch tube 41 are turned on, and the third switch tube 41 and the fourth switch tube 42 are in freewheeling mode, which is a large commutation loop; the negative half cycle is when the second switch tube 32 and the fourth switch tube 42 are turned on, and the third switch tube 41 and the fourth switch tube 42 are in freewheeling mode, which is a large commutation loop;

[0100] like Figure 3 As shown in the small circle, when the third ceramic capacitor is added to reduce the commutation circuit, it becomes a small commutation circuit; when the fourth ceramic capacitor is added to reduce the commutation circuit, it becomes a small commutation circuit.

[0101] Displays the case where the current flows inwards io>0,

[0102] like Figure 4 As shown, when two ceramic capacitors are not added, the second switch tube 32 and the third switch tube 41 are turned on in the positive half cycle, and the third switch tube 41 and the fourth switch tube 42 are turned on in the freewheeling moment, forming a large commutation loop, and the second switch tube 32 and the fourth switch tube 42 are turned on in the negative half cycle.

[0103] The freewheeling moments of the third switch tube 41 and the fourth switch tube 42 form a large commutation loop.

[0104] like Figure 5 As shown, when the third ceramic capacitor is added to reduce the commutation circuit, it becomes a small commutation circuit; when the fourth ceramic capacitor is added to reduce the commutation circuit, it becomes a small commutation circuit.

[0105] Example Inverter

[0106] This embodiment provides an inverter, comprising two T-shaped three-level topological structures of any one of the above embodiments, specifically a first T-shaped three-level topological structure and a second T-shaped three-level topological structure, wherein: Figure 5 As shown,

[0107] The positive busbar in the first T-shaped three-level topology structure is connected to the positive busbar in the second T-shaped three-level topology structure;

[0108] The negative busbar in the first T-shaped three-level topology structure is connected to the negative busbar in the second T-shaped three-level topology structure;

[0109] The midpoint connection branch in the first T-shaped three-level topology structure is connected to the midpoint connection branch in the second T-shaped three-level topology structure;

[0110] The output inductor of the first three-level T-shaped topology structure serves as a first output terminal of the inverter;

[0111] The output inductor of the second three-level T-shaped topology structure serves as the second output terminal of the inverter.

[0112] It should be noted that, in addition to the inverter composed of the two T-shaped three-level topology structures mentioned above, the inverter in this embodiment may also be composed of more than two T-shaped three-level topology structures.

[0113] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments, and other arrangements may be designed without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the features described in the various dependent claims and herein may be combined in a manner different from that described in the original claims. It may also be understood that the features described in conjunction with the individual embodiments may be used in other described embodiments.

Claims

1. A T-shaped three-level topology structure, used in an inverter, comprising a ground terminal, a capacitor branch and an output inductor, characterized in that: Also includes: Half-bridge branch, The first end of the half-bridge branch is connected to the first end of the capacitor branch, The second end of the half-bridge branch is connected to the second end of the capacitor branch; Midpoint connection branch, The first end of the midpoint connecting branch is connected to the capacitor branch, The second end of the midpoint connecting branch is connected to the half-bridge branch, The capacitor branch is connected to the ground terminal, and the ground terminal is the input terminal of the T-shaped topology structure; The half-bridge branch is connected to the output inductor, and the output inductor is the output end of the T-shaped topology structure; in, The midpoint connection branch comprises: At least one switch tube, wherein the switch tube is a metal oxide semiconductor field effect transistor, At least one anti-parallel diode, the anti-parallel diode is connected in parallel with the switch tube; At least one capacitor, the capacitor is connected in series with the switch tube.

2. The T-shaped three-level topology structure according to claim 1, characterized in that: The half-bridge branch includes: A first switch tube, wherein a first end of the first switch tube is connected to a first end of the capacitor branch, and a second end of the first switch tube is connected to a midpoint of the half-bridge branch; A second switch tube, wherein a first end of the second switch tube is connected to a second end of the capacitor branch, and a second end of the second switch tube is connected to a midpoint of the half-bridge branch.

3. The T-shaped three-level topology structure according to claim 1, characterized in that: The capacitor branch includes: A first capacitor, wherein a first end of the first capacitor is connected to a first end of the half-bridge branch, and a second end of the first capacitor is connected to a midpoint of the capacitor branch; A second capacitor, wherein a first end of the second capacitor is connected to a second end of the half-bridge branch, and a second end of the second capacitor is connected to a midpoint of the capacitor branch.

4. The T-shaped three-level topology structure according to claim 1, characterized in that: The switch tube in the midpoint connection branch includes: A third switch tube and a fourth switch tube, wherein the first end of the third switch tube is connected to the midpoint of the capacitor branch, the second end of the third switch tube is connected to the first end of the fourth switch tube, and the second end of the fourth switch tube is connected to the midpoint of the half-bridge branch.

5. The T-shaped three-level topology structure according to claim 4, characterized in that: The anti-parallel diode in the midpoint connection branch includes: A first silicon carbide tube, wherein the first silicon carbide tube is connected in parallel with the third switch tube, and a first end of the first silicon carbide tube is connected to a first end of the third switch tube, and a second end of the first silicon carbide tube is connected to a second end of the third switch tube; A second silicon carbide tube, wherein the second silicon carbide tube is connected in parallel with the fourth switch tube, and a first end of the second silicon carbide tube is connected to a first end of the fourth switch tube, and a second end of the second silicon carbide tube is connected to a second end of the fourth switch tube.

6. The T-shaped three-level topology structure according to claim 5, characterized in that: The first end of the half-bridge branch is connected to the first end of the capacitor branch through a positive busbar, The second end of the half-bridge branch is connected to the second end of the capacitor branch through a negative busbar.

7. The T-shaped three-level topology structure according to claim 6, characterized in that: The capacitor in the midpoint connection branch includes a third capacitor and a fourth capacitor, and the third capacitor and the fourth capacitor constitute a commutation branch. The commutation branch is located between the third silicon carbide tube and the fourth silicon carbide tube, and the first end of the commutation branch is connected to the positive bus, and the second end of the commutation branch is connected to the negative bus.

8. The T-shaped three-level topology structure according to claim 7, characterized in that: A first end of the third capacitor is connected to the positive bus, and a second end of the third capacitor is connected between the third switch tube and the fourth switch tube; A first end of the fourth capacitor is connected to the negative bus, and a second end of the fourth capacitor is connected between the third switch tube and the fourth switch tube.

9. An inverter, characterized in that: It comprises a T-shaped three-level topology structure as claimed in any one of claims 1 to 8.

10. The inverter according to claim 9, characterized in that: The inverter includes at least two T-shaped three-level topology structures.

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