Network interface expansion device

Abstract

The utility model discloses a network interface expansion device, and the device comprises an RK3588 chip which comprises at least three pins; the CTC2118 chip comprises a first type of pins and a second type of pins, the first type of pins are in communication connection with the pins of the RK3588 chip, and the second type of pins are connected with the at least eight network ports; the RK3588 chip is connected with the CTC2118 chip through a first-class pin, the at least eight network ports are used for inserting network cables, each network port is connected with the CTC2118 chip through a second-class pin, and the CTC2118 chip is used for carrying out data transmission between the RK3588 chip and the at least eight network ports. According to the scheme, the RK3588 chip and the CTC2118 chip are adopted for design, so that multi-network-port expansion of an ARM architecture product is realized, and low-cost multi-network-port expansion of the ARM architecture product is realized.

Description

Technical Field

[0001] The present application relates to the field of computers, and in particular, to a network interface expansion device. Background Art

[0002] With the continuous development of industrialization, the need for data interconnection between industrial equipment has become increasingly urgent so that all parties can respond in a timely manner. Therefore, the embedded communication management gateway based on ARM architecture is an ideal choice for low-cost solutions for industrial sites.

[0003] The RK3588 industrial processor is suitable for a variety of industrial automation systems and industrial IoT equipment scenarios. It has a quad-core ARM Cortex-A76@2.4GHz+quad-core ARM Cortex-A55@1.8GHz big and small core architecture, which can provide efficient computing and multi-threaded processing capabilities. The RK3588 processor has a 6TOPS NPU, supports INT4 / INT8 / INT16 / FP16 / BF16 / TF32, supports TensorFlow / PyTorch / Caffe / MXNet deep learning frameworks, and can cope with various big data computing scenarios. It supports high-speed industrial interfaces such as PCIe 3.0, 3-way PCIe 2.1, 3-way USB3.1, 3-way SATA, and 2-way GMAC, and can be connected to various external devices at high speed. The utility model is to design multiple network ports on RK3588.

[0004] In the prior art, for low-end ARM architecture network products, the main method is to use the CPU direct network port. However, low-end ARM architecture products are limited by network port resources, and the number of direct network ports is limited, which cannot meet the low-cost multi-network port needs of most customers.

[0005] Therefore, no effective solution has been proposed for the problem of high cost of multi-port expansion in the prior art. Summary of the invention

[0006] The main purpose of the present application is to provide a network interface expansion device to solve the problem of high cost of multi-network port expansion in the prior art, and to achieve the technical effect of low-cost multi-network port expansion for ARM architecture products.

[0007] In order to achieve the above-mentioned object, in a first aspect of the present application, a network interface expansion device is proposed, the device comprising:

[0008] RK3588 chip, including at least three pins;

[0009] The CTC2118 chip includes a first type of pins and a second type of pins, wherein the first type of pins are communicatively connected to the pins of the RK3588 chip, and the second type of pins are connected to at least eight network ports;

[0010] At least eight network ports, each of which is used to insert a network cable, each of which is connected to the CTC2118 chip via the second type of pins, and the CTC2118 chip is used to transmit data between the RK3588 chip and the at least eight network ports.

[0011] In some optional embodiments of the present application, the device further includes:

[0012] The CTC21101 chip includes third-category pins and fourth-category pins, wherein the third-category pins are connected to the pins of the RK3588 chip connected to the first-category pins of the CTC2118 chip, and the fourth-category pins are connected to the first-category pins of the CTC2118 chip. The CTC21101 chip is used to connect between the RK3588 chip and the CTC2118 chip.

[0013] In some optional embodiments of the present application, the device further includes:

[0014] The third type of pins of the CTC21101 chip are respectively connected to two pins of the RK3588 chip, the fourth type of pins of the CTC21101 chip is connected to a network port, and the CTC21101 chip is used for data transmission between the RK3588 chip and the network port.

[0015] In some optional embodiments of the present application,

[0016] The mode of the third type of pins of the CTC21101 chip is RGMII mode;

[0017] The mode of the fourth type of pins of the CTC21101 chip connected to the first type of pins of the CTC2118 chip is the SGMII mode.

[0018] In some optional embodiments of the present application, the device further includes:

[0019] The YT6801SH chip includes a fifth type of pin and a sixth type of pin, wherein the fifth type of pin is connected to a pin of the RK3588 chip, the sixth type of pin is connected to a network port, and the YT6801SH chip is used for data transmission between the RK3588 chip and the network port.

[0020] In some optional embodiments of the present application, the device further includes:

[0021] An external crystal oscillator is connected to the YT6801SH chip.

[0022] In some optional embodiments of the present application, the device includes at least ten network ports, eight of which are connected to the CTC2118 chip through the second type of pins of the CTC2118 chip, one network port is connected to the CTC21101 chip through the fourth type of pins of the CTC21101 chip, and one network port is connected to the YT6801SH chip through the sixth type of pins of the YT6801SH chip.

[0023] In some optional embodiments of the present application, the three pins of the RK3588 chip include:

[0024] Two Ethernet GMAC pins are respectively connected to the third type pins of the CTC21101 chip;

[0025] Pcie2.0 pin is connected with the fifth pin of the YT6801SH chip.

[0026] In some optional embodiments of the present application, the device further includes:

[0027] Indicator light: used to indicate the connection status of the network port and the data transmission status.

[0028] In some optional embodiments of the present application, the number of the indicator lights is twice the number of the network ports.

[0029] The technical solution provided by the embodiments of the present application may have the following beneficial effects:

[0030] In the present application, a network interface expansion device is proposed, including: an RK3588 chip, including at least three pins; a CTC2118 chip, including a first type of pin and a second type of pin, wherein the first type of pin is communicatively connected with the pin of the RK3588 chip, and the second type of pin is connected with at least eight network ports; at least eight network ports, the network ports are used to insert network cables, each network port is connected to the CTC2118 chip through the second type of pin, and the CTC2118 chip is used to perform data transmission between the RK3588 chip and the at least eight network ports. A solution designed by using the RK3588 chip and the CTC2118 chip, wherein, one RGMII resource of RK3588 is occupied, and eight network ports are led out by using CTC2118; one RGMII resource of RK3588 is occupied, and one network port is led out through CTC21101 PHY; and one PCIE 2.0*1 resource is occupied, and one network port is led out through YT6801SH. It realizes multi-network port expansion for ARM architecture products and realizes low-cost multi-network port expansion for ARM architecture products. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings constituting a part of this application are used to provide a further understanding of this application, so that other features, purposes and advantages of this application become more obvious. The schematic embodiment drawings and their descriptions of this application are used to explain this application and do not constitute an improper limitation on this application. In the drawings:

[0032] Figure 1 A schematic diagram of a network interface expansion device provided in an optional embodiment of the present application;

[0033] Figure 2 A schematic diagram of a network interface expansion device provided in an optional embodiment of the present application;

[0034] Figure 3 A schematic diagram of a network interface expansion device provided for an optional embodiment of the present application. DETAILED DESCRIPTION

[0035] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0036] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0037] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0038] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in this application can be understood according to specific circumstances.

[0039] In addition, the terms "installed", "set", "provided with", "connected", "connected", and "socketed" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0040] With the continuous development of industrialization, the need for data interconnection between industrial equipment has become increasingly urgent so that all parties can respond in a timely manner. Therefore, the embedded communication management gateway based on ARM architecture is an ideal choice for low-cost solutions for industrial sites.

[0041] In the prior art, for low-end ARM architecture network products, the main form of using CPU direct network port is used. However, low-end ARM architecture products are limited by network port resources, and the direct network ports are limited. The current network port expansion solution requires high costs and cannot meet customers' low-cost multi-network port needs.

[0042] The RK3588 industrial processor is suitable for a variety of industrial automation systems and industrial IoT equipment scenarios. It has a quad-core ARM Cortex-A76@2.4GHz+quad-core ARM Cortex-A55@1.8GHz big and small core architecture, which can provide efficient computing and multi-threaded processing capabilities. The RK3588 processor has a 6TOPS NPU, supports INT4 / INT8 / INT16 / FP16 / BF16 / TF32, supports TensorFlow / PyTorch / Caffe / MXNet deep learning frameworks, and can cope with various big data computing scenarios. It supports high-speed industrial interfaces such as PCIe 3.0, 3-way PCIe 2.1, 3-way USB3.1, 3-way SATA, and 2-way GMAC, and can be connected to various external devices at high speed. The utility model is to design multiple network ports on RK3588.

[0043] In an optional embodiment of the present application, a network interface expansion device is provided, which adopts the RK3588+CTC2118 switch solution, wherein one RK3588 RGMII resource is occupied, and eight network ports are brought out through CTC2118; one RK3588 RGMII resource is occupied, and one network port is brought out through CTC21101 PHY; one PCIE 2.0*1 resource is occupied, and one network port is brought out through YT6801SH. The whole solution has a total of 10 network ports, which realizes the expansion of multiple network ports on ARM architecture products, and solves the problem of high cost of multiple network port expansion on AM architecture products in the prior art.

[0044] In an optional embodiment of the present application, a network interface expansion device is provided. Figure 1 A schematic diagram of a network interface expansion device provided in an optional embodiment of the present application, such as Figure 1 As shown, the device comprises:

[0045] The device comprises:

[0046] The RK3588 chip includes at least three pins, wherein the at least three pins are network port expansion pins of the network interface expansion device, and the three pins are respectively two Ethernet GMAC pins and one Pcie2.0 pin;

[0047] The CTC2118 chip includes a first type of pins and a second type of pins, wherein the first type of pins are communicatively connected to the pins of the RK3588 chip, and the second type of pins are connected to at least eight network ports;

[0048] At least eight network ports 8*1G RJ45, the network ports are used to insert network cables, each network port is connected to the CTC2118 chip through the second type of pins, and the CTC2118 chip is used to transmit data between the RK3588 chip and the at least eight network ports.

[0049] In another optional embodiment of the present application, a CTC21101 chip is arranged between the CTC2118 chip and the RK3588 chip, so as to connect the CTC2118 chip and the RK3588 chip through the CTC21101 chip, thereby realizing data transmission between the CTC2118 chip and the RK3588 chip through the CTC21101 chip.

[0050] In another optional embodiment of the present application, a network interface expansion device is proposed, and the network interface expansion device includes:

[0051] The CTC21101 chip includes third-category pins and fourth-category pins, wherein the third-category pins are connected to the pins of the RK3588 chip connected to the first-category pins of the CTC2118 chip, and the fourth-category pins are connected to the first-category pins of the CTC2118 chip. The CTC21101 chip is used to connect between the RK3588 chip and the CTC2118 chip.

[0052] In another optional embodiment of the present application, the working mode of the data interface directly output by the RK3588 chip CPU is RGMII mode. Among them, the CTC21101 chip supports the connection of MAC and PHY through the Reduced Gigabit Media Independent Interface (RGMII) or the Serial Gigabit Media Independent Interface (SGMII). The CTC21101 chip is a single-port highly integrated Ethernet transceiver (PHY) that supports 10 / 100 / 1000Mbps rates. The working mode of the data interface of the CTC21101 chip supports RGMII mode and can also support SGMII mode. The port form of the CTC2118 chip is 8GE+4xQSGMII / SGMII+4xSGMII, and the working mode of the data structure of the CTC2118 chip is SGMII mode. By using a CTC21101 chip between the RGMII interface directly output by the RK3588 chip CPU and the CTC2118 chip, RGMII is converted into SGMII, which not only expands the network interface, but also increases the usability of the product and the debuggability of the software without affecting the function. In the embodiment of the present application, by setting the CTC21101 chip between the RK3588 chip and the CTC2118 chip, occupying the RGMII resource of one RK3588, and using CTC2118 to bring out 8 network ports, and realizing the conversion of the data interface work template, not only the network interface expansion is realized, but also the usability of the product and the debuggability of the software are increased.

[0053] In another optional embodiment of the present application, a network interface expansion device is proposed, and the network interface expansion device includes:

[0054] The third pin of the CTC21101 chip is connected to two pins of the RK3588 chip respectively, and the fourth pin of the CTC21101 chip is connected to a network port. The CTC21101 chip is used to transmit data between the RK3588 chip and a network port.

[0055] In another optional embodiment of the present application, a network interface expansion device is proposed, comprising:

[0056] 2 CTC21101 chips, namely a first CTC21101 chip and a second CTC21101 chip, wherein the third type of pins of the first CTC21101 chip are connected to the pins of the RK3588 chip, the fourth type of pins of the first CTC21101 chip are connected to the first type of pins of the CTC2118 chip, the second type of pins of the CTC2118 chip are connected to at least eight network ports, and the first CTC21101 chip and the CTC2118 chip occupy one RGMII resource of the RK3588 to lead out eight network ports; the third type of pins of the second CTC21101 chip are connected to the pins of the RK3588 chip, the fourth type of pins of the second CTC21101 chip are connected to one network port, and the second CTC21101 chip occupies one RGMII resource of the RK3588 to lead out one network port.

[0057] In another optional embodiment of the present application, a network interface expansion device is proposed, comprising:

[0058] The third pin mode of the CTC21101 chip is RGMII mode;

[0059] The mode of the fourth type of pins of the CTC21101 chip connected to the first type of pins of the CTC2118 chip is the SGMII mode.

[0060] In another optional embodiment of the present application, a network interface expansion device is proposed, comprising:

[0061] The YT6801SH chip includes a fifth type of pin and a sixth type of pin, wherein the fifth type of pin is connected to a pin of the RK3588 chip, and the sixth type of pin is connected to a network port. The YT6801SH chip is used for data transmission between the RK3588 chip and the network port.

[0062] In an optional embodiment of the present application, the YT6801SH chip occupies the pcie2.0*1 resources of the RK3588 chip to bring out a network port.

[0063] In another optional embodiment of the present application, a network interface expansion device is proposed, comprising:

[0064] An external crystal oscillator is connected to the YT6801SH chip.

[0065] In another optional embodiment of the present application, a network interface expansion device is proposed, comprising:

[0066] The device includes at least ten network ports, eight of which are connected to the CTC2118 chip through the second type pins of the CTC2118 chip, one network port is connected to the CTC21101 chip through the fourth type pins of the CTC21101 chip, and one network port is connected to the YT6801SH chip through the sixth type pins of the YT6801SH chip.

[0067] In another optional embodiment of the present application, a network interface expansion device is proposed.

[0068] The three pins of the RK3588 chip include:

[0069] Two Ethernet GMAC pins are connected to the third type pins of the CTC21101 chip respectively;

[0070] Pcie2.0 pin is connected with the fifth type pin of YT6801SH chip.

[0071] In another optional embodiment of the present application, a network interface expansion device is proposed. Figure 2 A network interface expansion device is provided for an optional embodiment of the present application, such as Figure 2 As shown, the device comprises:

[0072] Indicator light: used to indicate the connection status of the network port and the data transmission status.

[0073] In another optional embodiment of the present application, a network interface expansion device is proposed.

[0074] The number of indicator lights is twice the number of network ports.

[0075] In another optional embodiment of the present application, a network interface expansion device is proposed. Figure 3 A schematic diagram of a network interface expansion device provided in an optional embodiment of the present application, such as Figure 3 As shown, the device comprises:

[0076] The RK3588 chip is connected to the third type of pin of the first CTC21101 chip through the first Ethernet GMAC pin, the fourth type of pin of the CTC21101 chip is connected to the first type of pin of the CTC2118 chip, the second type of pin of the CTC2118 chip is connected to at least 8 network ports, and the first CTC21101 chip and the CTC2118 chip are used to transmit data between the RK3588 chip and the at least eight network ports;

[0077] The RK3588 chip is connected to the third type of pin of the second CTC21101 chip through the second Ethernet GMAC pin, the fourth type of pin of the second CTC21101 chip is connected to a network port, and the second CTC21101 chip is used to transmit data between the RK3588 chip and the network port;

[0078] The RK3588 chip is connected to the fifth type pin of the YT6801SH chip through the Pcie2.0 pin, and the sixth type pin of the YT6801SH chip is connected to a network port. The YT6801SH chip is used to transmit data between the RK3588 chip and the network port;

[0079] At least ten network ports, which are used to insert network cables, among which eight network ports are connected to the CTC2118 chip through the second type of pins of the CTC2118 chip, and the CTC2118 chip is used to transmit data between the RK3588 chip and the above-mentioned at least eight network ports; one network port is connected to the CTC21101 chip through the fourth type of pins of the CTC21101 chip, and the CTC21101 chip is used to transmit data between the RK3588 chip and the network port; one network port is connected to the YT6801SH chip through the sixth type of pins of the YT6801SH chip, and the YT6801SH chip is used to transmit data between the RK3588 chip and the network port.

[0080] In this embodiment, the network interface expansion device in the optional embodiment of the present application adopts the RK3588+CTC21101 PHY+CTC2118 SWITCH solution, sets the CTC21101 chip and the CTC2118 chip on the RK3588 platform, occupies 1 RK3588 RGMII resource, and uses CTC2118 to bring out 8 network ports; occupies 1 RK3588 RGMII resource, and brings out 1 network port through CTC21101 PHY; occupies pcie 2.0*1 resource, and brings out a network port through YT6801SH, with a total of 10 network ports, realizing multi-network port expansion. Moreover, a CTC21101 PHY chip is used between the RGMII mode interface directly output from the RK3588 chip CPU and the CTC2118 chip to convert RGMII into SGMII, so as to increase the usability of the product and the debuggability of the software without affecting the function.

[0081] In an optional embodiment of the present application, the RK3588 chip is connected to RS-485*4 via the UART*4 pin for asynchronous communication of the RK3588 chip;

[0082] The RK3588 chip is connected to the RS-232 chip and RS-232RJ45 network port through the UART*4 pins;

[0083] RK3588 chip is connected to TF card through SD3.0 pin;

[0084] RK3588 chip is connected to the temperature sensor through I2C pin; RK3588 chip is connected to EEPROM through I2C pin;

[0085] RK3588 chip, connected to 32G eMMC;

[0086] The RK3588 chip is connected to the computing power card through the 2480 / 2280M key interface via the Pcie3.0*4 pins;

[0087] RK3588 chip is connected to Minipcie through Pcie2.0*1 pin;

[0088] RK3588 chip, connected to external devices via SATA3.0 pins;

[0089] RK3588 chip, connected to AUDIO; RK3588 chip, connected to 8G DDR4;

[0090] RK3588 chip, connected to 3042 / 3052B key slot via USB3.0 pin, used to install 4G / 5G mobile broadband;

[0091] RK3588 chip, through GPIO pins and 2*DO;

[0092] The RK3588 chip provides a USB interface through the USB2.0 pins.

[0093] The specific manner of executing the operation of each unit in the above embodiment has been described in detail in the embodiment of the method, and will not be elaborated here.

[0094] In summary, in this application, a network interface expansion device is proposed, including: an RK3588 chip, including at least three pins; a CTC2118 chip, including a first type of pin and a second type of pin, wherein the first type of pin is communicatively connected with the pin of the RK3588 chip, and the second type of pin is connected with at least eight network ports; at least eight network ports, the network port is used to insert a network cable, each network port is connected to the CTC2118 chip through the second type of pin, and the CTC2118 chip is used to perform data transmission between the RK3588 chip and the at least eight network ports. A solution designed by using the RK3588 chip and the CTC2118 chip, wherein, one RGMII resource of RK3588 is occupied, and eight network ports are led out by using CTC2118; one RGMII resource of RK3588 is occupied, and one network port is led out through CTC21101 PHY; and one PCIE 2.0*1 resource is occupied, and one network port is led out through YT6801SH. It realizes multi-network port expansion for ARM architecture products and realizes low-cost multi-network port expansion for ARM architecture products.

[0095] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the device and method according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, a program segment or an instruction, and a part of the module, a program segment or an instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0096] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0097] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present application.

[0098] Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.

Claims

1. A network interface expansion device, characterized in that: The device comprises: RK3588 chip, including at least three pins; The CTC2118 chip includes a first type of pins and a second type of pins, wherein the first type of pins are communicatively connected to the pins of the RK3588 chip, and the second type of pins are connected to at least eight network ports; At least eight network ports, each of which is used to insert a network cable, each of which is connected to the CTC2118 chip via the second type of pins, and the CTC2118 chip is used to transmit data between the RK3588 chip and the at least eight network ports.

2. The network interface expansion device according to claim 1, characterized in that: The device also includes: The CTC21101 chip includes third-category pins and fourth-category pins, wherein the third-category pins are connected to the pins of the RK3588 chip connected to the first-category pins of the CTC2118 chip, and the fourth-category pins are connected to the first-category pins of the CTC2118 chip. The CTC21101 chip is used to connect between the RK3588 chip and the CTC2118 chip.

3. The network interface expansion device according to claim 1, characterized in that: The device also includes: The third type of pins of the CTC21101 chip are respectively connected to two pins of the RK3588 chip, the fourth type of pins of the CTC21101 chip is connected to a network port, and the CTC21101 chip is used for data transmission between the RK3588 chip and the network port.

4. The network interface expansion device according to claim 2 or claim 3, characterized in that: The mode of the third type of pins of the CTC21101 chip is RGMII mode; The mode of the fourth type of pins of the CTC21101 chip connected to the first type of pins of the CTC2118 chip is the SGMII mode.

5. The network interface expansion device according to claim 2, characterized in that: The device also includes: The YT6801SH chip includes a fifth type of pin and a sixth type of pin, wherein the fifth type of pin is connected to a pin of the RK3588 chip, the sixth type of pin is connected to a network port, and the YT6801SH chip is used for data transmission between the RK3588 chip and the network port.

6. The network interface expansion device according to claim 5, characterized in that: The device also includes: An external crystal oscillator is connected to the YT6801SH chip.

7. The network interface expansion device according to claim 1, characterized in that: The device includes at least ten network ports, eight of which are connected to the CTC2118 chip through the second type of pins of the CTC2118 chip, one network port is connected to the CTC21101 chip through the fourth type of pins of the CTC21101 chip, and one network port is connected to the YT6801SH chip through the sixth type of pins of the YT6801SH chip.

8. The network interface expansion device according to claim 5, characterized in that: The three pins of the RK3588 chip include: Two Ethernet GMAC pins are respectively connected to the third type pins of the CTC21101 chip; Pcie2.0 pin is connected with the fifth pin of the YT6801SH chip.

9. The network interface expansion device according to claim 1, characterized in that: The device also includes: Indicator light: used to indicate the connection status of the network port and the data transmission status.

10. The network interface expansion device according to claim 9, characterized in that: The number of the indicator lights is twice the number of the network ports.

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