A signal conversion circuit

Abstract

The utility model proposes a signal conversion circuit, including: a reference voltage module, a system-on-chip (Soc), a digital-to-analog converter and an operational amplifier; the reference voltage module is respectively connected to a first DAC conversion module and a second DAC conversion module, the first DAC conversion module and the second DAC conversion module include a digital-to-analog converter and an operational amplifier; the digital signal receiving end of the digital-to-analog converter is connected to the digital signal sending end of the system-on-chip (Soc), the reference voltage end of the digital-to-analog converter is connected to the reference voltage output end of the reference voltage module, and the reference voltage module includes a voltage-stabilizing reference chip. The utility model can provide a stable reference voltage for two ADCs by using a voltage-stabilizing reference chip, and is connected to a single-channel operational amplifier and a coprocessor, while ensuring that the operational amplifier and the voltage-stabilizing reference chip share the same power supply, effectively solving the accuracy and stability problems in the signal conversion process.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, in particular to a signal conversion circuit. Background Art

[0002] At present, the automation trend of the industrial control industry is becoming more and more obvious, and more and more sensors are used. The input and output of general sensors are analog voltage signals. However, for system-level chips (SoCs) that integrate processors and programmable logic, DAC (digital to analog converter) conversion is required, and the accuracy and stability of the signal conversion process are very high. Utility Model Content

[0003] The utility model aims to at least solve the technical problems existing in the prior art, and particularly innovatively proposes a signal conversion circuit.

[0004] In order to achieve the above-mentioned purpose of the utility model, the utility model provides a signal conversion circuit, including: a reference voltage module, a system-level chip, a first DAC conversion module and a second DAC conversion module;

[0005] The reference voltage module is connected to the first DAC conversion module and the second DAC conversion module respectively, and the first DAC conversion module and the second DAC conversion module include a digital-to-analog converter and an operational amplifier; the digital signal receiving end of the digital-to-analog converter is connected to the digital signal sending end of the system-level chip, and the analog signal sending end of the digital-to-analog converter is connected to the signal receiving end of the operational amplifier; the reference voltage end of the digital-to-analog converter is connected to the reference voltage output end of the reference voltage module, and the reference voltage module includes a voltage stabilizing reference chip.

[0006] Furthermore, the input voltage of the power supply end of the voltage-stabilizing reference chip is a first input voltage (AV+9V) and a second input voltage (AV+5V), the input voltage of the power supply end of the digital-to-analog converter is a second input voltage (AV+5V), and the input voltage of the power supply end of the operational amplifier is a first input voltage (AV+9V) and a third input voltage (AV-9V).

[0007] By using the same power supply for the power supply end of the voltage-stabilized reference chip and the operational amplifier, the impact of power supply noise on the two becomes synchronized, achieving power supply noise synchronization, thereby reducing the negative impact of power supply noise on signal conversion accuracy, enhancing the circuit's anti-interference ability, and improving the system's signal integrity. Using the same power supply voltage also simplifies the design and saves costs.

[0008] Furthermore, the first DAC conversion module includes:

[0009] The power input terminal VDD of the digital-to-analog converter U2 is connected to the first end of the capacitor C204, the first end of the capacitor C207, the first end of the resistor R130, and the first end of the chip common-mode choke L21. The second end of the chip common-mode choke L21 is connected to the power supply AV+5. The second end of the capacitor C204, the second end of the capacitor C207, and the digital ground reference terminal DGND of the digital-to-analog converter U2 are connected to the power ground. The asynchronous update DAC register terminal LDAC of the digital-to-analog converter U2 is connected to the first end of the resistor R136. The serial data input terminal DIN of the digital-to-analog converter U2 is connected to the first end of the resistor R132. The clock terminal SCLK of the digital-to-analog converter U2 is connected to the first end of the resistor R134. The chip select terminal CS of the digital-to-analog converter U2 is connected to the second end of the resistor R130 and the coprocessor I1. The second end of the resistor R136, the second end of the resistor R132, and the second end of the resistor R134 are connected to the coprocessor I1.

[0010] The ground terminals AGNDF and AGNDS of the digital-to-analog converter U2 are connected to the analog ground, the reference voltage sensing terminal REFS of the digital-to-analog converter U2 and the reference voltage forcing terminal REFF of the digital-to-analog converter U2 are connected to the reference voltage REF5VB (provided by the voltage stabilizing reference chip D15), and are connected to the first terminal of the capacitor C211 and the first terminal of the capacitor C213, and the second terminal of the capacitor C211 and the second terminal of the capacitor C213 are connected to the analog ground;

[0011] The internal voltage-dividing resistor terminal INV of the digital-to-analog converter U2 is connected to the inverting input terminal IN- of the operational amplifier D16, the feedback resistor terminal RFB of the digital-to-analog converter U2 is connected to the output terminal OUT of the operational amplifier D16, the first end of the capacitor C215, and the first end of the resistor R142, the second end of the resistor R142 is connected to the first end of the capacitor C221, the first end of the transient voltage suppression diode FV5, and the coprocessor I1, and the second end of the capacitor C215, the second end of the capacitor C221, and the second end of the transient voltage suppression diode FV5 are connected to the analog ground;

[0012] The feedback resistor terminal RFB of the digital-to-analog converter U2 and the internal voltage-dividing resistor terminal INV are connected to the external operational amplifier D16 to achieve a bipolar output.

[0013] The analog signal output terminal VOUT of the digital-to-analog converter U2 is connected to the non-inverting input terminal IN+ of the operational amplifier D16, the negative power supply terminal V- of the operational amplifier D16 is connected to the first end of the capacitor C217, the first end of the capacitor C223, and the first end of the chip common-mode choke L34, the second end of the capacitor C217 and the second end of the capacitor C223 are connected to the analog ground, and the second end of the chip common-mode choke L34 is connected to the power supply AV-9;

[0014] The positive power supply terminal V+ of the operational amplifier D16 is connected to the first end of the capacitor C218, the first end of the capacitor C224, and the first end of the chip common-mode choke L24, the second end of the capacitor C218 and the second end of the capacitor C224 are connected to the analog ground, and the second end of the chip common-mode choke L24 is connected to the power supply AV-9.

[0015] Furthermore, the second DAC conversion module includes:

[0016] The power input terminal VDD of the digital-to-analog converter U5 is connected to the first end of the capacitor C205, the first end of the capacitor C208, the first end of the resistor R131, and the first end of the chip common-mode choke L22. The second end of the chip common-mode choke L22 is connected to the power supply AV+5. The second end of the capacitor C205, the second end of the capacitor C208, and the digital ground reference terminal DGND of the digital-to-analog converter U5 are connected to the power ground. The asynchronous update DAC register terminal LDAC of the digital-to-analog converter U5 is connected to the first end of the resistor R139. The serial data input terminal DIN of the digital-to-analog converter U5 is connected to the first end of the resistor R133. The clock terminal SCLK of the digital-to-analog converter U5 is connected to the first end of the resistor R135. The chip select terminal CS of the digital-to-analog converter U5 is connected to the second end of the resistor R131 and the coprocessor I1. The second end of the resistor R139, the second end of the resistor R133, and the second end of the resistor R135 are connected to the coprocessor I1.

[0017] The ground terminals AGNDF and AGNDS of the digital-to-analog converter U5 are connected to the analog ground, the reference voltage sensing terminal REFS of the digital-to-analog converter U5 and the reference voltage forcing terminal REFF of the digital-to-analog converter U5 are connected to the reference voltage REF5VA (provided by the voltage stabilizing reference chip D15), and are connected to the first terminal of the capacitor C212 and the first terminal of the capacitor C214, and the second terminal of the capacitor C212 and the second terminal of the capacitor C214 are connected to the analog ground;

[0018] The internal voltage-dividing resistor terminal INV of the digital-to-analog converter U5 is connected to the inverting input terminal IN- of the operational amplifier D17, the feedback resistor terminal RFB of the digital-to-analog converter U5 is connected to the output terminal OUT of the operational amplifier D17, the first end of the capacitor C216, and the first end of the resistor R143, the second end of the resistor R143 is connected to the first end of the capacitor C222, the first end of the transient voltage suppression diode FV1, and the coprocessor I1, and the second end of the capacitor C216, the second end of the capacitor C222, and the second end of the transient voltage suppression diode FV1 are connected to the analog ground;

[0019] The analog signal output terminal VOUT of the digital-to-analog converter U5 is connected to the non-inverting input terminal IN+ of the operational amplifier D17, the negative power supply terminal V- of the operational amplifier D17 is connected to the first end of the capacitor C219, the first end of the capacitor C225, and the first end of the chip common-mode choke L35, the second end of the capacitor C219 and the second end of the capacitor C225 are connected to the analog ground, and the second end of the chip common-mode choke L35 is connected to the power supply AV-9;

[0020] The positive power supply terminal V+ of the operational amplifier D17 is connected to the first end of the capacitor C220, the first end of the capacitor C226, and the first end of the chip common-mode choke L25, the second end of the capacitor C220 and the second end of the capacitor C226 are connected to the analog ground, and the second end of the chip common-mode choke L25 is connected to the power supply AV-9.

[0021] Furthermore, the reference voltage module includes:

[0022] The sleep mode control terminal VS of the voltage stabilizing reference chip D15 is connected to the first end of capacitor C203, the first end of capacitor C206, the first end of the chip common mode choke L23, and the first end of resistor R218, the second end of the chip common mode choke L23 is connected to the power supply AV+5V, the second end of resistor R218 is connected to the power supply AV+9V, the second end of capacitor C203 and the second end of capacitor C206 are connected to the analog ground, and the ground terminal GND of the voltage stabilizing reference chip D15 is connected to the analog ground; among them, one of the power supply AV+5V and the power supply AV+9V can be selected.

[0023] The output terminal OUTPUT of the voltage stabilizing reference chip D15 is connected to the first end of the capacitor C209, the first end of the capacitor C210, the first end of the resistor R140, and the first end of the resistor R141. The second end of the resistor R140 outputs the reference voltage REF5VA, and the second end of the resistor R141 outputs the reference voltage REF5VB. The second end of the capacitor C209 and the second end of the capacitor C210 are connected to the analog ground. The reference voltage REF5VA and the reference voltage REF5VB are the same voltage reference source, which are sent to the two ADCs of the digital analog converter U2 and the digital analog converter U5 as voltage references.

[0024] The chip common mode choke is used to suppress electromagnetic interference (EMI), especially in the high frequency range, and the voltage stabilization reference chip D15 provides a stable voltage reference, which can keep the output voltage stable even when the power supply voltage changes or the load current changes.

[0025] Connecting the chip common-mode choke L23 in series with the power line can effectively suppress the common-mode noise on the power line.

[0026] Furthermore, the models of the digital-to-analog converter U2 and the digital-to-analog converter U5 are AD5542ARZ.

[0027] Furthermore, the operational amplifier D16 and the operational amplifier D17 are single-channel operational amplifiers.

[0028] Furthermore, the model of the single-channel operational amplifier is OP27GSZ.

[0029] Furthermore, the model of the voltage stabilizing reference chip D15 is REF193GS.

[0030] Further, the power supply AV+5V is provided by a first power supply module, and the first power supply module includes:

[0031] First power supply module: the voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222.

[0032] The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground;

[0033] The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground;

[0034] The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228.

[0035] The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328.

[0036] The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground;

[0037] The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to the first end of the resistor R226, and the second end of the resistor R226 outputs the power supply VCC5V_PWR.

[0038] Further, the power supply AV-9V is provided by a second power supply module, and the second power supply module includes:

[0039] The power input terminal IN of the synchronous buck converter U7 is connected to the first end of the resistor R146, the first end of the capacitor C259, the first end of the capacitor C260, and the first end of the chip common mode choke L14, and the second end of the capacitor C259 and the second end of the capacitor C260 are connected to the analog ground; the switching frequency setting terminal RP of the synchronous buck converter U7 is connected to the first end of the resistor R147 and the first end of the capacitor C321, and the second end of the resistor R147 and the second end of the capacitor C321 are connected to the analog ground;

[0040] The enable terminal EN of the synchronous buck converter U7 is connected to the second end of the resistor R146 and the first end of the resistor R219, and the second end of the resistor R219 is connected to the analog ground; the power output terminal OUT of the synchronous buck converter U7 is connected to the power input terminal of the linear regulator U10, the first end of the capacitor C264, the first end of the capacitor C265, and the first end of the capacitor C266, and the second end of the capacitor C264, the second end of the capacitor C265, and the second end of the capacitor C266 are connected to the analog ground;

[0041] The output voltage control positive terminal CFLY+ of the synchronous buck converter U7 is connected to the first end of the capacitor C263, and the output voltage control negative terminal CFLY+ of the synchronous buck converter U7 is connected to the second end of the capacitor C263;

[0042] The power output terminal OUT of the linear regulator U10 outputs the power supply AV-9V and is connected to the first end of the capacitor C268 and the first end of the capacitor C269. The second end of the capacitor C268 and the second end of the capacitor C269 are connected to the analog ground.

[0043] Further, the power supply AV+9V is provided by a third power supply module, and the third power supply module includes: a power input terminal VIN of a three-terminal adjustable linear regulator D21 is connected to a first end of a capacitor C320, a first end of a capacitor C261, and a first end of a chip common-mode choke L13, a second end of the chip common-mode choke L13 is connected to a power supply VCC12V, a power output terminal VOUT of the three-terminal adjustable linear regulator D21 is connected to a first end of a resistor R145, a first end of a capacitor C322, and a first end of a capacitor C267, and outputs a power supply AV+9V; a second end of the capacitor C322 and a second end of the capacitor C267 are connected to an analog ground;

[0044] The adjustable end ADJ of the three-terminal adjustable linear regulator D21 is connected to the first end of the capacitor C262, the first end of the resistor R144, and the second end of the resistor R145. The second end of the capacitor C262 and the second end of the resistor R144 are connected to the analog ground; the second end of the capacitor C320 and the second end of the capacitor C261 are connected to the analog ground.

[0045] In summary, due to the adoption of the above technical solution, the utility model can provide a stable reference voltage for two ADCs by using a voltage-stabilizing reference chip, while ensuring that the operational amplifier and the voltage-stabilizing reference chip share the same power supply, thereby effectively solving the accuracy and stability problems in the signal conversion process.

[0046] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0048] Figure 1 It is a connection schematic block diagram of the utility model.

[0049] Figure 2 This is a circuit connection diagram of the first DAC conversion module of the utility model.

[0050] Figure 3 This is a circuit connection diagram of the second DAC conversion module of the utility model.

[0051] Figure 4 It is a circuit connection diagram of the reference voltage module of the utility model.

[0052] Figure 5 This is a circuit connection diagram of the power module of the utility model. Figure 5 (a) is a schematic diagram of the circuit connection of the first power module. Figure 5 (b) is a schematic diagram of the circuit connection of the second power module. Figure 5 (c) is a circuit connection diagram of the third power supply module. DETAILED DESCRIPTION

[0053] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0054] The utility model provides a signal conversion circuit, such as Figure 1 As shown: it includes a reference voltage module, a system-on-chip (Soc), a digital-to-analog converter and a single-channel operational amplifier; the reference voltage module is respectively connected to a first DAC conversion module and a second DAC conversion module, the first DAC conversion module and the second DAC conversion module include a digital-to-analog converter and a single-channel operational amplifier; the digital signal receiving end of the digital-to-analog converter is connected to the digital signal sending end of the system-on-chip (Soc), the reference voltage end of the digital-to-analog converter is connected to the reference voltage output end of the reference voltage module, and the reference voltage module includes a voltage stabilizing reference chip.

[0055] A stable reference voltage with high precision and low temperature coefficient is provided by a voltage stabilizing reference chip. The stable reference voltage reduces the error caused by voltage fluctuation, thereby improving the accuracy of the entire signal conversion circuit.

[0056] The circuit connection diagram of the first DAC conversion module is as follows: Figure 2 As shown:

[0057] The power input terminal VDD of the digital-to-analog converter U2 is connected to the first end of the capacitor C204, the first end of the capacitor C207, the first end of the resistor R130, and the first end of the chip common-mode choke L21. The second end of the chip common-mode choke L21 is connected to the power supply AV+5. The second end of the capacitor C204, the second end of the capacitor C207, and the digital ground reference terminal DGND of the digital-to-analog converter U2 are connected to the power ground. The asynchronous update DAC register terminal LDAC of the digital-to-analog converter U2 is connected to the first end of the resistor R136. The serial data input terminal DIN of the digital-to-analog converter U2 is connected to the first end of the resistor R132. The clock terminal SCLK of the digital-to-analog converter U2 is connected to the first end of the resistor R134. The chip select terminal CS of the digital-to-analog converter U2 is connected to the second end of the resistor R130 and the coprocessor I1. The second end of the resistor R136, the second end of the resistor R132, and the second end of the resistor R134 are connected to the coprocessor I1.

[0058] The ground terminals AGNDF and AGNDS of the digital-to-analog converter U2 are connected to the analog ground, the reference voltage sensing terminal REFS of the digital-to-analog converter U2 and the reference voltage forcing terminal REFF of the digital-to-analog converter U2 are connected to the reference voltage REF5VB (provided by the voltage stabilizing reference chip D15), and are connected to the first terminal of the capacitor C211 and the first terminal of the capacitor C213, and the second terminal of the capacitor C211 and the second terminal of the capacitor C213 are connected to the analog ground;

[0059] The internal voltage-dividing resistor terminal INV of the digital-to-analog converter U2 is connected to the inverting input terminal IN- of the operational amplifier D16, the feedback resistor terminal RFB of the digital-to-analog converter U2 is connected to the output terminal OUT of the operational amplifier D16, the first end of the capacitor C215, and the first end of the resistor R142, the second end of the resistor R142 is connected to the first end of the capacitor C221, the first end of the transient voltage suppression diode FV5, and the coprocessor I1, and the second end of the capacitor C215, the second end of the capacitor C221, and the second end of the transient voltage suppression diode FV5 are connected to the analog ground;

[0060] The feedback resistor terminal RFB of the digital-to-analog converter U2 and the internal voltage-dividing resistor terminal INV are connected to the external operational amplifier D16 to achieve a bipolar output.

[0061] The analog signal output terminal VOUT of the digital-to-analog converter U2 is connected to the non-inverting input terminal IN+ of the operational amplifier D16, the negative power supply terminal V- of the operational amplifier D16 is connected to the first end of the capacitor C217, the first end of the capacitor C223, and the first end of the chip common-mode choke L34, the second end of the capacitor C217 and the second end of the capacitor C223 are connected to the analog ground, and the second end of the chip common-mode choke L34 is connected to the power supply AV-9;

[0062] The positive power supply terminal V+ of the operational amplifier D16 is connected to the first end of the capacitor C218, the first end of the capacitor C224, and the first end of the chip common-mode choke L24, the second end of the capacitor C218 and the second end of the capacitor C224 are connected to the analog ground, and the second end of the chip common-mode choke L24 is connected to the power supply AV-9.

[0063] The circuit connection diagram of the second DAC conversion module is as follows: Figure 3 As shown:

[0064] The power input terminal VDD of the digital-to-analog converter U5 is connected to the first end of the capacitor C205, the first end of the capacitor C208, the first end of the resistor R131, and the first end of the chip common-mode choke L22. The second end of the chip common-mode choke L22 is connected to the power supply AV+5. The second end of the capacitor C205, the second end of the capacitor C208, and the digital ground reference terminal DGND of the digital-to-analog converter U5 are connected to the power ground. The asynchronous update DAC register terminal LDAC of the digital-to-analog converter U5 is connected to the first end of the resistor R139. The serial data input terminal DIN of the digital-to-analog converter U5 is connected to the first end of the resistor R133. The clock terminal SCLK of the digital-to-analog converter U5 is connected to the first end of the resistor R135. The chip select terminal CS of the digital-to-analog converter U5 is connected to the second end of the resistor R131 and the coprocessor I1. The second end of the resistor R139, the second end of the resistor R133, and the second end of the resistor R135 are connected to the coprocessor I1.

[0065] The ground terminals AGNDF and AGNDS of the digital-to-analog converter U5 are connected to the analog ground, the reference voltage sensing terminal REFS of the digital-to-analog converter U5 and the reference voltage forcing terminal REFF of the digital-to-analog converter U5 are connected to the reference voltage REF5VA (provided by the voltage stabilizing reference chip D15), and are connected to the first terminal of the capacitor C212 and the first terminal of the capacitor C214, and the second terminal of the capacitor C212 and the second terminal of the capacitor C214 are connected to the analog ground;

[0066] The internal voltage-dividing resistor terminal INV of the digital-to-analog converter U5 is connected to the inverting input terminal IN- of the operational amplifier D17, the feedback resistor terminal RFB of the digital-to-analog converter U5 is connected to the output terminal OUT of the operational amplifier D17, the first end of the capacitor C216, and the first end of the resistor R143, the second end of the resistor R143 is connected to the first end of the capacitor C222, the first end of the transient voltage suppression diode FV1, and the coprocessor I1, and the second end of the capacitor C216, the second end of the capacitor C222, and the second end of the transient voltage suppression diode FV1 are connected to the analog ground;

[0067] The feedback resistor terminal RFB of the digital-to-analog converter U5 and the internal voltage-dividing resistor terminal INV are connected to the external operational amplifier D17 to achieve a bipolar output.

[0068] The analog signal output terminal VOUT of the digital-to-analog converter U5 is connected to the non-inverting input terminal IN+ of the operational amplifier D17, the negative power supply terminal V- of the operational amplifier D17 is connected to the first end of the capacitor C219, the first end of the capacitor C225, and the first end of the chip common-mode choke L35, the second end of the capacitor C219 and the second end of the capacitor C225 are connected to the analog ground, and the second end of the chip common-mode choke L35 is connected to the power supply AV-9;

[0069] The positive power supply terminal V+ of the operational amplifier D17 is connected to the first end of the capacitor C220, the first end of the capacitor C226, and the first end of the chip common-mode choke L25, the second end of the capacitor C220 and the second end of the capacitor C226 are connected to the analog ground, and the second end of the chip common-mode choke L25 is connected to the power supply AV-9.

[0070] The models of U2 and U5 are ad5542arz, and the models of operational amplifiers D16 and D17 are OP27GSZ.

[0071] The circuit connection diagram of the reference voltage module is as follows: Figure 4 As shown:

[0072] The sleep mode control terminal VS of the voltage stabilizing reference chip D15 is connected to the first end of the capacitor C203, the first end of the capacitor C206, the first end of the chip common mode choke L23, and the first end of the resistor R218, the second end of the chip common mode choke L23 is connected to the power supply AV+5V, the second end of the resistor R218 is connected to the power supply AV+9V, the second end of the capacitor C203 and the second end of the capacitor C206 are connected to the analog ground, and the ground terminal GND of the voltage stabilizing reference chip D15 is connected to the analog ground;

[0073] The output terminal OUTPUT of the voltage stabilizing reference chip D15 is connected to the first end of the capacitor C209, the first end of the capacitor C210, the first end of the resistor R140, and the first end of the resistor R141. The second end of the resistor R140 outputs the reference voltage REF5VA, and the second end of the resistor R141 outputs the reference voltage REF5VB. The second end of the capacitor C209 and the second end of the capacitor C210 are connected to the analog ground. The reference voltage REF5VA and the reference voltage REF5VB are the same voltage reference source, which are sent to the two ADCs of the digital analog converter U2 and the digital analog converter U5 as voltage references.

[0074] The chip common mode choke is used to suppress electromagnetic interference (EMI), especially in the high frequency range, and the voltage stabilization reference chip D15 provides a stable voltage reference, which can keep the output voltage stable even when the power supply voltage changes or the load current changes.

[0075] The model of the voltage stabilizing reference chip D15 is REF193GS.

[0076] The circuit connection diagram of the power module is as follows: Figure 5 As shown, it includes a first power module, a second power module, and a third power module:

[0077] First power supply module: the voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222.

[0078] The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground;

[0079] The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground;

[0080] The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228.

[0081] The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328.

[0082] The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground;

[0083] The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to the first end of the resistor R226, and the second end of the resistor R226 outputs the power supply VCC5V_PWR.

[0084] The model of the synchronous buck converter U9 is IS6605A.

[0085] Second power supply module: the power input terminal IN of the synchronous buck converter U7 is connected to the first end of the resistor R146, the first end of the capacitor C259, the first end of the capacitor C260, and the first end of the chip common mode choke L14, and the second end of the capacitor C259 and the second end of the capacitor C260 are connected to the analog ground; the switching frequency setting terminal RP of the synchronous buck converter U7 is connected to the first end of the resistor R147 and the first end of the capacitor C321, and the second end of the resistor R147 and the second end of the capacitor C321 are connected to the analog ground;

[0086] The enable terminal EN of the synchronous buck converter U7 is connected to the second end of the resistor R146 and the first end of the resistor R219, and the second end of the resistor R219 is connected to the analog ground; the power output terminal OUT of the synchronous buck converter U7 is connected to the power input terminal of the linear regulator U10, the first end of the capacitor C264, the first end of the capacitor C265, and the first end of the capacitor C266, and the second end of the capacitor C264, the second end of the capacitor C265, and the second end of the capacitor C266 are connected to the analog ground;

[0087] The output voltage control positive terminal CFLY+ of the synchronous buck converter U7 is connected to the first end of the capacitor C263, and the output voltage control negative terminal CFLY+ of the synchronous buck converter U7 is connected to the second end of the capacitor C263;

[0088] The power output terminal OUT of the linear regulator U10 outputs the power supply AV-9V and is connected to the first end of the capacitor C268 and the first end of the capacitor C269. The second end of the capacitor C268 and the second end of the capacitor C269 are connected to the analog ground.

[0089] The third power supply module: the power input terminal VIN of the three-terminal adjustable linear regulator D21 is connected to the first end of the capacitor C320, the first end of the capacitor C261, and the first end of the chip common mode choke L13, the second end of the chip common mode choke L13 is connected to the power supply VCC12V, the power output terminal VOUT of the three-terminal adjustable linear regulator D21 is connected to the first end of the resistor R145, the first end of the capacitor C322, and the first end of the capacitor C267, and the output power supply AV+9V; the second end of the capacitor C322 and the second end of the capacitor C267 are connected to the analog ground;

[0090] The adjustable end ADJ of the three-terminal adjustable linear regulator D21 is connected to the first end of the capacitor C262, the first end of the resistor R144, and the second end of the resistor R145. The second end of the capacitor C262 and the second end of the resistor R144 are connected to the analog ground; the second end of the capacitor C320 and the second end of the capacitor C261 are connected to the analog ground.

[0091] The model of the three-terminal adjustable linear regulator D21 is LM317LM.

[0092] It can be seen that the power supply end of the voltage-stabilizing reference chip and the operational amplifier use the same power supply, and the impact of power supply noise on the two becomes synchronized, achieving power supply noise synchronization, thereby reducing the negative impact of power supply noise on signal conversion accuracy, enhancing the circuit's anti-interference ability, and improving the system's signal integrity.

[0093] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A signal conversion circuit, characterized in that: include: A reference voltage module, a system-level chip, a first DAC conversion module, and a second DAC conversion module; The reference voltage module is connected to the first DAC conversion module and the second DAC conversion module respectively, and the first DAC conversion module and the second DAC conversion module include a digital-to-analog converter and an operational amplifier; the digital signal receiving end of the digital-to-analog converter is connected to the digital signal sending end of the system-level chip, and the analog signal sending end of the digital-to-analog converter is connected to the signal receiving end of the operational amplifier; the reference voltage end of the digital-to-analog converter is connected to the reference voltage output end of the reference voltage module, and the reference voltage module includes a voltage stabilizing reference chip.

2. A signal conversion circuit according to claim 1, characterized in that: The input voltage of the power supply end of the voltage stabilizing reference chip is the first input voltage and the second input voltage, the input voltage of the power supply end of the digital-to-analog converter is the second input voltage, and the input voltage of the power supply end of the operational amplifier is the first input voltage and the third input voltage.

3. A signal conversion circuit according to claim 1, characterized in that: The first DAC conversion module includes: The power input terminal VDD of the digital-to-analog converter U2 is connected to the first end of the capacitor C204, the first end of the capacitor C207, the first end of the resistor R130, and the first end of the chip common-mode choke L21. The second end of the chip common-mode choke L21 is connected to the power supply AV+5. The second end of the capacitor C204, the second end of the capacitor C207, and the digital ground reference terminal DGND of the digital-to-analog converter U2 are connected to the power ground. The asynchronous update DAC register terminal LDAC of the digital-to-analog converter U2 is connected to the first end of the resistor R136. The serial data input terminal DIN of the digital-to-analog converter U2 is connected to the first end of the resistor R132. The clock terminal SCLK of the digital-to-analog converter U2 is connected to the first end of the resistor R134. The chip select terminal CS of the digital-to-analog converter U2 is connected to the second end of the resistor R130 and the coprocessor I1. The second end of the resistor R136, the second end of the resistor R132, and the second end of the resistor R134 are connected to the coprocessor I1. The ground terminals AGNDF and AGNDS of the digital-to-analog converter U2 are connected to the analog ground, the reference voltage sensing terminal REFS of the digital-to-analog converter U2 and the reference voltage forcing terminal REFF of the digital-to-analog converter U2 are connected to the reference voltage REF5VB, and are connected to the first terminal of the capacitor C211 and the first terminal of the capacitor C213, and the second terminal of the capacitor C211 and the second terminal of the capacitor C213 are connected to the analog ground; The internal voltage-dividing resistor terminal INV of the digital-to-analog converter U2 is connected to the inverting input terminal IN- of the operational amplifier D16, the feedback resistor terminal RFB of the digital-to-analog converter U2 is connected to the output terminal OUT of the operational amplifier D16, the first end of the capacitor C215, and the first end of the resistor R142, the second end of the resistor R142 is connected to the first end of the capacitor C221, the first end of the transient voltage suppression diode FV5, and the coprocessor I1, and the second end of the capacitor C215, the second end of the capacitor C221, and the second end of the transient voltage suppression diode FV5 are connected to the analog ground; The analog signal output terminal VOUT of the digital-to-analog converter U2 is connected to the non-inverting input terminal IN+ of the operational amplifier D16, the negative power supply terminal V- of the operational amplifier D16 is connected to the first end of the capacitor C217, the first end of the capacitor C223, and the first end of the chip common-mode choke L34, the second end of the capacitor C217 and the second end of the capacitor C223 are connected to the analog ground, and the second end of the chip common-mode choke L34 is connected to the power supply AV-9; The positive power supply terminal V+ of the operational amplifier D16 is connected to the first end of the capacitor C218, the first end of the capacitor C224, and the first end of the chip common-mode choke L24, the second end of the capacitor C218 and the second end of the capacitor C224 are connected to the analog ground, and the second end of the chip common-mode choke L24 is connected to the power supply AV-9.

4. The signal conversion circuit according to claim 1, characterized in that: The second DAC conversion module includes: The power input terminal VDD of the digital-to-analog converter U5 is connected to the first end of the capacitor C205, the first end of the capacitor C208, the first end of the resistor R131, and the first end of the chip common-mode choke L22. The second end of the chip common-mode choke L22 is connected to the power supply AV+5. The second end of the capacitor C205, the second end of the capacitor C208, and the digital ground reference terminal DGND of the digital-to-analog converter U5 are connected to the power ground. The asynchronous update DAC register terminal LDAC of the digital-to-analog converter U5 is connected to the first end of the resistor R139. The serial data input terminal DIN of the digital-to-analog converter U5 is connected to the first end of the resistor R133. The clock terminal SCLK of the digital-to-analog converter U5 is connected to the first end of the resistor R135. The chip select terminal CS of the digital-to-analog converter U5 is connected to the second end of the resistor R131 and the coprocessor I1. The second end of the resistor R139, the second end of the resistor R133, and the second end of the resistor R135 are connected to the coprocessor 11. The ground terminals AGNDF and AGNDS of the digital-to-analog converter U5 are connected to the analog ground, the reference voltage sensing terminal REFS of the digital-to-analog converter U5 and the reference voltage forcing terminal REFF of the digital-to-analog converter U5 are connected to the reference voltage REF5VA, and are connected to the first terminal of the capacitor C212 and the first terminal of the capacitor C214, and the second terminal of the capacitor C212 and the second terminal of the capacitor C214 are connected to the analog ground; The internal voltage-dividing resistor terminal INV of the digital-to-analog converter U5 is connected to the inverting input terminal IN- of the operational amplifier D17, the feedback resistor terminal RFB of the digital-to-analog converter U5 is connected to the output terminal OUT of the operational amplifier D17, the first end of the capacitor C216, and the first end of the resistor R143, the second end of the resistor R143 is connected to the first end of the capacitor C222, the first end of the transient voltage suppression diode FV1, and the coprocessor I1, and the second end of the capacitor C216, the second end of the capacitor C222, and the second end of the transient voltage suppression diode FV1 are connected to the analog ground; The analog signal output terminal VOUT of the digital-to-analog converter U5 is connected to the non-inverting input terminal IN+ of the operational amplifier D17, the negative power supply terminal V- of the operational amplifier D17 is connected to the first end of the capacitor C219, the first end of the capacitor C225, and the first end of the chip common-mode choke L35, the second end of the capacitor C219 and the second end of the capacitor C225 are connected to the analog ground, and the second end of the chip common-mode choke L35 is connected to the power supply AV-9; The positive power supply terminal V+ of the operational amplifier D17 is connected to the first end of the capacitor C220, the first end of the capacitor C226, and the first end of the chip common-mode choke L25, the second end of the capacitor C220 and the second end of the capacitor C226 are connected to the analog ground, and the second end of the chip common-mode choke L25 is connected to the power supply AV-9.

5. The signal conversion circuit according to claim 1, characterized in that: The reference voltage module includes: The sleep mode control terminal VS of the voltage stabilizing reference chip D15 is connected to the first end of the capacitor C203, the first end of the capacitor C206, the first end of the chip common mode choke L23, and the first end of the resistor R218, the second end of the chip common mode choke L23 is connected to the power supply AV+5V, the second end of the resistor R218 is connected to the power supply AV+9V, the second end of the capacitor C203 and the second end of the capacitor C206 are connected to the analog ground, and the ground terminal GND of the voltage stabilizing reference chip D15 is connected to the analog ground; The output terminal OUTPUT of the voltage-stabilizing reference chip D15 is connected to the first end of capacitor C209, the first end of capacitor C210, the first end of resistor R140, and the first end of resistor R141; the second end of resistor R140 outputs a reference voltage REF5VA, and the second end of resistor R141 outputs a reference voltage REF5VB; the second end of capacitor C209 and the second end of capacitor C210 are connected to the analog ground.

6. A signal conversion circuit according to claim 3 or 4, characterized in that: The models of the digital-to-analog converter U2 and the digital-to-analog converter U5 are AD5542ARZ.

7. A signal conversion circuit according to claim 3 or 4, characterized in that: Operational amplifier D16 and operational amplifier D17 are single-channel operational amplifiers.

8. A signal conversion circuit according to claim 7, characterized in that: The model of the single-channel operational amplifier is OP27GSZ.

9. The signal conversion circuit according to claim 5, characterized in that: The model of the voltage stabilizing reference chip D15 is REF193GS.

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