Battery management system, battery device and electric device

Abstract

The utility model provides a battery management system, a battery device and a power utilization device, and belongs to the technical field of batteries. The battery management system comprises a power supply circuit, a communication circuit and a processor, the power supply circuit comprises a power supply input end and a power supply output end, and the power supply input end is connected with a power supply; the communication circuit at least comprises a plurality of communication branches arranged in parallel, any communication branch comprises a communication chip, and the communication chip is connected with the power supply output end; the processor is connected with the power supply output end, the processor is in signal connection with the plurality of communication chips, and the processor is used for controlling one of the plurality of communication chips to communicate with the outside. The battery management system can improve the communication stability.

Description

Technical Field

[0001] The present application relates to the field of battery technology, and in particular to a battery management system, a battery device and an electrical device. Background Art

[0002] The battery management system is a system that can effectively manage and monitor battery packs. In the battery management system, information interaction between modules plays a key role in ensuring the safety of the battery system, optimizing battery performance, achieving system integration and effective monitoring, and ensuring efficient and stable operation of the battery system.

[0003] The current battery management system has a wide range of application environments. Hardware such as communication modules, wiring harnesses, and connectors are prone to failures in environments with low voltage, low temperature, high humidity, and frequent lightning, leading to communication loss and information exchange failures between modules, thus affecting the safety of the battery system. Utility Model Content

[0004] The present application aims to solve at least one of the technical problems in the background technology. To this end, one object of the present application is to provide a battery management system, a battery device and a power device to improve the stability of communication.

[0005] An embodiment of the first aspect of the present application provides a battery management system, which includes a power supply circuit, a communication circuit and a processor. The power supply circuit includes a power input terminal and a power output terminal, and the power input terminal is connected to a power supply; the communication circuit includes at least multiple communication branches arranged in parallel, and any communication branch includes a communication chip, and the communication chip is connected to the power output terminal; the processor is connected to the power output terminal, and the processor is respectively connected to multiple communication chip signals, and the processor is used to control one of the multiple communication chips to communicate with the outside.

[0006] In the technical solution of the embodiment of the present application, by setting up multiple parallel communication branches, each communication branch is provided with a separate communication chip to form a redundant communication branch. In the event of a failure of a module, connector or communication chip in a single communication branch, another communication branch can be used to implement information interaction between modules, thereby avoiding communication loss as much as possible, improving the stability of communication between modules, and thus improving the safety of the battery management system.

[0007] In some embodiments, the power input terminal includes a first power input terminal and a second power input terminal, and the first power input terminal and the second power input terminal are used to connect different power supplies respectively. By using the first power input terminal and the second power input terminal to connect different power supplies respectively, when a single power supply fails, another power supply can be used for power supply, which will not affect the entire power supply circuit, thereby improving the stability of power supply.

[0008] In some embodiments, the power supply circuit further includes an OR gate circuit, the input end of the OR gate circuit is connected to the first power supply input end and the second power supply input end, and the output end of the OR gate circuit is connected to multiple communication branches of the communication circuit and at least one of the microprocessors through the power supply output end. By connecting the first power supply input end and the second power supply input end using the OR gate circuit, if one of the power supplies works normally, the output end has a voltage supply, and the OR gate circuit has a logic judgment function, can screen and process the input power supply signal, and has anti-interference ability, thereby improving the reliability and stability of the entire battery system. At the same time, the OR gate circuit can also simplify the power management design and reduce the manufacturing cost and manufacturing complexity.

[0009] In some embodiments, the power circuit further includes a converter, which is connected between the output end of the OR gate circuit and the power output end. By setting the converter to convert the voltage provided by the power supply into a stable voltage suitable for the communication branch, the stability of information transmission is improved. At the same time, the converter is set between the output end of the OR gate circuit and the power output end, and the voltage conversion can be achieved using only a single converter, which reduces the manufacturing cost of the battery management system.

[0010] In some embodiments, the power supply circuit further includes a converter, and the converter includes a first converter and a second converter, wherein the input end of the first converter is connected to the first power supply input end, and the output end of the first converter is connected to the input end of the OR gate circuit; the input end of the second converter is connected to the second power supply input end, and the output end of the second converter is connected to the input end of the OR gate circuit. By connecting the input end of the first converter to the first power supply input end, the input end of the second converter to the second power supply input end, and then connecting the output end of the first converter and the output end of the second converter to the input end of the OR gate circuit, when any converter fails, voltage conversion can still be achieved, thereby improving the stability of information transmission.

[0011] In some embodiments, the communication circuit includes at least a first communication branch and a second communication branch; the power output terminal includes a first power output terminal, a second power output terminal and a third power output terminal; the first communication branch is connected to the output terminal of the first converter through the first power output terminal, the second communication branch is connected to the output terminal of the second converter through the second power output terminal, and the processor is connected to the output terminal of the OR gate circuit through the third power output terminal. By independently connecting the first communication branch and the second communication branch to the power supply, the converter and the communication chip, the two communication branches do not have an intersection, and any failure of any communication branch will not affect the other communication branch, thereby avoiding communication loss as much as possible and improving the stability of communication between modules. At the same time, different power supplies use the OR gate circuit to power the processor. If any communication branch communicates normally, the processor can obtain the working voltage, thereby improving the reliability of stable processing of the processor.

[0012] In some embodiments, the communication circuit includes at least a first communication branch and a second communication branch; the first communication branch includes a first communication chip, and the second communication branch includes a second communication chip; wherein the first communication chip and the second communication chip are chips with different anti-electromagnetic interference performance. By respectively arranging the first communication chip and the second communication chip with different anti-electromagnetic interference performance on the first communication branch and the second communication branch, under electromagnetic interference, the possibility of the first communication chip and the second communication chip being interfered with at the same time and failing and being damaged can be effectively reduced, thereby improving the stability of communication between modules.

[0013] In some embodiments, the communication circuit includes at least a first communication branch and a second communication branch; the first communication branch includes a first communication chip and a common-mode inductor, the common-mode inductor is connected in series to the output end of the first communication chip and is used to connect to a signal bus for external communication; and / or the second communication branch includes a second communication chip and a transient voltage suppression diode, the two ends of the transient voltage suppression diode are respectively connected to the output end of the second communication chip and are used to connect to two signal buses for external communication. By setting a common-mode inductor on the first communication branch and using the common-mode inductor connected in series between the signal buses, the common-mode anti-interference capability can be enhanced when the communication rate is low; by setting a transient voltage suppression diode on the second communication branch and using the transient voltage suppression diode connected in parallel between the signal buses, the common-mode anti-interference capability can be enhanced when the communication rate is high.

[0014] In some embodiments, each communication branch further includes a voltage regulator connected in series with the communication chip, and the voltage regulator is used to adjust the voltage output by the power supply circuit to a preset voltage value and then provide it to the communication chip. By setting a voltage regulator for each communication chip, a stable and required power supply voltage can be provided for the communication chip to adapt to different input voltage ranges, while also reducing isolation interference, performing overcurrent protection, overheating protection, and preventing voltage spikes from damaging the communication chip, thereby improving system reliability and stability.

[0015] An embodiment of a second aspect of the present application provides a battery device, which includes the battery management system in the above embodiment.

[0016] An embodiment of the third aspect of the present application provides an electrical device, which includes the battery device in the above embodiment.

[0017] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in the present application and should not be regarded as limiting the scope of the present application.

[0019] Figure 1 A battery management system structure diagram of some embodiments of the present application Figure 1 ;

[0020] Figure 2 A battery management system structure diagram of some embodiments of the present application Figure 2 ;

[0021] Figure 3 A battery management system structure diagram of some embodiments of the present application Figure 3 ;

[0022] Figure 4 A battery management system structure diagram of some embodiments of the present application Figure 4 ;

[0023] Figure 5 A schematic diagram of the connection between the first communication chip and the common mode inductor in some embodiments of the present application;

[0024] Figure 6 This is a schematic diagram of the connection between the second communication chip and the transient voltage suppression diode in some embodiments of the present application.

[0025] Description of reference numerals:

[0026] 100, battery management system; 110, power supply circuit; 111, power supply; 1111, first power supply; 1112, second power supply; 112, OR gate circuit; 113, converter; 1131, first converter; 1132, second converter; 1133, third converter; 120, communication circuit; 121, first communication branch; 1211, first communication chip; 1212, common mode inductor; 122, second communication branch; 1221, second communication chip; 1222, transient voltage suppression diode; 130, processor; 140, voltage regulator; 150, signal bus. DETAILED DESCRIPTION

[0027] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0029] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0030] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0031] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0032] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0033] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0034] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0035] At present, from the perspective of market development, the application of batteries is becoming more and more extensive. Batteries are not only used in energy storage power systems such as hydropower, thermal power, wind power and solar power stations, but also widely used in electric vehicles such as electric bicycles, electric motorcycles, electric cars, as well as military equipment and aerospace and other fields. With the continuous expansion of battery application areas, its market demand is also constantly expanding.

[0036] The battery management system is a system that can effectively manage and monitor battery packs. In the battery management system, the information interaction between modules plays a key role in ensuring the safety of the battery system, optimizing battery performance, achieving system integration and effective monitoring, and ensuring the efficient and stable operation of the battery system. In particular, the current battery management system has a wide range of application environments. For example, the battery management system is used in aviation systems. The aviation application environment has strict requirements on the real-time and accuracy of the information interaction between modules in the battery management system. In addition, the battery management system in aviation is usually exposed to low voltage, low temperature, high humidity, frequent lightning and other environments. It is very easy to be disturbed by the environment and malfunction, resulting in communication loss and information interaction failure between modules, thereby affecting the safety of the battery system.

[0037] Currently, in order to prevent communication loss and information exchange failure between modules, additional protective measures are usually added to the communication lines. For example, some fasteners are added to enhance the stability of the connection between modules and connectors, or some anti-interference protective parts are added to reduce the probability of damage to modules and communication chips. The above measures can only play a protective role. Under strong interference conditions, it will still cause device damage and lead to communication loss.

[0038] In order to solve the above problems, the present application provides a battery management system, which includes a power supply circuit, a communication circuit and a processor. The power supply circuit includes a power input terminal and a power output terminal, and the power input terminal is connected to the power supply; the communication circuit includes at least a plurality of communication branches arranged in parallel, and any communication branch includes a communication chip, and the communication chip is connected to the power output terminal; the processor is connected to the power output terminal, and the processor is respectively connected to the signals of the plurality of communication chips, and the processor is used to control one of the plurality of communication chips to communicate with the outside. By setting a plurality of parallel communication branches, a redundant communication branch is formed. In the case of a failure of a module, a connector or a communication chip of a single communication branch, another communication branch can be used to realize information interaction between modules, thereby avoiding communication loss as much as possible, improving the stability of communication between modules, and thus improving the safety of the battery system.

[0039] The battery management system disclosed in the embodiment of the present application can be used, but is not limited to, in a battery device composed of multiple single cells connected in series, in parallel, or in a combination of series and parallel. The battery device can be used, but is not limited to, in electrical devices such as vehicles, ships, or aircraft. Electrical devices can be, but are not limited to, mobile phones, tablets, laptops, electric toys, electric tools, battery cars, electric cars, ships, spacecraft, and the like. Among them, electric toys can include fixed or mobile electric toys, for example, game consoles, electric car toys, electric ship toys, and electric airplane toys, and the like, and spacecraft can include airplanes, rockets, space shuttles, and spacecraft, and the like. The battery device can also be used in energy storage devices, which include, but are not limited to, containerized energy storage, distributed energy storage, and the like.

[0040] The present application embodiment provides a battery management system 100, such as Figure 1 As shown, Figure 1 A battery management system structure diagram of some embodiments of the present application Figure 1 The battery management system 100 includes a power supply circuit 110, a communication circuit 120 and a processor 130. The power supply circuit 110 includes a power supply input terminal and a power supply output terminal, and the power supply input terminal is connected to a power supply 111; the communication circuit 120 includes at least a plurality of communication branches arranged in parallel, and any communication branch includes a communication chip, and the communication chip is connected to the power supply output terminal; the processor 130 is connected to the power supply output terminal, and the processor 130 is respectively connected to the plurality of communication chips by signal, and the processor 130 is used to control one of the plurality of communication chips to communicate with the outside.

[0041] The battery management system 100 includes a power supply circuit 110, which is a device for connecting an external power supply to the battery management system 100. The external power supply may be a battery or other power supply device. The power supply circuit 110 specifically includes a power input terminal and a power output terminal. The power input terminal is connected to an external power supply 111 to introduce power, and the power output terminal provides power to the communication circuit 120 and other devices in the battery management system 100.

[0042] It should be noted that the power circuit 110 can introduce multiple power supplies 111, so the number of power input terminals can be multiple, and the power circuit 110 can provide power for multiple devices or equipment, so the number of power output terminals can also be multiple. According to the requirements of the battery management system 100, the power circuit 110 can also include different devices, such as a voltage conversion device, a voltage stabilization device, etc.

[0043] The battery management system 100 also includes a communication circuit 120, which is used for information interaction between modules in the battery management system 100, including transmitting battery status data, transmitting control instructions, and realizing interaction between the system and external devices, to ensure the stable and efficient operation of the battery management system. The communication circuit 120 specifically includes a plurality of communication branches arranged in parallel, and any communication branch includes a communication chip connected to the power output terminal. It should be noted that the number of communication branches is not limited, and each communication branch can transmit the same data information or different data information. The communication chip obtains electrical energy by connecting to the power output terminal. The communication chip is mainly used for processing and conversion such as modulation and demodulation, encoding and decoding of signals, and at the same time realizes data transmission and reception to ensure accurate and efficient communication between different devices. For example, the communication circuit 120 includes a first communication branch 121 and a second communication branch 122, the first communication branch 121 includes a first communication chip 1211, and the second communication branch 122 includes a second communication chip 1221.

[0044] The battery management system 100 also includes a processor 130, which can be used to receive and analyze battery status data from the communication circuit 120, generate control instructions to manage battery charging, discharging and balancing, and coordinate the work of various parts in the system and communication with external devices. The processor 130 is specifically connected to the power output terminal and multiple communication chips, and obtains electric energy by connecting to the power output terminal. By connecting to multiple communication chips, it can send control signals to the communication chip and receive feedback signals to control the communication chip, and select any one of the communication branches in the communication circuit 120, and use the communication chip in the communication branch to communicate with the external device.

[0045] By setting up multiple parallel communication branches, each communication branch is provided with a separate communication chip to form a redundant communication branch. In the event that a module, connector or communication chip of a single communication branch fails, another communication branch can be used to implement information interaction between modules, thereby avoiding communication loss as much as possible, improving the stability of communication between modules, and thus improving the safety of the battery management system 100.

[0046] According to some embodiments of the present application, Figure 2 As shown, Figure 2 The structure of a battery management system according to some embodiments of the present application is schematically shown. The power input terminal includes a first power input terminal and a second power input terminal, and the first power input terminal and the second power input terminal are used to connect to different power supplies 111 respectively.

[0047] The power supply circuit 110 can introduce multiple power supplies 111 to prevent a single power supply 111 from failing and affecting the power supply 111 from providing power to the battery management system 100. The power supply 111 can be a battery or other power supply device. Exemplarily, the number of power supplies 111 is 2, specifically including a first power supply 1111 and a second power supply 1112, and the power input terminal includes a first power input terminal and a second power input terminal, the first power input terminal is connected to the first power supply 1111, and the second power input terminal is connected to the second power supply 1112. It should be noted that both the first power supply 1111 and the second power supply 1112 can provide electrical energy, and the power supply circuit 110 can select one power supply to use, or both power supplies can be used simultaneously.

[0048] By using the first power input terminal and the second power input terminal to connect different power supplies 111 respectively, when a single power supply fails, another power supply can be used for power supply without affecting the entire power supply circuit, thereby improving the stability of power supply.

[0049] According to some embodiments of the present application, Figure 2 As shown, the power supply circuit 110 also includes an OR gate circuit 112, the input end of the OR gate circuit 112 is connected to the first power input end and the second power input end, and the output end of the OR gate circuit 112 is connected to multiple communication branches of the communication circuit 120 and at least one of the microprocessor 130 through the power output end.

[0050] The input end of the OR gate circuit 112 is connected to the first power input end and the second power input end respectively, and is used to perform a logic "OR" operation. Specifically, when at least one of the input signals received by the input end of the OR gate circuit 112 and sent from the first power input end and the second power input end is high level (in the positive logic system, the high level usually represents logic "1"), the output is high level; only when all input signals are low level (in the positive logic system, the low level usually represents logic "0"), the output is low level. Such a connection can make the first power input end and the second power input end realize the redundancy of the power supply 111, that is, as long as any one of the first power supply 1111 and the second power supply 1112 can provide power, the power supply circuit 110 can provide electrical energy to the communication branch and the processor 130 and other devices, which can improve the reliability of the power supply 111.

[0051] By connecting the first power input terminal and the second power input terminal using the OR gate circuit 112, if one of the power supplies works normally, the output terminal has a voltage supply. At the same time, the OR gate circuit 112 has a logic judgment function, can filter and process the input power signal, and has anti-interference ability, thereby improving the reliability and stability of the entire battery system. At the same time, the OR gate circuit 112 can also simplify the power management design and reduce manufacturing costs and manufacturing complexity.

[0052] According to some embodiments of the present application, Figure 2 As shown, the power supply circuit 110 further includes a converter 113 , and the converter 113 is connected between the output terminal of the OR gate circuit 112 and the output terminal of the power supply.

[0053] The power supply circuit 110 further includes a converter 113, which is used to implement voltage conversion, and convert the voltage provided by the power supply 111 into a voltage value suitable for the communication branch. Any converter 113 that can implement the voltage conversion function meets the requirements, for example, the converter 113 is a DCDC (DC-to-DC converter).

[0054] The converter 113 is connected between the output end of the OR gate circuit 112 and the power output end, and can also realize electrical isolation and protection functions, avoid interference between circuits, and protect the circuit safety when overloaded or short-circuited. Exemplarily, the communication chip on the communication branch usually has an operating voltage of 3.3V, 5V, etc., the processor 130 usually has an operating voltage of 2V, 3.3V, 5V, etc., and the power supply 111 usually provides a voltage greater than the operating voltage required by the communication chip and the processor 130. For example, the voltage provided by the power supply 111 is 12V, and the converter 113 is used to convert the 12V voltage into a 5V voltage.

[0055] By setting up a converter 113, the voltage provided by the power supply 111 is converted into a stable voltage suitable for use in the communication branch, thereby improving the stability of information transmission. At the same time, the converter 113 is set between the output end of the OR gate circuit 112 and the power output end. Only a single converter is used to achieve voltage conversion, thereby reducing the manufacturing cost of the battery management system 100.

[0056] According to some embodiments of the present application, Figure 3 As shown, Figure 3 A battery management system structure diagram of some embodiments of the present application Figure 3 The power supply circuit 110 further includes a converter 113, and the converter 113 includes a first converter 1131 and a second converter 1132. The input end of the first converter 1131 is connected to the first power supply input end, and the output end of the first converter 1131 is connected to the input end of the OR gate circuit 112; the input end of the second converter 1132 is connected to the second power supply input end, and the output end of the second converter 1132 is connected to the input end of the OR gate circuit 112.

[0057] The power supply circuit 110 further includes a converter 113, which is used to implement voltage conversion, and converts the voltage provided by the power supply 111 into a voltage value suitable for the communication branch. For example, the converter 113 is a DCDC. The converter 113 includes a first converter 1131 and a second converter 1132, and the power supply 111 includes a first power supply 1111 and a second power supply 1112.

[0058] The first converter 1131 and the second converter 1132 may be converters of the same type or different types. In some embodiments, the first converter 1131 and the second converter 1132 may convert the correspondingly connected power supply voltage into the required power supply voltage.

[0059] The input end of the first converter 1131 is connected to the first power supply 1111 through the first power input end, and the output end of the first converter 1131 is connected to the input end of the OR gate circuit 112. The first converter 1131 converts the voltage of the acquired first power supply 1111 and outputs it to the OR gate circuit 112.

[0060] The input end of the second converter 1132 is connected to the second power supply 1112 via the second power input end, and the output end of the second converter 1132 is connected to the input end of the OR gate circuit 112. The second converter 1132 converts the voltage of the acquired second power supply 1112 and outputs it to the OR gate circuit 112.

[0061] The input end of the first converter 1131 is connected to the first power input end, the input end of the second converter 1132 is connected to the second power input end, and then the output end of the first converter 1131 and the output end of the second converter 1132 are connected to the input end of the OR gate circuit 112, so that the OR gate circuit 112 can simultaneously receive two power supplies converted by the converters and perform a logical "OR" operation. When one of the converters 113 fails, the voltage conversion can still be achieved, and the power supply that meets the requirements is provided to the corresponding communication chip, thereby improving the stability of information transmission.

[0062] According to some embodiments of the present application, Figure 4 As shown, Figure 4 A battery management system structure diagram of some embodiments of the present application Figure 4 The communication circuit 120 at least includes a first communication branch 121 and a second communication branch 122; the power output terminal includes a first power output terminal, a second power output terminal and a third power output terminal; the first communication branch 121 is connected to the output terminal of the first converter 1131 through the first power output terminal, the second communication branch 122 is connected to the output terminal of the second converter 1132 through the second power output terminal, and the processor 130 is connected to the output terminal of the OR gate circuit 112 through the third power output terminal.

[0063] The communication circuit 120 includes a first communication branch 121 and a second communication branch 122. The converter 113 includes a first converter 1131 and a second converter 1132. The input end of the first converter 1131 is connected to the first power supply 1111 through the first power input end. One line of the output end of the first converter 1131 is directly connected to the first communication branch 121, so that the voltage output by the first converter 1131 is directly delivered to the first communication chip 1211, and the other line is connected to the input end of the OR gate circuit 112. The input end of the second converter 1132 is connected to the second power supply 1112 through the second power input end. One line of the output end of the second converter 1132 is directly connected to the second communication branch 122, so that the voltage output by the second converter 1132 is directly delivered to the second communication chip 1221, and the other line is connected to the input end of the OR gate circuit 112. The processor 130 is connected to the output end of the OR gate circuit 112 through the third power output end.

[0064] By independently connecting the first communication branch 121 and the second communication branch 122 to the power supply 111, the converter 113 and the communication chip respectively, there is no intersection between the two communication branches, and a failure in any communication branch will not affect the other communication branch, thereby avoiding communication loss as much as possible and improving the stability of communication between modules. At the same time, different power supplies 111 use OR gate circuits 112 to power the processor 130. If any communication branch communicates normally, the processor 130 can obtain the working voltage, thereby improving the reliability of stable processing of the processor 130.

[0065] According to some embodiments of the present application, Figure 1 As shown, the communication circuit 120 includes at least a first communication branch 121 and a second communication branch 122; the first communication branch 121 includes a first communication chip 1211, and the second communication branch 122 includes a second communication chip 1221; wherein the first communication chip 1211 and the second communication chip 1221 are chips with different anti-electromagnetic interference performance.

[0066] Electromagnetic interference (EMI) refers to the adverse effects of external electromagnetic signals or electromagnetic signals generated by the device itself on the normal operation of the device in the working environment of the electronic device. For example, the operation of nearby motors and radio signal transmission may generate electromagnetic interference. Interference signals may cause errors in the communication chip during data transmission and reception, such as data loss and bit errors.

[0067] The communication circuit 120 includes a first communication branch 121 and a second communication branch 122. The first communication branch 121 is provided with a first communication chip 1211, and the second communication branch 122 is provided with a second communication chip 1221. The first communication chip 1211 and the second communication chip 1221 are chips with different anti-electromagnetic interference performance. The different anti-electromagnetic interference performance here can be achieved by selecting communication chips of different brands or different specifications, for example, one is an optical coupling isolation chip and the other is a magnetic coupling isolation chip; it can also be achieved by selecting communication chips with different manufacturing processes, such as using different electromagnetic shielding packages or anti-interference coatings.

[0068] Exemplarily, the first communication chip 1211 is internally provided with an electromagnetic shielding layer to block the intrusion of external electromagnetic signals, or has a more advanced signal filtering circuit to filter out signals of interference frequencies, so that the anti-interference capability of the first communication chip 1211 may be stronger than that of the second communication chip 1221.

[0069] By respectively arranging a first communication chip 1211 and a second communication chip 1221 with different anti-electromagnetic interference performance on the first communication branch 121 and the second communication branch 122, the possibility of the first communication chip 1211 and the second communication chip 1221 being interfered with and failing and damaged at the same time under electromagnetic interference can be effectively reduced, thereby improving the stability of communication between modules.

[0070] According to some embodiments of the present application, Figure 5 and Figure 6 As shown, Figure 5 A schematic diagram of the connection between the first communication chip and the common mode inductor in some embodiments of the present application; Figure 6 The second communication chip and transient voltage suppression diode connection diagram of some embodiments of the present application. The communication circuit 120 includes at least a first communication branch 121 and a second communication branch 122; the first communication branch 121 includes a first communication chip 1211 and a common mode inductor 1212, the common mode inductor 1212 is connected in series to the output end of the first communication chip 1211 and is used to connect to the signal bus 150 for external communication; and / or the second communication branch 122 includes a second communication chip 1221 and a transient voltage suppression diode 1222, and the two ends of the transient voltage suppression diode 1222 are respectively connected to the output end of the second communication chip 1221 and are used to connect to two signal buses 150 for external communication.

[0071] The commonly used communication rates in the battery management system 100 are mainly 125kbps, 250kbps and 500kbps. Different communication rates can be suitable for different application scenarios and requirements. For example, a communication rate of 125kbps can be suitable for application scenarios that require a lower data transmission rate, such as basic battery status monitoring and simple control instruction transmission. For example, a communication rate of 250kbps can be suitable for medium data transmission rate requirements, such as scenarios that require real-time monitoring and control of battery status. For example, a communication rate of 500kbps can be suitable for high data transmission rate requirements, such as application scenarios that require high-speed data transmission and complex control.

[0072] The first communication branch 121 includes a first communication chip 1211 and a common mode inductor 1212. The common mode inductor 1212 is connected in series to the output end of the first communication chip 1211 and is used to connect to the external communication signal bus 150. This structure has good common mode anti-interference capability when the communication rate is low, for example, the communication rate is 125kbps.

[0073] The second communication branch 122 includes a second communication chip 1221 and a transient voltage suppression diode 1222, and the two ends of the transient voltage suppression diode 1222 are respectively connected to the output end of the second communication chip 1221 and two signal buses 150 for external communication. This structure has good common mode interference immunity when the communication rate is high, for example, the communication rate is 500kbps.

[0074] By setting a common-mode inductor 1212 on the first communication branch 121 and connecting the common-mode inductor 1212 in series between the signal buses 150, the common-mode anti-interference capability can be enhanced when the communication rate is low; by setting a transient voltage suppression diode 1222 on the second communication branch 122 and connecting the transient voltage suppression diode 1222 in parallel between the signal buses 150, the common-mode anti-interference capability can be enhanced when the communication rate is high.

[0075] According to some embodiments of the present application, Figure 4 As shown, each communication branch further includes a voltage regulator 140 connected in series with the communication chip. The voltage regulator 140 is used to adjust the voltage output by the power supply circuit 110 to a preset voltage value and then provide it to the communication chip.

[0076] The communication branch includes a voltage regulator 140, which is used to realize voltage conversion and provide a stable output voltage value. Any voltage regulator 140 that can realize the voltage conversion and voltage stabilization function meets the requirements, for example, the voltage regulator 140 is a LDO (Low-dropout regulator).

[0077] Exemplarily, the communication circuit 120 includes a first communication branch 121, and the first communication branch 121 includes a voltage regulator 140 and a first communication chip 1211. The normal operating voltage of the first communication chip 1211 is 5V, and the voltage received by the voltage regulator 140 may be between 4V and 6V. After being processed by the voltage regulator 140, the voltage value output by the voltage regulator 140 to the first communication chip 1211 can be maintained between 4.8V and 5.2V, thereby improving the working performance of the first communication chip 1211 and avoiding damage to the first communication chip 1211.

[0078] Exemplarily, the communication circuit 120 includes a second communication branch 122, and the second communication branch 122 includes a voltage regulator 140 and a second communication chip 1221. The normal operating voltage of the second communication chip 1221 is 3.3V. The voltage received by the voltage regulator 140 may be between 2V and 3V. After being processed by the voltage regulator 140, the voltage value output by the voltage regulator 140 to the second communication chip 1221 can be maintained between 3.1V and 3.5V, thereby improving the working performance of the second communication chip 1221 and avoiding damage to the second communication chip 1221.

[0079] Exemplarily, a converter 113 or a voltage regulator 140 may also be disposed upstream of the processor 130 , and the converter 113 or the voltage regulator 140 may be utilized to provide a stable operating voltage for the processor 130 .

[0080] By setting a voltage regulator for each communication chip, a stable and compliant power supply voltage can be provided for the communication chip to adapt to different input voltage ranges. At the same time, it can also reduce isolation interference, perform overcurrent protection, overheating protection, and prevent voltage spikes from damaging the communication chip, thereby improving system reliability and stability.

[0081] An embodiment of the present application provides a battery device, which includes the battery management system in the above embodiment.

[0082] An embodiment of the present application provides an electrical device, which includes the battery device in the above embodiment.

[0083] In some embodiments, Figure 4 As shown, the battery management system 100 includes a power circuit 110 , a communication circuit 120 and a processor 130 .

[0084] The power circuit 110 includes a power supply 111 , an OR gate circuit 112 and a converter 113 . The power supply 111 includes a first power supply 1111 and a second power supply 1112 . The converter 113 includes a first converter 1131 , a second converter 1132 and a third converter 1133 .

[0085] The communication circuit 120 includes a first communication branch 121 and a second communication branch 122. The first communication branch 121 includes a regulator 140 and a first communication chip 1211. The second communication branch 122 includes a regulator 140 and a second communication chip 1221. Both the first communication chip 1211 and the second communication chip 1221 are connected to the signal bus 150.

[0086] The first power supply 1111 is connected to the input of the first converter 1131, one line of the output of the first converter 1131 is directly connected to the input of the regulator 140 in the first communication branch 121, the output of the regulator 140 is connected to the first communication chip 1211, and another line is connected to the input of the AND-OR gate circuit 112.

[0087] The second power supply 1112 is connected to the input of the second converter 1132. One line of the output of the second converter 1132 is directly connected to the input of the regulator 140 in the second communication branch 122. The output of the regulator 140 is connected to the second communication chip 1221. Another line is connected to the input of the AND-OR gate circuit 112.

[0088] The output end of the OR gate circuit 112 is connected to the input end of the third converter 1133 , and the output end of the third converter 1133 is connected to the processor 130 to provide power to the processor 130 .

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should all be included in the scope of the claims and specification of the present application. In particular, as long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions that fall within the scope of the claims.

Claims

1. A battery management system, characterized in that: include: A power supply circuit, comprising a power input terminal and a power output terminal, wherein the power input terminal is connected to a power supply; A communication circuit, comprising at least a plurality of communication branches arranged in parallel, any of the communication branches comprising a communication chip, and the communication chip being connected to the power output terminal; as well as A processor is connected to the power output terminal, the processor is respectively connected to the plurality of communication chips by signal, and the processor is used to control one of the plurality of communication chips to communicate with the outside.

2. The battery management system according to claim 1, characterized in that: The power input terminal includes a first power input terminal and a second power input terminal, and the first power input terminal and the second power input terminal are used to connect to different power supplies respectively.

3. The battery management system according to claim 2, characterized in that: The power supply circuit also includes: An OR gate circuit, wherein the input end of the OR gate circuit is connected to the first power input end and the second power input end, and the output end of the OR gate circuit is connected to multiple communication branches of the communication circuit and at least one of the microprocessor through the power output end.

4. The battery management system according to claim 3, characterized in that: The power supply circuit also includes: The converter is connected between the output end of the OR gate circuit and the output end of the power supply.

5. The battery management system according to claim 3, characterized in that: The power supply circuit also includes: The converter comprises a first converter and a second converter, wherein the input end of the first converter is connected to the first power input end, and the output end of the first converter is connected to the input end of the OR gate circuit; the input end of the second converter is connected to the second power input end, and the output end of the second converter is connected to the input end of the OR gate circuit.

6. The battery management system according to claim 5, characterized in that: The communication circuit comprises at least a first communication branch and a second communication branch; The power output terminal includes a first power output terminal, a second power output terminal and a third power output terminal; The first communication branch is connected to the output end of the first converter through the first power output end, the second communication branch is connected to the output end of the second converter through the second power output end, and the processor is connected to the output end of the OR gate circuit through the third power output end.

7. The battery management system according to any one of claims 1 to 6, characterized in that: The communication circuit comprises at least a first communication branch and a second communication branch; The first communication branch includes a first communication chip, and the second communication branch includes a second communication chip; The first communication chip and the second communication chip are chips with different anti-electromagnetic interference performance.

8. The battery management system according to any one of claims 1 to 6, characterized in that: The communication circuit comprises at least a first communication branch and a second communication branch; The first communication branch includes a first communication chip and a common-mode inductor, wherein the common-mode inductor is connected in series to an output end of the first communication chip and is used to connect to a signal bus for external communication; and / or The second communication branch includes a second communication chip and a transient voltage suppression diode, and two ends of the transient voltage suppression diode are respectively connected to the output end of the second communication chip and two signal buses for external communication.

9. The battery management system according to any one of claims 1 to 6, characterized in that: Each of the communication branches also includes a voltage stabilizer connected in series with the communication chip, and the voltage stabilizer is used to adjust the voltage output by the power supply circuit to a preset voltage value and then provide it to the communication chip.

10. A battery device, characterized in that: Comprising a battery management system as claimed in any one of claims 1 to 9.

11. An electrical device, characterized in that: The electrical device comprises the battery device as claimed in claim 10.

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