Optical module for solving power-on time sequence disorder

Abstract

The utility model provides an optical module for solving power-on time sequence disorder, comprising an MCU module, a golden finger module, a voltage conversion module and a voltage sampling module, the golden finger module, the voltage conversion module and the voltage sampling module are all connected with the MCU module, and the voltage sampling module is connected with the voltage conversion module. According to the optical module, the voltage sampling module is added, voltage detection is added before the MCU configures an electric chip register, initialization is carried out when the voltage is normal, in the process, the MCU module of the optical module continuously judges the voltage, collected by the voltage sampling module, on the VCC33 pin, and after the voltage reaches a normal value, the MCU module detects the voltage on the VCC33 pin. And the register of the electric chip is initialized, so that the problem that the electric chip can reset after the power-on time sequence is disordered, so that all configurations are cleared, and the electric chip cannot work normally is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of optical communication modules, in particular to an optical module for solving power-on timing disorder. Background Art

[0002] The main components of the optical module are MCU, electric chip, laser, etc. The MCU is responsible for configuring the electric chip, and the electric chip plays a driving role, driving the laser to emit light, etc. In the optical module, the electric chip plays an extremely important role, and it is very important to ensure the normal working environment of the electric chip. For the electric chip, the requirements for its normal operation can be obtained from the corresponding data manual. Different electric chips may have different requirements. For some electric chips, it is only necessary to provide a voltage within the range to its power pin. Some electric chips also require that the voltage of the power pin be powered on at a specified timing when powered on due to different internal structures and logic processing. If the requirements are not met, it is likely to cause abnormal operation of the electric chip.

[0003] Take MACOM's 37645 chip as an example. This is an electronic chip that needs to meet the power-on timing. Figure 1 As shown in the figure, when Vcc33 reaches 3.3V, Vcc18 needs to reach 1.8V within 0-40ms. In addition, the time required for Vcc18 to climb from 0V to 1.8V needs to be 0.4-40ms. When using this chip as an electrical chip for research and development, it was found that the optical module was prone to not emitting light when plugged in and powered on, which was different from the preset. After research, it was found that this was because the optical module gold finger was in contact with the socket during the plug-in and power-on process. The optical module was powered on, but because the contact surface between the gold finger pin and the socket pin was small at this time, a large line resistance appeared, causing the power supply voltage Vcc33 to be unable to climb quickly, which in turn caused the Vcc18 voltage to be unable to reach 1.8V within 0.4-40ms, resulting in a power-on timing disorder, causing the electrical chip to work abnormally. Utility Model Content

[0004] Therefore, one purpose of the present invention is to provide an optical module for solving the problem of power-on timing disorder, so as to solve the problems mentioned in the background technology and overcome the deficiencies in the prior art.

[0005] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0006] like Figure 2 As shown, an optical module for solving power-on timing disorder includes an MCU module, a gold finger module, a voltage conversion module and a voltage sampling module. The gold finger module, the voltage conversion module and the voltage sampling module are all connected to the MCU module, and the voltage sampling module is connected to the voltage conversion module.

[0007] Furthermore, the voltage sampling module includes an operational amplifier U11A, a first end of the operational amplifier U11A is connected to the MCU module, a second end of the operational amplifier U11A is respectively connected to one end of a resistor R40 and one end of a resistor R41, the other end of the resistor R40 is connected to the first end of the operational amplifier U11A, the other end of the resistor R41 is grounded, a third end of the operational amplifier U11A is respectively connected to one end of a resistor R38 and one end of a resistor R39, the other end of the resistor R39 is grounded, the other end of the resistor R38 is connected to a 3.3V power supply, and the third end of the operational amplifier U11A is connected to a voltage sampling point.

[0008] Furthermore, the MCU module includes a control chip U9, the control chip U9 is connected to the gold finger module via I2C, and the control chip U9 is connected to the electrical chip module via I2C.

[0009] Furthermore, the voltage conversion module includes a linear voltage regulator chip U10, the input end of the linear voltage regulator is connected to a 3.3V voltage, and the output end of the linear voltage regulator outputs a 1.8V voltage.

[0010] Furthermore, the electric chip module includes a receiving unit and a transmitting unit, the receiving unit includes a receiver U2, and the transmitting unit includes a transmitter U3.

[0011] Furthermore, the optical module also includes a slow start module, which is respectively connected to the gold finger module, the electric chip module, the MCU module and the voltage conversion module. The slow start module includes a field effect transistor U7, and the slow start module filters out surges, ripples and impact currents of the power supply through the field effect transistor U7.

[0012] Furthermore, the operational amplifier U11A has a model of LM358B.

[0013] Furthermore, the model of the control chip U9 is GD32F310F6P6.

[0014] Furthermore, the model of the linear voltage regulator chip U10 is ME6211C18M5G-N.

[0015] Furthermore, the model of the receiver U2 is MATA-37644B, and the model of the transmitter U3 is MALD-37645B.

[0016] Therefore, the utility model has the following beneficial effects:

[0017] The optical module of the utility model adds a voltage sampling module, and adds voltage detection before the MCU configures the register of the electric chip. When the voltage is normal, initialization is performed. In this process, the MCU module of the optical module continuously judges the voltage on the VCC33 pin collected by the voltage sampling module. When the voltage reaches a normal value, the register of the electric chip is initialized, thereby avoiding the problem that the electric chip will be reset after the power-on timing is disordered, resulting in the clearing of all configurations and the inability of the electric chip to work normally.

[0018] Additional aspects and advantages of the present invention will be given in part in the following description and in part will become apparent from the following description or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0020] Figure 1 This is the power-on timing diagram of MACOM's 37645 chip;

[0021] Figure 2 It is a structural schematic diagram of the optical module of the utility model;

[0022] Figure 3 This is a circuit schematic diagram of the gold finger module of the utility model embodiment;

[0023] Figure 4 This is a schematic diagram of a receiving unit circuit of an electric chip module according to an embodiment of the utility model;

[0024] Figure 5 This is a schematic diagram of the circuit of the transmitting unit of the electric chip module of the embodiment of the utility model;

[0025] Figure 6 It is a circuit schematic diagram of the MCU module of the embodiment of the utility model;

[0026] Figure 7 This is a circuit schematic diagram of the slow start module of the utility model embodiment;

[0027] Figure 8 It is a circuit schematic diagram of the voltage conversion module of the embodiment of the utility model;

[0028] Fig. 9 It is a circuit schematic diagram of the voltage sampling module of the embodiment of the utility model. DETAILED DESCRIPTION

[0029] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0030] In the present invention, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] An optical module for solving power-on timing disorder comprises an MCU module, a gold finger module, a voltage conversion module and a voltage sampling module. The gold finger module, the voltage conversion module and the voltage sampling module are all connected to the MCU module, and the voltage sampling module is connected to the voltage conversion module.

[0032] The optical module of the utility model is added with a voltage sampling module. The voltage sampling module can collect voltage before the MCU module configures the registers of the electric chip module, and send the collected results to the MCU module. The MCU module initializes the registers of the electric chip module based on the voltage on the VCC33 pin collected by the voltage sampling module. When the voltage reaches a normal value, the MCU module initializes the registers of the electric chip module, thereby avoiding the problem that the electric chip will be reset after the power-on timing is disordered, resulting in the clearing of all configurations and the inability of the electric chip to work normally.

[0033] The optical module of the utility model effectively solves the problem that the electrical chip does not work properly when the power-on timing of the optical module is disordered. During the initialization process, a voltage detection link is added. Only when the voltage is normal, the electrical chip initialization operation is performed, which offsets the impact caused by the power-on timing disorder, avoids the risk of configuration being erased, and clears the original abnormal state.

[0034] Furthermore, the voltage sampling module includes an operational amplifier U11A, a first end of the operational amplifier U11A is connected to the MCU module, a second end of the operational amplifier U11A is respectively connected to one end of a resistor R40 and one end of a resistor R41, the other end of the resistor R40 is connected to the first end of the operational amplifier U11A, the other end of the resistor R41 is grounded, a third end of the operational amplifier U11A is respectively connected to one end of a resistor R38 and one end of a resistor R39, the other end of the resistor R39 is grounded, the other end of the resistor R38 is connected to a 3.3V power supply, and the third end of the operational amplifier U11A is connected to a voltage sampling point.

[0035] In one embodiment, the circuit schematic diagram of the voltage sampling module of the utility model is described. Fig. 9 As shown, the voltage sampling module circuit includes an operational amplifier U11A, a resistor R38, a resistor R39, a resistor R40, and a resistor R41. The first end of the operational amplifier U11A is connected to the PA4 pin of the MCU module circuit control chip U9, the second end of the operational amplifier U11A is respectively connected to one end of the resistor R40 and one end of the resistor R41, the other end of the resistor R40 is connected to the first end of the operational amplifier U11A, the other end of the resistor R41 is grounded, the third end of the operational amplifier U11A is respectively connected to one end of the resistor R38 and one end of the resistor R39, the other end of the resistor R39 is grounded, the other end of the resistor R38 is connected to a 3.3V power supply, and the third end of the operational amplifier U11A is connected to a voltage sampling point. The voltage sampling circuit can divide the voltage at the input end by adjusting the resistance values ​​of the resistors R38 and R39. Prevent the input voltage from exceeding the limit. The Vin end is the point where voltage sampling is required. VCC33 = Vin*(R40+R41) / R41. The output terminal VCC33 is connected to the corresponding pin of the MCU, and the MCU obtains the voltage value at this time.

[0036] Furthermore, the model of the operational amplifier U11A is LM358B.

[0037] Furthermore, the MCU module includes a control chip U9, the control chip U9 is connected to the gold finger module through a first I2C, and the control chip U9 is connected to the power chip module through a second I2C.

[0038] In one embodiment, the circuit schematic diagram of the MCU module of the present invention is described. Figure 6As shown, the MCU module circuit includes a control chip U9, a resistor R5, a resistor R11, a resistor R22, a resistor R23, a resistor R28, a resistor R18, a resistor R19, a resistor R33, a resistor R37, a capacitor C30, a capacitor C33, a capacitor C34, a capacitor C31, a capacitor C32, and an inductor L12. The BOOT0 pin of the control chip U9 is respectively connected to one end of the resistor R5 and the resistor R11, the other end of the resistor R5 is connected to the VCC_TX power supply, the other end of the resistor R11 is grounded, the PF0 pin of the control chip U9 is connected to the TX_DIS pin of the gold finger module U1, and the PF1 pin of the control chip U9 is grounded via the resistor R33. The NRST pin of the control chip U9 is respectively connected to one end of the capacitor C30 and one end of the resistor R37, the other end of the capacitor C30 is grounded, and the other end of the resistor R37 is connected to the VCC_TX power supply. The VDDA pin of the control chip U9 is respectively connected to one end of the capacitor C31 and one end of the inductor L12, the other end of the capacitor C31 is grounded, and the other end of the inductor L12 is connected to the VCC_TX power supply. The capacitor C32 is connected in parallel with the capacitor C31. The PA0 pin of the control chip U9 is respectively connected to the SCL_2 pin of the receiver U2 of the electric chip module receiving unit and the SCL_1 pin of the transmitter U3 of the electric chip module sending unit. The PA1 pin of the control chip U9 is respectively connected to the SCL_2 pin of the receiver U2 of the electric chip module receiving unit and the SCL_1 pin of the transmitter U3 of the electric chip module sending unit. The PA2 pin of the control chip U9 is connected to the ground via the resistor R18, and the PA3 pin of the control chip U9 is connected to the ground via the resistor R19. The PA5 pin of the control chip U9 is connected to one end of the resistor R28 and the TX_FAULT pin of the gold finger module U1, respectively. The other end of the resistor R28 is grounded. The PA6 pin of the control chip U9 is connected to the SAP pin of the transmitter U3 of the sending unit of the electric chip module. The PA7 pin of the control chip U9 is connected to the RX_LOS pin of the gold finger module U1. The PB1 pin is connected to the RSSI_3 pin of the receiver U2 of the receiving unit of the electric chip module, the VSS pin of the control chip U9 is grounded, the VDD pin of the control chip U9 is connected to the VCC_TX power supply, one end of the capacitor C34 is connected to the VSS pin of the control chip U9, the other end of the capacitor C34 is grounded, the capacitor C33 is connected in parallel with the capacitor C34, the PA9 pin of the control chip U9 is connected to the VCC_TX power supply via the resistor R23, the PA10 pin of the control chip U9 is connected to the VCC_TX power supply via the resistor R22, the PA13 pin of the control chip U9 is connected to the TOP2 signal terminal, and the PA14 pin of the control chip U9 is connected to the TOP1 signal terminal.

[0039] Furthermore, the model of the control chip U9 is GD32F310F6P6.

[0040] The MCU module power supply and other peripheral circuits refer to the chip manual, and the GPIO pins are connected according to actual needs. The PA9 and PA10 pins in the schematic diagram implement IIC, connect the gold fingers, and realize the communication of the optical module; the PA0 and PA1 pins are connected to the receiver U2 and transmitter U3 electrical chips through IIC, which can realize the MCU to electrical chip register configuration and communication, etc. The RX_LOS, TX_FAULT, TX_F and other pins realize the real-time status display of the optical module specified by the protocol.

[0041] Furthermore, the voltage conversion module includes a linear voltage regulator chip U10, the input end of the linear voltage regulator is connected to a 3.3V voltage, namely, a VCC_RX power supply, and the output end of the linear voltage regulator outputs a 1.8V voltage.

[0042] In one embodiment, the circuit diagram of the voltage conversion module of the utility model is described. Figure 8 As shown, the voltage conversion module circuit includes a linear voltage regulator chip U10, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, and an inductor L13. The VIN pin of the linear voltage regulator chip U10 is respectively connected to the VCC_RX power supply and one end of the capacitor C22, the other end of the capacitor C22 is grounded, the VSS pin of the linear voltage regulator chip U10 is grounded, the CE pin of the linear voltage regulator chip U10 is connected to the PF1 pin of the MCU module control chip U9, the VOUT pin of the linear voltage regulator chip U10 is connected to one end of the inductor L13, the other end of the inductor L13 is connected to one end of the capacitor C23, the other end of the capacitor C23 is grounded, the capacitor C24 and the capacitor C25 are connected in parallel with the capacitor C23, and the other end of the inductor L13 outputs a 1.8V power signal.

[0043] Furthermore, the model of the linear voltage regulator chip U10 is ME6211C18M5G-N.

[0044] Since the electrical chip (receiver U2 and transmitter U3) requires a 1.8V voltage to work properly, it is necessary to provide the electrical chip with a 1.8V operating voltage. Since the gold finger voltage is 3.3V, a DCDC voltage conversion circuit is required to convert the 3.3V voltage into 1.8V and provide it to the electrical chip.

[0045] Furthermore, the electric chip module includes a receiving unit and a transmitting unit, the receiving unit includes a receiver U2, and the transmitting unit includes a transmitter U3.

[0046] In one embodiment, the circuit schematic diagram of the electric chip module of the utility model is described. Figure 4 and Figure 5As shown, the electronic chip module includes a receiving unit and a transmitting unit. The transmitting unit circuit includes a transmitter U3, a capacitor C6, a capacitor C7, a capacitor C35, a capacitor C12, a capacitor C13, a resistor R27, a resistor R9, and an inductor L5. The GND1 pin, the GND2 pin, the GND3 pin, the GND4 pin, the GND5 pin, the GND6 pin, and the GND8 pin of the transmitter U3 are all grounded. The TXP pin of the transmitter U3 is connected to the TD+ pin of the gold finger module U1 via the capacitor C6. The TXN pin of the transmitter U3 is connected to the TD- pin of the gold finger module U1 via the capacitor C7. The V18_1 pin of the transmitter U3 is connected to the VCCT_1 V8 power supply signal, that is, the 1.8V power supply signal output by the voltage conversion module, the TX_DIS_2 pin of the transmitter U3 is connected to the VCC_TX power supply through the resistor R9, the IVCSEL_1 of the transmitter U3 is connected to the laser, the MPD_1 pin of the transmitter U3 is grounded through the capacitor C35, the V33_1 pin of the transmitter U3 is connected to one end of the inductor L5, and the other end of the inductor L5 is connected to the VCC_TX power supply, one end of the capacitor C12 is connected to one end of the inductor L5, and the other end of the capacitor C12 is grounded, the capacitor C13 is connected in parallel with the capacitor C12, and the RS_E pin of the transmitter U3 is connected to the RS1 pin of the gold finger module U1 through the resistor R27.

[0047] The utility model includes a laser, which is not shown in the figure.

[0048] The receiving unit includes a receiver U2, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R24, a resistor R26, and an inductor L1. The GND1 pin, the GND2 pin, the GND6 pin, the GND7 pin, the GND8 pin, the GND9 pin, and the GND10 pin of the receiver U2 are all grounded. The RXN pin of the receiver U2 is connected to the RD- pin of the gold finger module U1 via the capacitor C4. The RXP pin of the receiver U2 is connected to the RD+ pin of the gold finger module U1 via the capacitor C5. The V3.3_2 pin of the receiver U2 is connected to one end of the inductor L1, and the other end of the inductor L1 is connected to the VCC_RX power supply. One end of the capacitor C1 is connected to one end of the inductor L1, and the other end of the capacitor C1 is connected to the VCC_RX power supply. One end is grounded, capacitor C2 is connected in parallel with capacitor C1, the RSSI_3 pin of receiver U2 is connected to one end of capacitor C3, the other end of capacitor C3 is grounded, resistor R2 is connected in parallel with capacitor C3, V18_3 pin and V18_4 pin of receiver U2 are connected to 1.8V power supply signal, INT3 pin of receiver U2 is connected to one end of resistor R1 via resistor R24, the other end of resistor R1 is connected to VCC_RX power supply, RS_F_E_2 pin of receiver U2 is connected to RS0 pin of gold finger module U1 via resistor R26, one end of resistor R4 is connected to SCL_2 pin of receiver U2, the other end of resistor R4 is connected to VCC_RX power supply, one end of resistor R3 is connected to SDA_2 pin of receiver U2, the other end of resistor R3 is connected to VCC_RX power supply.

[0049] Furthermore, the model of the receiver U2 is MATA-37644B, and the model of the transmitter U3 is MALD-37645B.

[0050] The Tx and Rx chips (transmitter U3 and receiver U2) use MACOM's 37644 and 37645, of which 37644 is the receiving end and 37645 is the transmitting end; the chip power supply and communication interface and other peripheral circuits can refer to the chip manual. Among them, TD+ and TD- are connected to Tx, RD+ and RD- are connected to Rx, PD-TX is connected to the laser to achieve electro-optical conversion, and PD-RX achieves photoelectric conversion.

[0051] Furthermore, the optical module also includes a slow start module, which is respectively connected to the gold finger module, the electric chip module, the MCU module and the voltage conversion module. The slow start module includes a field effect transistor U7, and the slow start module filters out surges, ripples and impact currents of the power supply through the field effect transistor U7.

[0052] In one embodiment, the circuit schematic diagram of the soft start module of the utility model is described. Figure 7As shown, the slow start module includes a field effect tube U7, a capacitor C14, a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C18, a capacitor C19, a capacitor C20, a capacitor C21, a resistor R12, a resistor R13, an inductor L10, and an inductor L11. The S1 pin of the field effect tube U7 is connected to the VCC_T power supply signal, the G1 pin of the field effect tube U7 is grounded via the resistor R12, one end of the capacitor C14 is connected to the S1 pin of the field effect tube U7, the other end of the capacitor C14 is connected to the G1 pin of the field effect tube U7, the D2 pin of the field effect tube U7 is connected to one end of the inductor L11, the other end of the inductor L11 outputs the VCC_RX power supply signal, one end of the capacitor C19 is connected to the other end of the inductor L11, and the inductor L11 outputs the VCC_RX power supply signal. The other end of capacitor C19 is grounded, capacitors C20 and C21 are connected in parallel with capacitor C19, the S2 pin of field effect transistor U7 outputs a VCC_R power supply signal, the G2 pin of field effect transistor U7 is connected to one end of resistor R13, the other end of resistor R13 is grounded, one end of capacitor C15 is connected to the S2 pin of field effect transistor U7, the other end of capacitor C15 is connected to the G2 pin of field effect transistor U7, the D1 pin of field effect transistor U7 is connected to one end of inductor L10, the other end of inductor L10 outputs a VCC_TX power supply signal, one end of capacitor C16 is connected to the other end of inductor L10, the other end of capacitor C16 is connected to the other end of resistor R13, and capacitors C17 and C18 are both connected in parallel with capacitor C16.

[0053] Specifically, the field effect transistor U7 is a PMOS transistor, and its model is TPM4152PEC6.

[0054] The function of the slow start module circuit is to filter out the surge and ripple of the power supply and the large impact current that exceeds the safety range of the module through the PMOS tube when the optical module is powered on.

[0055] In one embodiment, the circuit schematic diagram of the gold finger module of the utility model is described. Figure 3 The gold finger module shown includes a gold finger U1, which is provided with 20 terminals or pins. The VEET pin, MOD_ABS pin, VEER pin, VEET1 pin, VEET2 pin, VEER2 pin, and VEER1 pin of the gold finger U1 are all grounded. The VCCT pin of the gold finger U1 is connected to the VCC_T power signal, the VCCR pin of the gold finger U1 is connected to the VCC_R power signal, the SDA pin of the gold finger U1 is connected to the PA10 pin of the control chip U9, and the SCL pin of the gold finger U1 is connected to the PA9 pin of the control chip U9.

[0056] The gold finger module part complies with the SFP-MSA protocol, which defines each gold finger pin and is the power supply and communication interface of the optical module.

[0057] The optical module of the utility model adds a voltage sampling module, and adds voltage detection before the MCU configures the register of the electric chip. When the voltage is normal, initialization is performed. In this process, the MCU module of the optical module will continuously judge the voltage on the VCC33 pin collected by the voltage sampling module. When the voltage reaches a normal value, the register of the electric chip is initialized, thereby avoiding the problem that the electric chip will be reset after the power-on timing is disordered, resulting in the clearing of all configurations and the inability of the electric chip to work normally.

[0058] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0059] It is not difficult for those skilled in the art to understand that the utility model includes any combination of the utility model content and the specific implementation method part of the above specification and the various parts shown in the drawings. Due to the limited space and to make the specification concise, the various schemes composed of these combinations are not described one by one. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

[0060] Although the embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and cannot be understood as limiting the present invention. Those skilled in the art can change, modify, replace and modify the above embodiments within the scope of the present invention without departing from the principles and purpose of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An optical module for solving power-on timing disorder, characterized in that: It includes an MCU module, a gold finger module, a voltage conversion module and a voltage sampling module. The gold finger module, the voltage conversion module and the voltage sampling module are all connected to the MCU module, and the voltage sampling module is connected to the voltage conversion module.

2. According to claim 1, an optical module for solving power-on timing disorder is characterized in that: The voltage sampling module includes an operational amplifier U11A, a first end of the operational amplifier U11A is connected to the MCU module, a second end of the operational amplifier U11A is respectively connected to one end of a resistor R40 and one end of a resistor R41, the other end of the resistor R40 is connected to the first end of the operational amplifier U11A, the other end of the resistor R41 is grounded, a third end of the operational amplifier U11A is respectively connected to one end of a resistor R38 and one end of a resistor R39, the other end of the resistor R39 is grounded, the other end of the resistor R38 is connected to a 3.3V power supply, and the third end of the operational amplifier U11A is connected to a voltage sampling point.

3. The optical module for solving power-on timing disorder according to claim 1, characterized in that: The MCU module includes a control chip U9, which is connected to the gold finger module via I2C, and the control chip U9 is connected to the electric chip module via I2C.

4. The optical module for solving power-on timing disorder according to claim 1, characterized in that: The voltage conversion module includes a linear regulator U10, an input end of the linear regulator U10 is connected to a 3.3V voltage, and an output end of the linear regulator U10 outputs a 1.8V voltage.

5. The optical module for solving power-on timing disorder according to claim 3, characterized in that: The electric chip module includes a receiving unit and a transmitting unit. The receiving unit includes a receiver U2, and the transmitting unit includes a transmitter U3.

6. The optical module for solving power-on timing disorder according to claim 1, characterized in that: It also includes a slow start module, which is respectively connected to the gold finger module, the electric chip module, the MCU module and the voltage conversion module. The slow start module includes a field effect transistor U7, and the slow start module filters out surges, ripples and impact currents of the power supply through the field effect transistor U7.

7. The optical module for solving power-on timing disorder according to claim 2, characterized in that: The model of the operational amplifier U11A is LM358B.

8. The optical module for solving power-on timing disorder according to claim 3, characterized in that: The model of the control chip U9 is GD32F310F6P6.

9. The optical module for solving power-on timing disorder according to claim 4, characterized in that: The model of the linear regulator U10 is ME6211C18M5G-N.

10. The optical module for solving power-on timing disorder according to claim 5, characterized in that: The model of the receiver U2 is MATA-37644B, and the model of the transmitter U3 is MALD-37645B.

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