Liquid level switch malfunction detection circuit
By designing a false action detection circuit for the level switch, the circuit status between the fuse and the level switch is detected by using the relay and terminal board circuit, the malfunction problem of the level switch caused by abnormal power supply or fuse blown is solved, and the effect of avoiding unnecessary interlocking parking and improving troubleshooting efficiency is achieved.
Patent Information
- Application Number
- CN202421120156.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-22
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2034-05-22
AI Technical Summary
The liquid level switch is malfunctioned due to abnormal power supply or fuse blown, which leads to interlocking and parking.
A liquid level switch malfunction detection circuit is designed to detect the circuit between the fuse and the liquid level switch through the relay circuit and the terminal board circuit, transmitting the disconnection or closing signal to the DCS program of the processor to avoid interlocking parking caused by malfunction.
It effectively prevents malfunctions of the liquid level switch due to abnormal power supply or fuse blown, avoids unnecessary interlocking parking, and improves the efficiency of troubleshooting.
Smart Images

Figure CN222825639U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of liquid level switch malfunction detection, in particular to a liquid level switch malfunction detection circuit. Background Art
[0002] The liquid level switch is a 4-wire instrument, 2 of which are used as power supply and 2 as signal. The liquid level switch is normally closed. When the liquid level is high, the liquid level switch signal is disconnected, and the DCS program detects the disconnected signal and then stops the system. However, since the power terminal is equipped with a fuse on the cabinet side, if the fuse burns out, the liquid level switch signal will be disconnected, causing the system to stop the system and causing the liquid level switch to malfunction. Utility Model Content
[0003] The utility model provides a liquid level switch malfunction detection circuit to prevent the liquid level switch from malfunctioning due to power supply abnormality or fuse blowing, thereby causing an interlocking stop.
[0004] The embodiment of this specification discloses a liquid level switch malfunction detection circuit, including a fuse, a liquid level switch, a DI terminal board and a processor with a built-in DCS program connected in sequence, and also includes:
[0005] a relay circuit connected between the fuse and the liquid level switch;
[0006] A terminal board circuit has one end connected to the relay circuit and the other end connected to the processor to transmit an opening signal or a closing signal of a normally open contact in the relay circuit to a DCS program of the processor.
[0007] In one embodiment disclosed in the present specification, the relay circuit includes a diode D1, a relay KA1, a resistor R1, a resistor R2 and a transistor Q1, one end of the resistor R1 is connected between the fuse and the liquid level switch, the other end of the resistor R1 is connected to one end of the resistor R2 and the base of the transistor Q1, the other end of the resistor R2 is connected to the emitter of the transistor Q1 and then grounded, the collector of the transistor Q1 is connected to the positive electrode of the diode D1 and one end of the coil of the relay KA1, the negative electrode of the diode D1 is connected to the other end of the coil of the relay KA1 and then connected to the external voltage terminal VCC, and the normally open contact of the relay KA1 is connected to the terminal board circuit.
[0008] In one embodiment disclosed in the present specification, the terminal board circuit includes a relay KA22, a capacitor C and a resistor R3, the coil of the relay KA22 and the normally open contact of the relay KA1 are connected in series to an external 24V power supply to form a loop, and the normally open contact of the relay KA22 is connected to the processor via the resistor R3 and the capacitor C.
[0009] In one embodiment disclosed in the present specification, the circuit of the processor includes a diode D2, a resistor R4, a 24VDC power supply, an optocoupler U1, a resistor R5 and an input cache, the positive electrode of the diode D2 is connected to the 24VDC power supply, the negative electrode of the diode D2 is connected to one end of the normally open contact of the relay KA22, the other end of the normally open contact of the relay KA22 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the grounded capacitor C, the grounded resistor R4 and the input end of the optocoupler U1, the output end of the optocoupler U1 is connected to one end of the resistor R5 and the input cache, and the other end of the resistor R5 is connected to the external voltage terminal VCC.
[0010] In one embodiment disclosed in this specification, the processor is a MUC, DSP, PLC, ASIC or FPGA chip.
[0011] The embodiments of this specification can at least achieve the following beneficial effects:
[0012] The circuit between the fuse and the liquid level switch is detected through the relay circuit and the terminal board circuit. When the normally open contact is closed, it means that the circuit between the fuse and the liquid level switch is normal, and the corresponding closing signal is transmitted to the processor with a built-in DCS program, which considers that the power supply is normal and the fuse is not blown; when the normally open contact is disconnected, it means that the circuit between the fuse and the liquid level switch has been disconnected, that is, the fuse is blown or the power supply is abnormal, and the corresponding disconnection signal is transmitted to the DCS program for a fault alarm. The signal after the liquid level switch is disconnected due to the fuse blowing or the power supply abnormality is not transmitted to the DCS program, which causes the DCS program to cause an interlocking stop after receiving the liquid level switch disconnection signal, that is, the DCS program does not trigger the interlocking after receiving the two disconnection signals, and can quickly determine the fault alarm caused by the fuse blowing or the power supply abnormality, thereby improving the efficiency of troubleshooting. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0014] Figure 1 The figure is a schematic diagram of the principle of the liquid level switch malfunction detection circuit involved in some embodiments of the present utility model.
[0015] Figure 2 It is a schematic diagram of the relay circuit, terminal board circuit and processor circuit involved in some embodiments of the utility model. DETAILED DESCRIPTION
[0016] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the spirit or scope of the embodiments of the present invention. Therefore, the drawings and descriptions are considered to be exemplary and non-restrictive in nature.
[0017] In the description of the embodiments of the present invention, it should be understood that the terms "length", "vertical", "horizontal", "top", "bottom", etc. indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present invention.
[0018] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present utility model, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0019] In the embodiments of the present utility model, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or a communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present utility model can be understood according to specific circumstances.
[0020] In the embodiments of the present utility model, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but being in contact through another feature between them. Moreover, the first feature being "above", "above" and "above" the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature includes the first feature being directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0021] The disclosure below provides many different embodiments or examples for realizing different structures of the embodiments of the present utility model. In order to simplify the disclosure of the embodiments of the present utility model, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the embodiments of the present utility model. In addition, the embodiments of the present utility model can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.
[0022] The embodiments of the present utility model are described in detail below with reference to the accompanying drawings.
[0023] like Figure 1 As shown, the embodiment of this specification discloses a liquid level switch malfunction detection circuit, including a fuse F1, a liquid level switch SW1, a DI terminal board and a processor with a built-in DCS program connected in sequence, and also includes:
[0024] A relay circuit connected between the fuse F1 and the liquid level switch SW1;
[0025] A terminal board circuit has one end connected to the relay circuit and the other end connected to the processor to transmit an opening signal or a closing signal of a normally open contact in the relay circuit to a DCS program of the processor.
[0026] In some embodiments, Figure 2 As shown, the relay circuit includes a diode D1, a relay KA1, a resistor R1, a resistor R2 and a transistor Q1, one end of the resistor R1 is connected between the fuse F1 and the liquid level switch SW1, the other end of the resistor R1 is connected to one end of the resistor R2 and the base of the transistor Q1, the other end of the resistor R2 is connected to the emitter of the transistor Q1 and then grounded, the collector of the transistor Q1 is connected to the positive electrode of the diode D1 and one end of the coil of the relay KA1, the negative electrode of the diode D1 is connected to the other end of the coil of the relay KA1 and then connected to the external voltage terminal VCC, and the normally open contact of the relay KA1 is connected to the terminal board circuit.
[0027] In some embodiments, Figure 2 As shown, the terminal board circuit includes a relay KA22, a capacitor C and a resistor R3. The coil of the relay KA22 and the normally open contact of the relay KA1 are connected in series to an external 24V power supply to form a loop. The normally open contact of the relay KA22 is connected to the processor through the resistor R3 and the capacitor C.
[0028] In some embodiments, Figure 2As shown, the circuit of the processor includes a diode D2, a resistor R4, a 24VDC power supply, an optocoupler U1, a resistor R5 and an input cache, the positive electrode of the diode D2 is connected to the 24VDC power supply, the negative electrode of the diode D2 is connected to one end of the normally open contact of the relay KA22, the other end of the normally open contact of the relay KA22 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the grounded capacitor C, the grounded resistor R4 and the input end of the optocoupler U1, the output end of the optocoupler U1 is connected to one end of the resistor R5 and the input cache, and the other end of the resistor R5 is connected to the external voltage terminal VCC.
[0029] In some embodiments, Figure 2 As shown, the processor is a MUC, DSP, PLC, ASIC or FPGA chip.
[0030] like Figure 1 As shown, the circuit between the fuse F1 and the liquid level switch SW1 is detected through the relay circuit and the terminal board circuit. When the normally open contact is closed, it means that the circuit between the fuse F1 and the liquid level switch SW1 is normal, and the corresponding closing signal is transmitted to the processor with the built-in DCS program, and it is considered that the fuse is not blown or the power supply is normal; when the normally open contact is disconnected, it means that the circuit between the fuse F1 and the liquid level switch SW1 has been disconnected, that is, the fuse F1 is blown or the power supply is abnormal, and the corresponding disconnection signal is transmitted to the DCS program to issue a fault alarm, and the signal after the liquid level switch SW1 is disconnected due to the power supply abnormality is not transmitted to the DCS program, which causes the DCS program to cause an interlocking stop after receiving the liquid level switch SW1 disconnection signal, that is, the DCS program does not trigger the interlocking after receiving the two disconnection signals, so that the fault alarm caused by the power supply abnormality can be quickly determined, thereby improving the efficiency of troubleshooting.
[0031] like Figure 2 As shown, when the power supply is normal, the base of transistor Q1 is at a high level, transistor Q1 is turned on, the coil of relay KA1 is energized, the normally open contact of relay KA1 is closed, the coil of relay KA2 is energized, the normally open contact of relay KA2 is closed, and the closing signal is transmitted to the input cache (DCS program) through the optocoupler U1, that is, the DCS program receives the closing signal and considers that the power supply is normal and the fuse F1 is not blown; when the fuse F1 is blown or the power supply is abnormal, the base of transistor Q1 is at a low level, transistor Q1 is not turned on, the coil of relay KA1 loses power, the normally open contact of relay KA1 is disconnected, the coil of relay KA2 loses power, the normally open contact of relay KA2 is disconnected, and the disconnection signal is transmitted to the input cache through the optocoupler U1, and at the same time, the disconnection signal of the liquid level switch SW1 is transmitted to the DCS program. After receiving the two disconnection signals, the DCS program does not trigger the interlock.
[0032] The above embodiments describe multiple specific implementations of the present invention, but those skilled in the art should understand that various changes or modifications can be made to these implementations without departing from the principles and essence of the present invention, but these changes and modifications are all within the scope of protection of the present invention.
Claims
1. A liquid level switch malfunction detection circuit, comprising a fuse, a liquid level switch, a DI terminal board and a processor with a built-in DCS program connected in sequence, characterized in that: Also includes: a relay circuit connected between the fuse and the liquid level switch; A terminal board circuit has one end connected to the relay circuit and the other end connected to the processor to transmit an opening signal or a closing signal of a normally open contact in the relay circuit to a DCS program of the processor.
2. The liquid level switch malfunction detection circuit according to claim 1, characterized in that: The relay circuit includes a diode D1, a relay KA1, a resistor R1, a resistor R2 and a transistor Q1, one end of the resistor R1 is connected between the fuse and the liquid level switch, the other end of the resistor R1 is connected to one end of the resistor R2 and the base of the transistor Q1, the other end of the resistor R2 is connected to the emitter of the transistor Q1 and then grounded, the collector of the transistor Q1 is connected to the positive electrode of the diode D1 and one end of the coil of the relay KA1, the negative electrode of the diode D1 is connected to the other end of the coil of the relay KA1 and then connected to the external voltage terminal VCC, and the normally open contact of the relay KA1 is connected to the terminal board circuit.
3. The liquid level switch malfunction detection circuit according to claim 2, characterized in that: The terminal board circuit includes a relay KA22, a capacitor C and a resistor R3. The coil of the relay KA22 and the normally open contact of the relay KA1 are connected to an external 24V power supply in series to form a loop. The normally open contact of the relay KA22 is connected to the processor through the resistor R3 and the capacitor C.
4. The liquid level switch malfunction detection circuit according to claim 3, characterized in that: The circuit of the processor includes a diode D2, a resistor R4, a 24VDC power supply, an optocoupler U1, a resistor R5 and an input cache, the positive electrode of the diode D2 is connected to the 24VDC power supply, the negative electrode of the diode D2 is connected to one end of the normally open contact of the relay KA22, the other end of the normally open contact of the relay KA22 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the grounded capacitor C, the grounded resistor R4 and the input end of the optocoupler U1, the output end of the optocoupler U1 is connected to one end of the resistor R5 and the input cache, and the other end of the resistor R5 is connected to the external voltage terminal VCC.
5. The liquid level switch malfunction detection circuit according to claim 1, characterized in that: The processor is a MUC, DSP, PLC, ASIC or FPGA chip.