Power failure protection circuit of solid state disk, storage device and computing device

Abstract

The utility model discloses a power failure protection circuit of a solid state disk, storage equipment and computing equipment. The power failure protection circuit of the solid state disk comprises a voltage monitoring circuit, a capacitor and a buck converter, a first end and a second end of the buck converter are respectively connected with the capacitor and a power pin of the solid state disk; the first end of the buck converter is connected with an external power supply; the capacitor is used for supplying power to the solid-state disk when the external power supply is powered down; the first end and the second end of the voltage monitoring circuit are respectively used for connecting an external power supply and an interrupt pin of the solid state disk; the voltage monitoring circuit generates an interrupt signal to the interrupt pin when the external power supply is powered down. According to the technical scheme, when the external power supply of the SSD is abnormally powered down, power can be supplied to the SSD in time, and it is guaranteed that data in the SSD is not lost.

Description

Technical Field

[0001] The present application relates to the field of memory technology, and in particular to a power-off protection circuit of a solid-state hard disk, a storage device, and a computing device. Background Art

[0002] A solid state drive (SSD) is a hard disk made of a solid-state electronic storage chip array, including a control unit and a storage unit. The storage unit includes a FLASH chip or a dynamic random access memory (DRAM) chip.

[0003] When the SSD is working, an external power supply is required to power the SSD, for example, the external power supply is generally DC 12 V or 24 V. However, in some cases, the external power supply may be abnormally powered off, resulting in abnormal loss of data in the SSD.

[0004] Therefore, it is necessary to provide a technical solution that can continue to supply power to the SSD when the external power supply fails abnormally, so as to ensure that the data in the SSD is not lost. Utility Model Content

[0005] In view of this, the present application provides a power-off protection circuit, a storage device and a computing device for a fixed hard disk, which can promptly supply power to the SSD when the external power supply of the SSD abnormally loses power, thereby ensuring that data in the SSD is not lost.

[0006] The present application provides a power-off protection circuit for a solid-state hard disk, comprising: a voltage monitoring circuit, a capacitor, and a buck converter;

[0007] The first end and the second end of the buck converter are connected to the capacitor and the power pin of the solid state drive respectively; the first end of the buck converter is also used to connect the external power supply; the capacitor is used to supply power to the solid state drive when the external power supply is powered off;

[0008] The first end and the second end of the voltage monitoring circuit are respectively used to connect an external power supply and an interrupt pin of the solid state drive; the voltage monitoring circuit generates an interrupt signal to the interrupt pin when the external power supply is powered off.

[0009] In a possible implementation, the protection circuit includes a plurality of capacitors;

[0010] A plurality of the capacitors are connected in parallel between the first end of the buck converter and the ground.

[0011] In a possible implementation, the voltage monitoring circuit includes a voltage divider circuit and a voltage monitoring chip;

[0012] The first end and the second end of the voltage divider circuit are respectively connected to the external power supply and the voltage input pin of the voltage monitoring chip;

[0013] The reset pin of the voltage monitoring chip is connected to the interrupt pin of the solid state drive, and when the voltage of the voltage input pin is lower than the voltage threshold, the reset pin outputs an interrupt signal to the interrupt pin of the solid state drive.

[0014] In a possible implementation, a reset pin of the voltage monitoring chip is connected to an internal power supply via a pull-up resistor, and when the voltage of the voltage input pin is lower than a voltage threshold, the reset pin outputs a low level.

[0015] A possible implementation manner further includes: a diode;

[0016] The anode and cathode of the diode are respectively used to connect the external power supply and the first end of the capacitor, and the second end of the capacitor is grounded.

[0017] In a possible implementation manner, the capacitor is a supercapacitor.

[0018] In a possible implementation manner, the voltage divider circuit includes a first resistor and a second resistor;

[0019] The first end and the second end of the first resistor are respectively used to connect the external power supply and the first end of the second resistor, the second end of the second resistor is grounded, and the second end of the first resistor is connected to the voltage input pin of the voltage monitoring chip.

[0020] In a possible implementation, the buck converter is used to step down the voltage at the first end to 3.3V.

[0021] The present application also provides a storage device, including the above-introduced solid state hard disk power-off protection circuit and the solid state hard disk.

[0022] The present application also provides a computing device, comprising the storage device introduced above.

[0023] It can be seen that this application has the following beneficial effects:

[0024] The power-off protection circuit in the present application detects whether the external power supply is powered off in real time through a voltage monitoring circuit. When the external power supply is detected to be powered off, the SSD is notified in time to enable the SSD to complete the data transfer. In order to ensure that the SSD can work normally when the data transfer is completed, when the external power supply is powered off, the capacitor and the buck converter are used to power the SSD when the external power supply is powered off, thereby ensuring that the data in the volatile cache in the SSD can be transferred to the non-volatile memory in time, thereby ensuring the security of the data. In addition, the power-off protection circuit provided in the embodiment of the present application is constructed using multiple devices, not an integrated chip, and has a lower cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of a solid state hard disk power-off protection circuit and a storage device provided in an embodiment of the present application;

[0026] Figure 2 A schematic diagram of a voltage monitoring circuit provided in an embodiment of the present application;

[0027] Figure 3 A schematic diagram of a capacitor provided in an embodiment of the present application;

[0028] Figure 4 A schematic diagram of a buck conversion circuit provided in an embodiment of the present application;

[0029] Figure 5 A schematic diagram of a storage device provided in an embodiment of the present application;

[0030] Figure 6 A schematic diagram of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the embodiments of the present application are further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0032] See also Figure 1 , which is a schematic diagram of a power-off protection circuit of a solid-state hard disk provided in an embodiment of the present application.

[0033] The power-off protection circuit of the solid-state hard disk provided in the embodiment of the present application includes: a voltage monitoring circuit 100 , a capacitor 200 and a buck converter 300 .

[0034] A specific implementation form of a power-off protection circuit for a solid state hard disk provided by an embodiment of the present application is described below in conjunction with the accompanying drawings.

[0035] The first end and the second end of the voltage monitoring circuit 100 are respectively used to connect the output node A of the external power supply and the interrupt pin node D of the solid state drive. The first end and the second end of the buck converter 300 are respectively connected to the capacitor 200 and the power pin node C of the solid state drive SSD; the first end of the buck converter 300 is also used to connect the output node A of the external power supply.

[0036] The embodiments of the present application do not specifically limit the application scenarios of the power-off protection circuit of the solid-state hard disk, such as the fields of abnormal power-off protection of servers.

[0037] The embodiment of the present application does not limit the specific implementation method of the voltage monitoring circuit 100. For example, a reset monitor chip may be used to implement the voltage monitoring function, or a voltage comparator may be used to implement the voltage monitoring function.

[0038] The embodiment of the present application does not limit the specific implementation of the capacitor 200. For example, multiple small capacitors can be connected in parallel to form the capacitor 200. When the external power supply fails abnormally, the capacitor 200 supplies power to the SSD to meet the SSD's demand for power supply voltage. The capacitor 200 can also be implemented using a super capacitor.

[0039] The embodiment of the present application does not limit the specific implementation of the buck converter 300. For example, different types of buck converter chips can be used to implement the buck conversion function.

[0040] When the power-off protection circuit works normally, the external power supply charges the capacitor 200. When the external power supply is powered off, the voltage monitoring circuit 100 will detect the power off of the external power supply and notify the SSD by changing the interrupt output signal from a high level to a low level. After the SSD detects the change of the interrupt signal, it immediately saves the buffered data in the DDR (Double Data Rate) to the NAND flash. At this time, the capacitor 200 will act as a power supply to provide the SSD with a working voltage through the buck converter 300. The embodiment of the present application does not specifically limit the power supply time of the capacitor 200. The capacitance of the capacitor 200 can be set according to the actual application scenario. The power supply time of the capacitor 200 needs to meet the SSD to complete the data copy. For example, in a possible implementation method, the power supply time of the capacitor 200 can be maintained for 10ms to 40ms. For example, the capacitance of the capacitor can be 100uF, or it can be greater than 100uF, or it can be less than 100uF.

[0041] The power-off protection circuit in this embodiment detects whether the external power supply is powered off in real time through the voltage monitoring circuit. When the external power supply is detected to be powered off, the SSD is notified in time to enable the SSD to complete the data transfer. In order to ensure that the SSD can work normally when the data transfer is completed, when the external power supply is powered off, the capacitor and the step-down converter are used to supply energy to the SSD when the external power supply is powered off, thereby ensuring that the data in the volatile cache of the SSD can be transferred to the non-volatile memory in time, thereby ensuring the security of the data. In addition, the power-off protection circuit provided in the embodiment of the present application is constructed using multiple devices, not an integrated chip, so that the device selection is more flexible and the cost is lower.

[0042] See also Figure 2 , which is a schematic diagram of a voltage monitoring circuit in a power-off protection circuit of a solid-state hard disk provided in an embodiment of the present application.

[0043] The voltage monitoring circuit provided in the embodiment of the present application includes: a voltage dividing circuit 101 and a voltage monitoring chip 102 .

[0044] The first and second ends of the voltage divider circuit 101 are respectively connected to the output node A of the external power supply and the voltage input pin VCC of the voltage monitoring chip 102. The interrupt output pin RST of the voltage monitoring chip 102 is connected to the interrupt input pin node D of the solid state drive SSD.

[0045] The voltage dividing circuit 101 includes a first voltage dividing resistor R1 and a second voltage dividing resistor R2. Figure 2 The example in the present application is only for simplification. The physical form of the resistor is not specifically limited. For example, it can be a chip resistor or a plug-in resistor.

[0046] The first end and the second end of R1 are used to connect the output node A of the external power supply and the first end of R2 respectively. The second end of R2 is grounded, and the second end of R1 is connected to the voltage input pin VCC of the voltage monitoring chip 102. R1 and R2 can be set to proportional resistance values ​​to achieve the setting of the external power input voltage drop threshold. The following example illustrates that different types of voltage monitoring chips 102 correspond to different monitoring voltages. Assuming that the voltage of the external power supply is 12V, for example, when the monitoring voltage of a type of voltage monitoring chip 102 is 2.9V, the drop threshold for changing the output state of the voltage monitoring chip 102 is set to 11V, and the result is:

[0047]

[0048] Thus we obtain: R1 / R2=81 / 29.

[0049] Similarly, when the drop threshold is set to 10V, we get:

[0050]

[0051] Thus we obtain: R1 / R2=71 / 29.

[0052] The voltage monitoring chip 102 includes a voltage input pin VCC, a ground pin GND, and an interrupt output pin RST. It should be understood that the present application example does not specifically limit the model and pin number of the voltage monitoring chip 102.

[0053] VCC is connected to the second end of R1, GND is grounded, and RST is connected to the internal power supply VDD through the pull-up resistor R3 and is also connected to the interrupt input pin D of the SSD. When the external power supply is disconnected, the potential of the VCC pin drops below the monitoring voltage, causing the RST pin potential output to change from a high level to a low level, thereby informing the SSD of the power-off state through an interrupt signal, realizing the voltage monitoring function.

[0054] The voltage monitoring circuit in this embodiment timely exchanges interrupt information with the SSD through the voltage monitoring chip, thereby ensuring that the SSD can save the data in the volatile cache in time when an abnormal power failure occurs, thereby improving the security of the data.

[0055] See also Figure 3 , which is a schematic diagram of a capacitor in a power-off protection circuit of a solid-state hard disk provided in an embodiment of the present application.

[0056] The capacitors provided in the embodiment of the present application are described as including three capacitors connected in parallel. It should be understood that since different SSDs have different times required to transfer data, the number of capacitors provided in the embodiment of the present application can be greater than or equal to 1, and the total capacitance of the capacitors is not limited.

[0057] The capacitors include: a first capacitor C1, a second capacitor C2, and a third capacitor C3. It should be understood that the examples of the present application do not specifically limit the capacitance values ​​of the capacitors. Figure 3 The figure is only simplified schematically, and the example of the present application does not specifically limit the physical form of the capacitor, which can be a chip capacitor or a monolithic capacitor, etc.

[0058] The first end of the first capacitor C1, the first end of the second capacitor C2, and the first end of the third capacitor C3 are all connected to the A node of the external power supply and the input node B of the buck converter circuit at the same time, and the second end of the first capacitor C1, the second end of the second capacitor C2, and the second end of the third capacitor C3 are all grounded. When the external power supply is connected normally, it is equivalent to the external power supply charging C1, C2, and C3. When the external power supply is disconnected, C1, C2, and C3 are discharged and provide the working voltage for the SSD through the buck converter.

[0059] The capacitor in this embodiment can play the role of power supply noise filtering when the external power supply is normal, ensuring that the subsequent buck converter receives a cleaner and more stable power supply. When the external power supply is off, the capacitor can act as a power supply to power the SSD to store data, thereby improving the security of the data.

[0060] In a possible implementation, the protection circuit provided in the embodiment of the present application further includes: a diode D1. It should be understood that the embodiment of the present application does not limit the conduction voltage drop value, material, etc. of the diode D1.

[0061] The diode D1 is located between the external power supply and the capacitor. As shown in the figure, the anode of the diode D1 is connected to the A node of the external power supply, and the cathode of the diode D1 is connected to the first end of C1, the first end of C2, and the first end of C3. When the external power supply fails abnormally, D1 can prevent the first end of C1 from causing current backflow and damaging the power supply due to the potential being higher than the external power supply. Furthermore, when the external power supply fails abnormally, D1 enables the capacitor to only supply power to the SSD but not to other devices, thereby providing a longer power supply time.

[0062] In this embodiment, the diode prevents the current from flowing back and damaging the external power supply when the power is abnormally off, thereby improving the safety of the protection circuit. The diode also ensures that the capacitor only supplies power to the solid-state hard disk, reducing the consumption rate of the power stored in the capacitor, thereby improving the power supply efficiency of the protection circuit.

[0063] See also Figure 4 , which is a schematic diagram of a buck converter provided in an embodiment of the present application.

[0064] The buck converter provided in the embodiment of the present application includes: a buck converter chip 301. It should be understood that the example of the present application does not specifically limit the output voltage of the buck converter, and the specific output voltage is determined by the SSD connected to the buck converter, for example, the buck converter is used to reduce the voltage of the first end to 3.3V.

[0065] The buck conversion chip 301 includes: an enable pin EN, an input pin VCC, a ground pin GND, an upper tube gate driver pin BOOT, a switch node pin SW, and a feedback port pin FB.

[0066] EN and VCC of the buck converter chip 301 are connected to the output terminal A node of the external power supply. GND is grounded, and BOOT is connected to the internal power supply VDD after being connected in series with capacitor C4. SW and FB are simultaneously connected to the internal power supply VDD. SW is also connected to the voltage input pin D node of SDD as a voltage output. When EN and VIN are high, the chip starts to work. BOOT provides the upper tube gate drive voltage of the switching device through C4 to ensure the accuracy and efficiency of the switching action. SW is usually connected to the power switching device (usually MOSFET) inside the chip to adjust the input high voltage to generate a low voltage for the normal operation of the SSD. FB is connected to SW to detect the actual output voltage and compare it with the reference voltage to adjust the duty cycle and duty cycle of the switching device, thereby stabilizing the output voltage for the normal operation of the SSD.

[0067] The buck converter used in this embodiment has higher efficiency than the traditional linear regulator. At the same time, the buck converter ensures the stable working voltage of the solid state drive SSD, which is an indispensable part of the solid state drive SSD data storage when the power is off abnormally, thereby ensuring the security of the data.

[0068] Based on the above embodiment, a solid state hard disk power-off protection circuit is provided. The present application embodiment also provides a storage device. Figure 5 Provide a detailed introduction.

[0069] The storage device 500 provided in the embodiment of the present application includes: the solid state hard disk power-off protection circuit 501 and a solid state hard disk 502 .

[0070] When the storage device 500 is used, due to the existence of the solid state drive power-off protection circuit 501 , the stability and security of the operation of the solid state drive 502 are greatly improved, thereby greatly improving the security of the storage device 500 .

[0071] Based on the above embodiments, a solid state hard disk power-off protection circuit and a storage device are provided. The present application also provides a computing device. Figure 6 Provide a detailed introduction.

[0072] The computing device 600 provided in the embodiment of the present application includes: a storage device 601 and a controller 602. The controller 602 can read data from the storage device 601, and can also write data to the storage device 601.

[0073] Since the storage device 601 in the computing device 600 includes a power-off protection circuit, the security of the data in the storage device 601 can be guaranteed when the external power source is turned off.

[0074] The embodiment of the present application does not specifically limit the type of the computing device 600 , and it may be, for example, a server, or any device including an SSD, such as a computer.

[0075] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other. For the system or device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0076] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power-off protection circuit for a solid state hard disk, characterized in that: include: voltage monitoring circuits, capacitors, and buck converters; The first end and the second end of the buck converter are connected to the capacitor and the power pin of the solid state drive respectively; the first end of the buck converter is also used to connect to an external power supply; the capacitor is used to supply power to the solid state drive when the external power supply is powered off; The first end and the second end of the voltage monitoring circuit are respectively used to connect an external power supply and an interrupt pin of the solid state drive; the voltage monitoring circuit generates an interrupt signal to the interrupt pin when the external power supply is powered off.

2. The protection circuit according to claim 1, characterized in that: The protection circuit includes a plurality of capacitors; A plurality of the capacitors are connected in parallel between the first end of the buck converter and the ground.

3. The protection circuit according to claim 1, characterized in that: The voltage monitoring circuit includes a voltage dividing circuit and a voltage monitoring chip; The first end and the second end of the voltage divider circuit are respectively connected to the external power supply and the voltage input pin of the voltage monitoring chip; The reset pin of the voltage monitoring chip is connected to the interrupt pin of the solid state drive, and when the voltage of the voltage input pin is lower than the voltage threshold, the reset pin outputs an interrupt signal to the interrupt pin of the solid state drive.

4. The protection circuit according to claim 3, characterized in that: The reset pin of the voltage monitoring chip is connected to the internal power supply through a pull-up resistor, and the reset pin outputs a low level when the voltage of the voltage input pin is lower than a voltage threshold.

5. The protection circuit according to any one of claims 1 to 4, characterized in that: Also includes: diode; The anode and cathode of the diode are respectively used to connect the external power supply and the first end of the capacitor, and the second end of the capacitor is grounded.

6. The protection circuit according to any one of claims 1 to 4, characterized in that: The capacitor is a super capacitor.

7. The protection circuit according to claim 3 or 4, characterized in that: The voltage divider circuit includes a first resistor and a second resistor; The first end and the second end of the first resistor are respectively used to connect the external power supply and the first end of the second resistor, the second end of the second resistor is grounded, and the second end of the first resistor is connected to the voltage input pin of the voltage monitoring chip.

8. The protection circuit according to any one of claims 1 to 4, characterized in that: The buck converter is used to step down the voltage of the first end to 3.3V.

9. A storage device, characterized in that: A power-off protection circuit for a solid state hard disk and a solid state hard disk comprising the power-off protection circuit for a solid state hard disk as described in any one of claims 1 to 8.

10. A computing device, characterized in that Comprising the storage device as claimed in claim 9.

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