Testing device for memory chip

Abstract

The utility model discloses a testing device for a memory chip. The testing device comprises a shell, at least one jig assembly and at least one piece of testing equipment. Wherein each jig assembly comprises at least two jig modules, and the at least two jig modules are arranged in the shell in a step shape; each jig module is provided with a plurality of test interfaces, and each test interface is configured to be coupled with a memory chip access device; wherein the memory chip access device is configured to accommodate at least one memory chip to be tested; the at least one test device is arranged outside the shell, and each test device is configured to be coupled with the plurality of test interfaces so as to test a to-be-tested storage chip in the storage chip access device coupled with the test interfaces. Through the test device, the test equipment arranged outside the shell can be used for testing the to-be-tested memory chip which is arranged inside the shell and is coupled with the memory chip access device.

Description

Technical Field

[0001] This application relates to the technical field of testing, in particular to a testing device for memory chips. Background Art

[0002] Before the memory chips leave the factory or before the users use the memory chips, read-write tests can be performed on the memory chips to determine the reliability of the memory chips. Usually, the memory chips are placed in a test chamber for reliability tests. However, during the reliability test, the staff needs to fix the memory chips one by one on the inner cavity wall of the test chamber. Since the space inside the test chamber is limited, it is inconvenient to install the memory chips, resulting in a low loading rate, reduced test efficiency, and increased test costs.

[0003] Moreover, the device for testing the memory chips is integrally formed with the test chamber, resulting in a large overall test structure volume, which is not conducive to placement. Summary of the Utility Model

[0004] This application provides a testing device for memory chips, which can use a testing device arranged outside the housing to test a to-be-tested memory chip coupled to a memory chip access device arranged inside the housing. Moreover, the memory chip access device is arranged on a jig module in a stepped shape, which can improve the utilization rate of the space inside the housing.

[0005] To solve the above technical problems, on the one hand, this application provides a testing device for memory chips, including: a housing; at least one jig assembly, each jig assembly including at least two jig modules, and the at least two jig modules are arranged in a stepped shape inside the housing; a plurality of test interfaces are arranged on each jig module, and each test interface is configured to be coupled to a memory chip access device; wherein, the memory chip access device is configured to accommodate at least one to-be-tested memory chip; at least one testing device, and the at least one testing device is arranged outside the housing, and each testing device is configured to be coupled to a plurality of test interfaces to test the to-be-tested memory chips in the memory chip access device coupled to the test interfaces.

[0006] In some embodiments, each testing device is coupled to a plurality of test interfaces through an interface expander.

[0007] In some embodiments, the plurality of test interfaces are arranged at intervals on the jig module, and the distance between adjacent test interfaces is at least greater than the height or width of the memory chip access device.

[0008] In some embodiments, each fixture module includes a first bearing surface and a second bearing surface, and a plurality of test interfaces are disposed on the first bearing surface; wherein, the second bearing surface is horizontally disposed, and the first bearing surface is vertically disposed; wherein, the distance from the lowermost test interface on the first bearing surface to the second bearing surface of the adjacent fixture module is equal to half of the height or half of the width of the storage chip access device.

[0009] In some embodiments, the first bearing surface faces the door frame side of the housing.

[0010] In some embodiments, the test device further includes: a storage rack, on which a plurality of storage components are stacked, and each storage component is configured to accommodate a test device.

[0011] In some embodiments, the bottom of the storage rack is provided with pulleys.

[0012] In some embodiments, the storage component is provided with heat dissipation through holes.

[0013] In some embodiments, the test device is accommodated in the storage component in the form of a bare board.

[0014] In some embodiments, the housing includes at least two accommodation spaces, and a corresponding fixture component is respectively disposed in each accommodation space; a temperature adjustment module is correspondingly disposed for each accommodation space, and the temperature adjustment module is configured to control the test environment temperature in the accommodation space.

[0015] The test device for a storage chip provided in some embodiments of the present application includes a housing, at least one fixture component, and at least one test device. Wherein, each fixture component includes at least two fixture modules, and the at least two fixture modules are arranged in a stepped manner in the housing; a plurality of test interfaces are disposed on each fixture module, and each test interface is configured to be coupled to a storage chip access device; wherein, the storage chip access device is configured to accommodate at least one storage chip to be tested; at least one test device is disposed outside the housing, and each test device is configured to be coupled to a plurality of test interfaces to test the storage chip to be tested in the storage chip access device coupled to the test interface. Through the above test device, the storage chip to be tested coupled to the storage chip access device disposed inside the housing can be tested by using the test device disposed outside the housing. Moreover, the storage chip access device is disposed on the stepped fixture module, which can improve the utilization rate of the internal space of the housing. Description of the Drawings

[0016] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings. Among them:

[0017] Figure 1 is a schematic structural diagram of a test device for a storage chip in some embodiments of the present application;

[0018] Figure 2 is a schematic structural diagram of a test device for a storage chip in some embodiments of the present application;

[0019] Figure 3 is a schematic structural diagram of a fixture assembly in some embodiments of the present application;

[0020] Figure 4 is a schematic structural diagram of a fixture assembly in some embodiments of the present application;

[0021] Figure 5 is a schematic structural diagram of a test device for a storage chip in some embodiments of the present application;

[0022] Figure 6 is a schematic structural diagram of a storage rack in some embodiments of the present application;

[0023] Figure 7 is a schematic structural diagram of the setting manner of a storage component in some embodiments of the present application;

[0024] Figure 8 is a schematic structural diagram of the setting manner of a storage component in some embodiments of the present application;

[0025] Figure 9 is a schematic structural diagram of a housing in some embodiments of the present application. Specific Embodiments

[0026] The following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. It can be understood that the specific embodiments described herein are only used to explain the present application, rather than limiting the present application. Additionally, it should be noted that for the sake of description, only the parts related to the present application are shown in the drawings, not all the structures. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0027] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs; the terms used herein are for the purpose of describing specific embodiments only and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above description of the drawings are intended to cover non-exclusive inclusion.

[0028] In the description of the embodiments of this application, technical terms such as "first" and "second" are only used to distinguish different objects and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity, specific order or primary-secondary relationship of the indicated technical features. In the description of the embodiments of this application, the meaning of "a plurality" is more than two, unless otherwise specifically defined.

[0029] Reference to "embodiment" herein means that a particular feature, structure or characteristic described in connection with the embodiment can be included in at least one embodiment of this application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0030] In the description of the embodiments of this application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0031] In the description of the embodiments of this application, the term "a plurality" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0032] In the description of the embodiments of this application, the orientation or positional relationship indicated by technical terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the embodiments of this application and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of this application.

[0033] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installation", "connection", "connection", "fixation", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral body; it can also be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to specific circumstances.

[0034] See Figure 1 , Figure 1 FIG. is a schematic structural diagram of a test device for a storage chip in some embodiments of the present application. The test device 10 includes a housing 101, at least one fixture assembly 102, and at least one test device 103. Among them, each fixture assembly 102 includes at least two fixture modules 1021, and at least two fixture modules 1021 are arranged in a stepped manner within the housing 101; a plurality of test interfaces 201 are provided on each fixture module 1021, and each test interface 201 is configured to be coupled to a storage chip access device 202 (due to angle reasons, the specific structural diagram is not shown); among them, the storage chip access device 202 is configured to accommodate at least one storage chip to be tested (not shown in the figure); at least one test device 103 is arranged outside the housing 101, and each test device 103 is configured to be coupled to a plurality of test interfaces 201 to test the storage chips to be tested in the storage chip access device 202 coupled to the test interfaces 201.

[0035] In some embodiments, as Figure 1 shown, a plurality of through holes are provided on the housing 101, and the test device 103 can be coupled to a plurality of test interfaces 201 on the fixture module 1021 through the through holes. In practical applications, before the connection lines on the test device 103 are coupled to the test interfaces 201, the connection lines of the plurality of test devices 103 can be routed first and then coupled to the test interfaces 201, which is convenient for specifically testing the storage chips to be tested on different storage chip access devices 202. In addition, in order to ensure the airtightness of the space inside the housing 101 and avoid the influence of external substances such as water vapor on the performance of the devices inside the housing 101, after the connection lines pass through the through holes, the through holes can be blocked with sealing materials such as soil, glue, and sealant.

[0036] In some embodiments, the size of the fixture assembly 102 is correspondingly set with the internal space of the housing 101, so that the fixture assembly 102 occupies most of the internal space of the housing 101, increasing the number of fixture modules 1021 and the storage chip access devices 202 thereon, so as to improve the utilization rate of the space inside the housing 101.

[0037] In some embodiments, a plurality of test interfaces 201 provided on each fixture module 1021 are correspondingly arranged with the memory chip access device 202, and the plurality of test interfaces 201 of each fixture module 1021 are the same or different. Among them, the test interface 201 can be a USB (Universal Serial Bus) interface, an HDMI (High Definition Multimedia Interface) interface, an RS-232 (Recommended Standard 232) interface or others, which are not limited here.

[0038] In some embodiments, several test interfaces 201 are arranged on the same bearing surface or different bearing surfaces of the fixture module 1021. For example, at least one test interface 201 is arranged on one bearing surface of the fixture module 1021, and no test interface 201 is arranged on the other bearing surface.

[0039] In an application scenario, as Figure 1 shown, each fixture module 1021 includes a first bearing surface and a second bearing surface, and several test interfaces 201 are arranged on the first bearing surface. Among them, the second bearing surface is horizontally arranged, and the first bearing surface is vertically arranged. Among them, the distance from the lowermost test interface 201 on the first bearing surface to the second bearing surface of the adjacent fixture module 1021 is equal to half of the height or half of the width of the memory chip access device 202.

[0040] In some embodiments, as Figure 1 shown, the first bearing surface of the fixture module 1021 faces the door frame side of the housing 101, which is convenient for the user to insert or remove the memory chip access device 202.

[0041] In some embodiments, in order to ensure the usability of the test interface 201, it is required that the distance between adjacent test interfaces 201 is greater than or equal to the height or width of the memory chip access device 202, so that each test interface 201 can be coupled to the memory chip access device 202, and it is avoided that one test interface 201 among adjacent test interfaces 201 can be coupled to the memory chip access device 202, while the other test interface 201 cannot be coupled to the memory chip access device 202 or there is poor contact between the memory chip access device 202 and the test interface 201.

[0042] In an application scenario, the row pitch of the hole positions of adjacent test interfaces 201 is greater than or equal to 1.35 cm, and the column pitch of the hole positions is greater than or equal to 1.65 cm.

[0043] In some embodiments, the storage chip access device 202 includes a card reader, such as a USB card reader, a parallel port card reader, a serial port card reader, a PCMICA (Personal Computer Memory Card International Association) card reader, an IEEE 1394 (IEEE1394 Interface Card, FireWire interface card) card reader, or others.

[0044] In some embodiments, each storage chip access device 202 includes at least one interface, and each interface is configured to be coupled to a storage chip to be tested.

[0045] In some embodiments, a display is further provided on the fixture module 1021 and the storage chip access device 202. The display on the fixture module 1021 is configured to display the plugging and unplugging status of the storage chip access device 202 on the test interface 201, and the display on the storage chip access device 202 is configured to display the plugging and unplugging status of the storage chip to be tested.

[0046] In some embodiments, the storage chip to be tested may be a volatile storage chip, a non-volatile storage chip, or others, such as DRAM (Dynamic Random Access Memory), NAND Flash, or others.

[0047] In some embodiments, the test device 103 may be a smart phone, a notebook computer, a desktop computer, a smart wearable device, or others, without limitation here.

[0048] In some embodiments of the present application, the test device 10 provided can use the test device 103 disposed outside the housing 101 to test the storage chip to be tested coupled to the storage chip access device 202 disposed inside the housing 101. Moreover, a plurality of storage chip access devices 202 are disposed on a plurality of fixture modules 1021 arranged in a stepped manner, which can improve the utilization rate of the internal space of the housing 101.

[0049] See Figure 2 , Figure 2FIG. 0 is a schematic structural diagram of a test device for a storage chip in some embodiments of the present application. The test device 10 includes a housing 101, at least one fixture assembly 102, at least one test device 103, and an interface expander 104. Each fixture assembly 102 includes at least two fixture modules 1021, and the at least two fixture modules 1021 are arranged in a stepped manner within the housing 101; a plurality of test interfaces 201 are provided on each fixture module 1021, and each test interface 201 is configured to be coupled to a storage chip access device 202; the storage chip access device 202 is configured to accommodate at least one storage chip to be tested; at least one test device 103 is disposed outside the housing 101, and each test device 103 is configured to be coupled to a plurality of test interfaces 201 to test the storage chips to be tested in the storage chip access device 202 coupled to the test interfaces 201. Each test device 103 is coupled to a plurality of test interfaces 201 through the interface expander 104.

[0050] It can be understood that the interface expander 104 can expand the number of interfaces of the test device 103, and the number of expanded interfaces is determined according to the actual situation, so that the test device 103 can be coupled to a plurality of test interfaces 201, and further coupled to a plurality of storage chips to be tested in the storage chip access device 202 coupled to the test interfaces 201.

[0051] In some embodiments, the interface expander 104 includes a first interface and a plurality of second interfaces. The first interface is used to couple to the test device 103, and the second interface is used to couple to the test interface 201.

[0052] Among them, the first interface and the second interface may be the same or different. The first interface or the second interface may be a USB interface, an HDMI interface, an RS-232 interface, or others, which are not limited here. In addition, the number of second interfaces can be determined according to the actual situation, such as 2, 4, 8, 10, which are not limited here either.

[0053] In an application scenario, the interface expander 104 is a USB Hub (Universal Serial Bus), and by converting the PCI (Peripheral Component Interconnection) bus of the test device 103 into a USB Hub, the number of storage chips to be tested tested by the test device 103 is increased.

[0054] In some embodiments, such as Figure 2As shown, a plurality of through holes are provided on the housing 101, and the interface expander 104 can be coupled to a plurality of test interfaces 201 on the fixture module 1021 through the through holes. In practical applications, before the connection lines on the interface expander 104 are coupled to the test interfaces 201, the connection lines of the interface expander 104 can be arranged first and then coupled to the test interfaces 201, which is convenient for testing the storage chips to be tested on different storage chip access devices 202 in a targeted manner. In addition, in order to ensure the airtightness of the space inside the housing 101 and avoid the corrosion of the devices inside the housing 101 by external substances such as water vapor and the impact on their performance, after the connection lines pass through the through holes, the through holes can be blocked with sealing substances such as soil, glue, and sealant.

[0055] In some embodiments of the present application, the test device 10 includes a housing 101, at least one fixture assembly 102, at least one test device 103, and an interface expander 104. By using the interface expander 104 as a middleware to connect the test device 103 and a plurality of test interfaces 201 of the fixture module 1021, the coupling of the test device 103 and the plurality of test interfaces 201 can be realized, and further the coupling of the test device 103 and a plurality of storage chips to be tested can be realized, which can increase the number of storage chips to be tested during a single test of the test device 103, improve the test efficiency, and reduce the test cost.

[0056] In some embodiments of the present application, a plurality of interfaces are provided on the fixture assembly 102, and these interfaces are configured to be coupled to the fixture module 1021. At this time, the connection lines of the test device 103 or the interface expander 104 can be directly coupled to the test interfaces 201, or can be coupled to the test interfaces 201 by being coupled to the interfaces on the fixture assembly 102 as shown in Figure 2 the figure, so as to realize the coupling with the test interfaces 201.

[0057] In some embodiments of the present application, the fixture assembly 102 is a stepped structure, and each fixture assembly 102 includes a plurality of stepped portions. The upper edge of the next stepped portion can support the fixture module 1021 coupled to the interface 1022 of the previous stepped portion; the sizes of any two stepped portions are the same or different.

[0058] A plurality of interfaces are provided on each fixture assembly 102, and the plurality of interfaces are spaced apart on the stepped portions of the fixture assembly 102, and the distance between adjacent interfaces is at least greater than the height or width of the fixture module 1021.

[0059] In addition, the plurality of interfaces are provided on the same bearing surface or different bearing surfaces of the fixture assembly 102. For example, at least one interface is provided on one bearing surface of the fixture assembly 102, and no interface is provided on the other bearing surface.

[0060] In some embodiments, to ensure the usability of the interfaces, the distance between adjacent interfaces is required to be greater than or equal to the height or width of the fixture module 1021, so that each interface can be coupled to the fixture module 1021, avoiding the situation where one of the adjacent interfaces can be coupled to the fixture module 1021 while the other interface cannot be coupled to the fixture module 1021 or has poor contact.

[0061] As Figure 3 shown, Figure 3 FIG. is a schematic structural diagram of a fixture component in some embodiments of the present application. Each stepped portion of the fixture component 102 includes a third bearing surface 301 and a fourth bearing surface 302. A plurality of interfaces 1022 of the fixture component 102 are disposed on the third bearing surface 301; wherein, the fourth bearing surface 302 is horizontally disposed, and the third bearing surface 301 is vertically disposed.

[0062] In some embodiments, the distance from the interface 1022 of any third bearing surface 301 to the adjacent fourth bearing surface 302 is equal to half of the height or half of the width of the fixture module 1021.

[0063] In other embodiments, the lowermost third bearing surface 301 is not provided with an interface 1022, or the interface 1022 on the lowermost third bearing surface 301 does not place the fixture module 1021.

[0064] As Figure 4 shown, Figure 4 FIG. is a schematic structural diagram of a fixture component in some embodiments of the present application. Each stepped portion of the fixture component 102 includes a third bearing surface 301 and a fourth bearing surface 302. A plurality of interfaces 1022 of the fixture component 102 are disposed on the fourth bearing surface 302; wherein, the fourth bearing surface 302 is horizontally disposed, and the third bearing surface 301 is vertically disposed.

[0065] In some embodiments, the distance from the interface 1022 of any fourth bearing surface 302 to the adjacent third bearing surface 301 is equal to half of the height or half of the width of the fixture module 1021.

[0066] In other embodiments, the uppermost fourth bearing surface 302 is not provided with an interface 1022, or the interface 1022 on the uppermost fourth bearing surface 302 does not place the fixture module 1021.

[0067] In some embodiments, each fixture module 1021 further includes a fifth bearing surface, which is respectively perpendicular to the third bearing surface 301 and the fourth bearing surface 302, and the fifth bearing surface faces the door frame side of the housing 101.

[0068] The interface 1022 involved in this application is correspondingly set with the fixture module 1021. The interface 1022 can be a USB interface, an HDMI interface, an RS-232 interface, or others, which are not limited here.

[0069] In some embodiments of this application, the fixture module 1021 is arranged in a stepped shape, and multiple storage chip access devices 202 can be placed on the fixture module 1021, improving the utilization rate of the space inside the housing 101. Moreover, by being coupled to the test interface 201 provided on the fixture module 1021, the way of being coupled to the storage chip access device 202 can be realized, which can reduce the length of the connection lines used for coupling to the storage chip access device 202, shorten the data transmission path, and further ensure the stability of communication with the storage chips to be tested on the storage chip access device 202.

[0070] See Figure 5 , Figure 5 FIG. is a schematic structural diagram of a test device for storage chips in some embodiments of this application. The test device 10 includes a housing 101, at least one fixture component 102, at least one test device 103, at least one interface expander 104, and a storage rack 105. Among them, a plurality of storage components 1051 are stacked on the upper layer of the storage rack 105, and each storage component 1051 is configured to accommodate a test device 103.

[0071] In some embodiments, the structure of the storage rack 105 is as shown in Figure 6 . The sizes of the storage rack 105 and the storage components 1051 can be set according to actual situations, which are not limited here. For example, the height of the storage rack 105 is 183 cm, and the height of each storage component 1051 is 10 cm.

[0072] Among them, the number of storage components 1051 provided on the storage rack 105 can be set according to actual situations, which are not limited here.

[0073] In some embodiments, as shown in Figure 6 , the storage component 1051 is composed of at least two "L"-shaped frames, and the "L"-shaped frames are configured to place and fix the test device 103.

[0074] In some embodiments, the storage component 1051 is composed of at least two "L"-shaped frames and a bakelite tray. The "L"-shaped frames are configured to place and fix the bakelite tray, and the test device 103 is placed in the space composed of the "L"-shaped frames and the bakelite tray. Among them, the size of the bakelite tray can be set according to actual situations, such as 31.5 cm × 31.5 cm, which are not limited here.

[0075] In other embodiments, the storage component 1051 may be composed of other components, which are not limited herein. For example, the storage component 1051 is a storage block including a groove for placing the test device 103.

[0076] In some embodiments, as Figure 6 shown, a pulley 1052 is provided at the bottom of the storage rack 105. The pulley 1052 can increase the distance between the test device 103 placed at the bottom of the storage rack 105 and the ground, facilitating heat dissipation of the test device 103 placed at the bottom of the storage rack 105. Moreover, the provision of the pulley 1052 can facilitate the handling of the storage rack 105 and the test device 103 provided on the storage rack 105, and facilitate the adjustment of the positional relationship between the test device 103 and the housing 101.

[0077] In some embodiments, the test device 103 is accommodated in the storage component 1051 in the form of a bare board, and other components related to the test device 103, such as a keyboard, a display screen, etc., are provided outside the storage rack 105 and are remotely communicatively connected to the bare board, which can reduce the space occupied by the storage rack 105 and effectively increase the number of test devices 103 placed on the storage rack 105.

[0078] In an application scenario, the bare board of the test device 103 corresponds to a computer motherboard, the computer motherboard is directly placed on a bakelite tray, and devices such as a display screen and a keyboard are provided near the operator and are remotely connected to the computer motherboard through an IP (Internet Protocol) local area network.

[0079] It can be understood that the method of accommodating the test device 103 in the form of a bare board in the storage component 1051 can reduce the space occupied by the storage rack 105 and can effectively increase the number of test devices 103 on the storage rack 105. In addition, the method of remotely communicating with other components can not only reduce the utilization rate of the space around the housing 101, but also be arranged within the operable area of the operator, facilitating operation and control.

[0080] In some embodiments, heat dissipation through holes are provided on the storage component 1051, and the heat dissipation through holes are configured to dissipate heat from the test device 103.

[0081] In an application scenario, the bakelite tray of the storage component 1051 is hollowed out, and the heat generated when the test device 103 works can be dissipated through the hollowed-out part, providing sufficient heat dissipation and operating space for the test device 103.

[0082] In some embodiments, the arrangement of multiple storage components 1051 stacked on the storage rack 105 may be as Figure 7 shown, or may be as Figure 8 shown, or may be other arrangement methods, which are not limited herein.

[0083] In some embodiments of the present application, the storage rack 105 provided can place multiple test devices 103 arranged in a stacked manner, reducing the space occupied by the test devices 103.

[0084] See Figure 9 , Figure 9 is a schematic structural diagram of a test device for a storage chip in some embodiments of the present application. Among them, the housing 101 includes at least two accommodation spaces 1011, and a corresponding fixture assembly 102 is respectively arranged in each accommodation space 1011; a temperature adjustment module 106 is correspondingly arranged for each accommodation space 1011, and the temperature adjustment module 106 is configured to control the test environment temperature in the accommodation space 1011.

[0085] In some embodiments, arranging the temperature adjustment module 106 in the housing 101 can form an incubator to provide a suitable test environment for the storage chip to be tested. It can be understood that the incubator can simulate the temperature change law in the atmospheric environment and can be used for the adaptability test of the storage chip to be tested in product design, improvement, identification, inspection and other links to expose defective components.

[0086] It can be understood that the test environment temperatures provided by the temperature adjustment modules 106 in different accommodation spaces 1011 are the same or different.

[0087] The housing 101 provided in some embodiments of the present application can provide multiple accommodation spaces 1011, and a temperature adjustment module 106 is arranged in each accommodation space 1011. The temperature adjustment module 106 can be used to provide a temperature to the corresponding accommodation space 1011 to provide a test environment for the storage chip to be tested placed in the accommodation space 1011 and conduct a special test on the storage chip to be tested.

[0088] In summary, the test device 10 provided in some embodiments of the present application can use the test device 103 arranged outside the housing 101 to test the storage chip to be tested coupled to the storage chip access device 202 arranged inside the housing 101. Moreover, the storage chip access device 202 is arranged on the stepped fixture module 1021, which can improve the utilization rate of the internal space of the housing 101.

[0089] The above is only the implementation manner of the present application, and does not limit the patent scope of the present application accordingly. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be included in the patent protection scope of the present application by the same token.

Claims

1. A memory chip testing device, characterized in that: The testing device comprises: case; At least one fixture assembly, each of the fixture assembly comprises at least two fixture modules, and the at least two fixture modules are arranged in a stepped manner in the housing; each of the fixture modules is provided with a plurality of test interfaces, and each of the test interfaces is configured to couple to a memory chip access device; wherein the memory chip access device is configured to accommodate at least one memory chip to be tested; At least one test device is disposed outside the housing, and each of the test devices is configured to be coupled to a plurality of the test interfaces to test the memory chip to be tested in the memory chip access device coupled to the test interface.

2. The testing device according to claim 1, characterized in that: Each of the test devices is coupled to a plurality of the test interfaces via an interface expander.

3. The testing device according to claim 1, characterized in that: The plurality of test interfaces are arranged at intervals on the fixture module, and the distance between adjacent test interfaces is at least greater than the height or width of the storage chip access device.

4. The testing device according to claim 1, characterized in that: Each of the fixture modules comprises a first bearing surface and a second bearing surface, and the plurality of test interfaces are arranged on the first bearing surface; wherein the second bearing surface is arranged horizontally, and the first bearing surface is arranged vertically; Wherein, the distance from the test interface at the bottom of the first carrying surface to the second carrying surface of an adjacent fixture module is equal to half of the height or half of the width of the memory chip access device.

5. The testing device according to claim 4, characterized in that: The first bearing surface faces one side of the door frame of the shell.

6. The testing device according to claim 1, characterized in that: The testing device further comprises: a storage rack, on which a plurality of storage components are stacked, and each storage component is configured to accommodate one of the testing devices.

7. The testing device according to claim 6, characterized in that: A pulley is arranged at the bottom of the rack.

8. The testing device according to claim 6, characterized in that: The storage component is provided with heat dissipation through holes.

9. The testing device according to claim 6, characterized in that: The testing device is accommodated in the storage component in the form of a bare board.

10. The testing device according to claim 1, characterized in that: The shell includes at least two accommodating spaces, each of which is respectively provided with a corresponding fixture assembly; each of the accommodating spaces is correspondingly provided with a temperature regulating module, and the temperature regulating module is configured to control the test environment temperature in the accommodating space.

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