Sealing structure

Abstract

The utility model discloses a sealing structure. The sealing structure comprises an insulating substrate; the first base island is positioned on the first surface of the insulating substrate and is provided with an IGBT (Insulated Gate Bipolar Transistor) and an FRD1; the second base island is located on the first surface of the insulating substrate and is provided with an FRD2; a plurality of pins; the plastic package body covers the first base island, the second base island, the IGBT, the FRD1, the FRD2 and the parts of the plurality of pins; wherein the first base island and the second base island are arranged on the left side and the right side of the insulating substrate, the plurality of pins extend out of the lower side edge of the plastic package body below the first base island and the second base island, and the first pin is connected with a grid electrode of the IGBT; the second pin is connected with the emitting electrode of the IGBT and the anode of the FRD1; the third pin is electrically connected with the first base island, the cathode of the FRD1 and the collector of the IGBT; the fourth pin is electrically connected with the second base island and the cathode of the FRD2; the collector electrode of the IGBT is electrically connected with the anode of the FRD2. According to the sealing structure, the discrete components are packaged in the same plastic package body, so that the product integration level is improved, and the cost is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and more specifically, to a co-packaging structure. Background Art

[0002] In an air conditioner power factor correction circuit (Power Factor Correction, PFC), it is usually necessary to use two discrete electrical components, namely an Insulate-Gate Bipolar Transistor (IGBT) and a Fast-recovery diode (FRD), in combination to form the required circuit. By arranging the two components on the same circuit board and realizing electrical connection through the wiring on the circuit board, the two components will respectively occupy the area of the circuit board and need to be connected and assembled to the circuit board respectively, which not only affects the integration of the product, but also increases the product cost and the number of materials required for the product. When the two components are on the circuit board, an insulating sheet or insulating film is usually externally disposed on the back of one of the components.

[0003] Therefore, it is necessary to design a co-packaging structure to encapsulate the IGBT and two discrete FRDs in a plastic package, reduce the occupation of the circuit board area, improve the product integration, and internally dispose the externally disposed insulating sheet or insulating film into the packaging structure. On the one hand, it takes into account the co-packaging of the IGBT and two FRDs, and on the other hand, it takes into account the electrical insulation between the components. Summary of the Utility Model

[0004] In view of this, the purpose of the present utility model is to provide a co-packaging structure that encapsulates an Insulate-Gate Bipolar Transistor and two diodes in the same plastic package, improves the product integration, reduces the cost, makes the circuit board layout more reasonable and flexible, and has a higher integration, so as to meet various different requirements.

[0005] The utility model provides a co-packaged structure, including: an insulating substrate; a first base island located on a first surface of the insulating substrate, where an insulated gate bipolar transistor and a first diode are disposed on the first base island; a second base island located on the first surface of the insulating substrate, where a second diode is disposed on the second base island; a plurality of pins; and a plastic package covering a part of the first base island, the second base island, the insulated gate bipolar transistor, the first diode, the second diode, and the plurality of pins; wherein, the first base island and the second base island are disposed on the left and right sides of the insulating substrate, the plurality of pins extend from a lower side edge of the plastic package below the first base island and the second base island, a first pin among the plurality of pins is connected to a gate of the insulated gate bipolar transistor; a second pin among the plurality of pins is connected to an emitter of the insulated gate bipolar transistor and an anode of the first diode; a third pin among the plurality of pins is electrically connected to the first base island, a cathode of the first diode, and a collector of the insulated gate bipolar transistor; a fourth pin among the plurality of pins is electrically connected to the second base island and a cathode of the second diode; and a collector of the insulated gate bipolar transistor is electrically connected to an anode of the second diode.

[0006] Optionally, the first diode is a fast recovery diode, and the second diode is a fast recovery diode.

[0007] Optionally, a surface of the insulated gate bipolar transistor in contact with the first base island is a collector, a surface of the first diode in contact with the first base island is a cathode, and a surface of the second diode in contact with the second base island is a cathode.

[0008] Optionally, the first base island further includes an extension portion extending downward to the third pin and below the second base island, and the third pin is welded to the extension portion.

[0009] Optionally, the first pin and the second pin are located below the first base island, and the third pin and the fourth pin are located below the second base island.

[0010] Optionally, the first diode is located between the insulated gate bipolar transistor and the second diode.

[0011] Optionally, the insulating substrate is provided with through holes on a side opposite to the pins, and the through holes penetrate the plastic package.

[0012] Optionally, a width of the first pin is less than or equal to widths of the second pin, the third pin, and the fourth pin.

[0013] Optionally, a width of the plastic package is 15 mm to 18 mm.

[0014] Optionally, the center distance between the second pin and the third pin is 4 mm to 5 mm, and the center distance between the third pin and the fourth pin is 4 mm to 5 mm; the center distance between the first pin and the second pin is 2.5 mm to 3.5 mm.

[0015] Optionally, the center distances between adjacent pins among the first pin, the second pin, the third pin, and the fourth pin are all the same, and the center distance between adjacent pins is 3.5 mm to 4.5 mm.

[0016] Optionally, the insulating substrate is a ceramic substrate; the insulating substrate, the first base island, and the second base island form a copper-clad ceramic substrate.

[0017] Optionally, the lengths of the first pin, the second pin, the third pin, and the fourth pin protruding from the plastic package are 15 mm to 25 mm.

[0018] Advantages of the present utility model:

[0019] The co-packaging structure provided by the present utility model packages an insulated gate bipolar transistor and two diodes in the same plastic package, reducing the number of devices, the area occupied on the circuit board, the assembly steps, and the assembly cost.

[0020] Furthermore, the first base island of the co-packaging structure is welded and connected to the third pin through an extension portion, and the chip (insulated gate bipolar transistor, diode) is connected to the pin through a bonding wire, and both have mature processes and are easy to implement in the industry.

[0021] Furthermore, the insulated gate bipolar transistor and the first diode are located on the first base island, the second diode is located on the second base island, and the first diode is located between the insulated gate bipolar transistor and the second diode. The layout is reasonable and has good heat dissipation capacity.

[0022] Furthermore, the first base island is welded and connected to the third pin through an extension portion, which can carry a larger current and thus improve the performance of the co-packaging structure.

[0023] Furthermore, the center distance between adjacent pins is relatively large, ensuring the withstand voltage performance of the co-packaging structure, which has a withstand voltage performance of more than 650V.

[0024] Furthermore, the length, width, distance, etc. of each pin in the co-packaging structure can be adjusted within a certain range according to customer requirements, making the co-packaging structure also have great installation adaptability, and its manufacturing process is simple, the cost is low, and it is easy to implement.

[0025] Furthermore, an insulating substrate is built into the co-packaged structure, eliminating the need for externally attaching an insulating sheet or film to electrically isolate the insulated gate bipolar transistor, the first diode, and the second diode, thereby enhancing the ease of use. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Through the following description of the embodiments of the present invention with reference to the accompanying drawings, the above and other objects, features, and advantages of the present invention will become more apparent.

[0027] Figure 1 A circuit diagram showing the co-packaged structure of the first embodiment of the present invention;

[0028] Figure 2 A partially enlarged schematic view showing the plastic package region in the co-packaged structure of the first embodiment of the present invention;

[0029] Figure 3 A front view showing the co-packaged structure of the first embodiment of the present invention;

[0030] Figure 4 A back view showing the co-packaged structure of the first embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] The various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the drawings, the same elements are denoted by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0032] The present invention will be further described below in conjunction with the drawings and embodiments.

[0033] Figure 1 A circuit diagram showing the co-packaged structure of the first embodiment of the present invention; the co-packaged structure includes an insulated gate bipolar transistor 10, a first diode 20, and a second diode 30. The first diode 20 and the second diode 30 are, for example, both fast recovery diodes, and their external includes four connection terminals, namely a first pin 110, a second pin 120, a third pin 130, and a fourth pin 140. Among them, the first pin 110 is connected to the gate G of the insulated gate bipolar transistor 10, the second pin is connected to the emitter E of the insulated gate bipolar transistor 10 and the anode of the first diode 20, the third pin 130 serves as an input terminal and is connected to the collector C of the insulated gate bipolar transistor, the cathode of the first diode 20, and the anode of the second diode 30, and the fourth pin 140 serves as an output terminal and is connected to the cathode of the second diode 30.

[0034] In this co-packaged structure, the insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 jointly achieve a boost function. Among them, the insulated gate bipolar transistor 10 and the second diode 30 serve as power switching devices in the topology. The first diode 20 is reversely connected in parallel with the insulated gate bipolar transistor 10 to play a protection function and prevent the insulated gate bipolar transistor 10 from being broken down by reverse voltage withstand.

[0035] Figure 2 FIG. 4 shows a partial enlarged schematic view of the plastic package body region in the co-packaged structure of the first embodiment of the present invention. In order to better illustrate the connection and positional relationship of each part in the co-packaged structure, the plastic package body 6 of the co-packaged structure is subjected to a perspective treatment, and the contour of the plastic package body 6 is marked with a dotted line. The co-packaged structure includes an insulating substrate 4, a first base island 1, a second base island 2, an insulated gate bipolar transistor 10, a first diode 20, a second diode 30, a plurality of pins, and a plastic package body 6. Among them, the plurality of pins include a first pin 110, a second pin 120, a third pin 130, and a fourth pin 140. The first base island 1 and the second base island 2 are located on the first surface of the insulating substrate 4, for example, on the left and right sides of the insulating substrate 4 respectively, and are electrically isolated from each other between the first base island 1 and the second base island 2. A through hole 5 is also provided in the upper region of the insulating substrate 4. The first base island 1 and the second base island 2 avoid the through hole 5 in the upper region of the insulating substrate 4. The through hole 5 penetrates the plastic package body 6. The through hole 5 is, for example, circular and is used for a fixing screw to pass through, so as to fix the co-packaged structure. Of course, it can also achieve a heat conduction and heat dissipation function through the fixing screw. The insulating substrate 4 is, for example, a ceramic substrate.

[0036] The insulated gate bipolar transistor 10 is located on the first base island 1, for example, on the left side of the lower region of the first base island 1. The first diode 20 is also located on the first base island 1. The first diode 20 is, for example, located on the right side of the insulated gate bipolar transistor 10. The first base island 1 further includes an extension portion 3 extending obliquely downward to the right (in the direction of the third pin 130) to the lower side of the second base island 2. The first base island 1 is welded and connected to the third pin 130 at the extension portion 3. The second diode 30 is located on the second base island 2, that is, the first diode 20 is located between the insulated gate bipolar transistor 10 and the second diode 30, and its layout is reasonable and has good heat dissipation ability.

[0037] The emitter E on the front of the insulated gate bipolar transistor 10 is electrically connected to the second pin 120 through a bonding wire. The gate G on the front of the insulated gate bipolar transistor 10 is electrically connected to the first pin 110 through a bonding wire. The back of the insulated gate bipolar transistor 10 is mounted on the first base island 1. The collector C on the back of the insulated gate bipolar transistor 10 is electrically connected to the first base island 1 and is led out through the third pin 130 welded to the first base island 1.

[0038] The anode on the front side of the first diode 20 is electrically connected to the second pin 120 through a bonding wire. The back side of the first diode 20 is mounted on the first base island 1, and the cathode on the back side of the first diode 20 is also electrically connected to the first base island 1.

[0039] The anode on the front side of the second diode 30 is electrically connected to the first base island 1 through a bonding wire. The back side of the second diode 30 is mounted on the second base island 2, and the cathode on the back side of the second diode 30 is electrically connected to the second base island 2 and is electrically connected to the fourth pin 140 through a bonding wire.

[0040] Specifically, the insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 are bonded to the corresponding base islands through, for example, solder paste, solder, or sintered silver. After the bonding wire connection is completed, a plastic package 6 covering the insulated gate bipolar transistor 10, the first diode 20, the second diode 30, the first base island 1, the second base island 2, the insulating substrate 4, and parts of the multiple pins is finally formed by a molding compound. It can be understood that in addition to being electrically connected to the respective pins through the bonding wires, the insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 can also be electrically connected to the respective pins through metal clips.

[0041] The first pin 110, the second pin 120, the third pin 130, and the fourth pin 140 all extend from the lower side of the plastic package 6.

[0042] Figure 3 A front view showing the co-packaging structure of the first embodiment of the present invention is as Figure 3 shown. The co-packaging structure uses, for example, single in-line pins. The first pin 110, the second pin 120, the third pin 130, and the fourth pin 140 are arranged in sequence from left to right on the lower side of the plastic package 6. Among them, the width of the first pin 110 is less than or equal to the widths of the second pin 120, the third pin 130, and the fourth pin 140; the center distance between the second pin 120 and the third pin 130 is the same as the center distance between the third pin 130 and the fourth pin 140, for example, both are D1, and the distance D1 is, for example, 4 mm to 5 mm. The center distance D2 between the first pin 110 and the second pin 120 is, for example, 2.5 mm to 3.5 mm. The length H that the first pin 110, the second pin 120, the third pin 130, and the fourth pin 140 extend from the lower side of the plastic package 6 is, for example, 15 mm to 25 mm. The width D3 of the plastic package 6 is, for example, 15 mm to 18 mm. In other embodiments, the center distances between adjacent pins among the first pin 110, the second pin 120, the third pin 130, and the fourth pin 140 are all the same, and the center distance between adjacent pins is, for example, 3.5 mm to 4.5 mm.

[0043] Figure 4The back schematic diagram of the co - packaging structure according to the first embodiment of the present utility model is shown. In this embodiment, the insulating substrate 4 is a ceramic substrate. A heat sink 7 is provided on the second surface of the insulating substrate 4. The material of the heat sink 7 is copper. The heat sink 7 protrudes from the plastic package 6, and the second surface is opposite to the first surface. The insulating substrate 4, the first base island 1, the second base island 2 and the heat sink 7 together form a direct bonded copper (DBC) substrate.

[0044] It can be understood that the co - packaging structure in the first embodiment can also be realized after mirroring, that is, the second base island 2 is on the left side and the first base island 1 is on the right side. Correspondingly, the fourth pin 140, the third pin 130, the second pin 120 and the first pin 110 are arranged in sequence from left to right along the lower side of the plastic package 6.

[0045] The co - packaging structure provided by the present utility model packages an insulated gate bipolar transistor and two diodes in the same plastic package, reducing the number of devices, the area occupied on the circuit board, the assembly steps, and the assembly cost.

[0046] Furthermore, the first base island of the co - packaging structure is welded to the third pin through an extension part. The chips (insulated gate bipolar transistor, diode) and the pins are connected by bonding wires, and all of them have mature processes and are easy to implement in the industry.

[0047] Furthermore, the insulated gate bipolar transistor and the first diode are located on the first base island, the second diode is located on the second base island, and the first diode is located between the insulated gate bipolar transistor and the second diode. Its layout is reasonable and it has good heat dissipation ability.

[0048] Furthermore, the first base island is welded to the third pin through an extension part, which can carry a larger current, thereby improving the performance of the co - packaging structure.

[0049] Furthermore, the center distance between adjacent pins is relatively large, ensuring the withstand voltage performance of the co - packaging structure, which has a withstand voltage performance of more than 650V.

[0050] Furthermore, the length, width, spacing, etc. of each pin in the co - packaging structure can be adjusted within a certain range according to customer requirements, making the co - packaging structure have great installation adaptability. Its manufacturing process is simple, the cost is low, and it is easy to implement.

[0051] Furthermore, the co - packaging structure is internally provided with an insulating substrate, avoiding the operation of electrically isolating the insulated gate bipolar transistor, the first diode and the second diode by externally attaching an insulating sheet or insulating film, and improving the use convenience.

[0052] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

[0053] As described above in the embodiments of the present utility model, these embodiments do not describe all the details in detail, nor do they limit the utility model to the specific embodiments described. Obviously, many modifications and variations can be made according to the above description. These embodiments are selected and specifically described in this specification in order to better explain the principle and practical application of the present utility model, so that those skilled in the art can make good use of the present utility model and its modifications based on the present utility model. The present utility model is only limited by the claims and their full scope and equivalents.

Claims

1. A sealing structure, characterized in that: include: Insulating substrate; A first base island is located on a first surface of the insulating substrate, and an insulated gate bipolar transistor and a first diode are arranged on the first base island; A second base island is located on the first surface of the insulating substrate, and a second diode is arranged on the second base island; Multiple pins; A plastic package covering the first base island, the second base island, the insulated gate bipolar transistor, the first diode, the second diode and parts of the plurality of pins; Among them, the first base island and the second base island are arranged on the left and right sides of the insulating substrate, and the multiple pins extend from the lower side of the plastic package below the first base island and the second base island. The first pin among the multiple pins is connected to the gate of the insulated gate bipolar transistor; the second pin among the multiple pins is connected to the emitter of the insulated gate bipolar transistor and the anode of the first diode; the third pin among the multiple pins is electrically connected to the first base island, the cathode of the first diode and the collector of the insulated gate bipolar transistor; the fourth pin among the multiple pins is electrically connected to the second base island and the cathode of the second diode; the collector of the insulated gate bipolar transistor is electrically connected to the anode of the second diode.

2. The sealing structure according to claim 1, characterized in that: The first diode is a fast recovery diode, and the second diode is a fast recovery diode.

3. The sealing structure according to claim 1, characterized in that: The side of the insulated gate bipolar transistor in contact with the first base island is a collector, the side of the first diode in contact with the first base island is a cathode, and the side of the second diode in contact with the second base island is a cathode.

4. The sealing structure according to claim 1, characterized in that: The first base island further includes an extension portion extending toward the third pin and below the second base island, and the third pin is connected to the extension portion by welding.

5. The sealing structure according to claim 1, characterized in that: The first pin and the second pin are located under the first base island, and the third pin and the fourth pin are located under the second base island.

6. The sealing structure according to claim 1, characterized in that: The first diode is located between the insulated gate bipolar transistor and the second diode.

7. The sealing structure according to claim 1, characterized in that: The insulating substrate is provided with a through hole on a side opposite to the pin, and the through hole passes through the plastic package body.

8. The sealing structure according to claim 1, characterized in that: The width of the first pin is smaller than or equal to the widths of the second pin, the third pin and the fourth pin.

9. The sealing structure according to claim 1, characterized in that: The width of the plastic package body is 15 mm to 18 mm.

10. The sealing structure according to claim 1, characterized in that: The center distance between the second pin and the third pin is 4 mm to 5 mm, the center distance between the third pin and the fourth pin is 4 mm to 5 mm; the center distance between the first pin and the second pin is 2.5 mm to 3.5 mm.

11. The sealing structure according to claim 1, characterized in that: The center distances between adjacent pins of the first pin, the second pin, the third pin and the fourth pin are all the same, and the center distances between adjacent pins are 3.5 mm to 4.5 mm.

12. The sealing structure according to claim 1, characterized in that: The insulating substrate is a ceramic substrate; the insulating substrate, the first base island and the second base island constitute a copper-clad ceramic substrate.

13. The sealing structure according to claim 1, characterized in that: The length of the first pin, the second pin, the third pin and the fourth pin extending from the plastic package body is 15 mm to 25 mm.

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