Multi-level power semiconductor module

Abstract

The utility model discloses a multi-level power semiconductor module, relates to the technical field of power semiconductors, and solves the technical problems of few level states and low stability and reliability of an H-bridge circuit. The device comprises a four-switch H-bridge unit, an auxiliary unit and a plurality of wiring terminals, the four-switch H-bridge unit forms a first power circuit and a second power circuit; the auxiliary unit is connected with the second power circuit and is used for increasing the output level state of the power semiconductor module and shunting the follow current in the working process of the four-switch H-bridge unit; and the wiring terminal is connected with the four-switch H-bridge unit and the auxiliary unit and is used for performing power supply access, power output, work control and work parameter detection of the power semiconductor module. According to the utility model, the number of output levels is increased by adding the auxiliary unit, and the auxiliary unit shunts the follow current, so that the power semiconductor module has higher performance, stability and safety.

Description

Technical Field

[0001] The utility model relates to the technical field of power semiconductors, in particular to a multi-level power semiconductor module. Background Art

[0002] The H-bridge structure is named because of its appearance similar to H. It is often used in inverters (DC-AC conversion, that is, direct current to alternating current), and power semiconductors based on the H-bridge structure have also appeared. By opening and closing the switch, direct current (from batteries, etc.) is inverted into alternating current of a certain frequency or variable frequency, which is used to drive AC motors (asynchronous motors, etc.).

[0003] The traditional H-bridge structure is a power symmetrical structure. On the one hand, the turn-off voltages of the left and right half-bridges are the same. On the other hand, the output level of the power semiconductor module of the H-bridge structure is symmetrical within a cycle. Therefore, it has significant advantages in terms of control, energy consumption, function and applicability, making it widely used in motor drive, control system and other fields. However, Figure 1 and Figure 2 As shown, if U'=E', when S1 and S4 are turned on and S2 and S3 are turned off in the H-bridge circuit, the circuit level is E'; when S1 and S3 are turned off, the circuit level is 0; when S2 and S3 are turned on and S1 and S4 are turned off, the circuit level state is -E'. The circuit level has only three states: E', 0, and -E'. At the same time, when the circuit is in reverse freewheeling, it is easy to have a reverse voltage that is too large, causing the power chip of the power module to be broken down and thus fail, and the reliability is low. At the same time, the H-bridge structure has a single level state structure, and the power semiconductor based on it is not suitable for a wider range of applications such as generators and high-power inverters.

[0004] In the process of implementing the utility model, the applicant found that there are at least the following problems in the prior art:

[0005] The H-bridge circuit has few level states, and the power semiconductor based on it is prone to excessive reverse voltage during reverse freewheeling, causing the power chip to break down and fail, and has low stability and reliability. Utility Model Content

[0006] The purpose of the utility model is to provide a multi-level power semiconductor module to solve the technical problems that the H-bridge circuit in the prior art has few level states, and the power semiconductor based on it is prone to excessive reverse voltage during reverse freewheeling, resulting in breakdown and failure of the power chip, and low stability and reliability. The preferred technical solution among the many technical solutions provided by the utility model can produce many technical effects as described below.

[0007] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0008] A multilevel power semiconductor module provided by the utility model, 1. comprising a first power circuit, a second power circuit, an auxiliary unit and a plurality of wiring terminals; the first power circuit and the second power circuit form a four-switch H-bridge unit; the auxiliary unit is connected to the second power circuit for increasing the output level state of the power semiconductor module and shunting the freewheeling current during the operation of the four-switch H-bridge unit; the plurality of wiring terminals are connected to the four-switch H-bridge unit and the auxiliary unit for power access, power output, operation control and operation parameter detection of the power semiconductor module.

[0009] Preferably, the four-switch H-bridge unit includes power chips Q1, Q2, Q3, and Q4 which are all IGBT power chips, and also includes FRD power chips D1, D2, D3, and D4; the power chips Q1, Q2, Q3, and Q4 are respectively connected in parallel with the FRD power chips D1, D2, D3, and D4; the power chips Q1 and Q2 form the first power circuit; the power chips Q3 and Q4 form the second power circuit.

[0010] Preferably, the four-switch H-bridge unit includes power chips Q1, Q2, Q3, and Q4 which are all MOS transistors; the power chips Q1 and Q2 form the first power circuit; the power chips Q3 and Q4 form the second power circuit.

[0011] Preferably, the auxiliary unit includes diodes LB1, LB2, LB3, LB4, and a power chip Q5; the diodes LB1 and LB2 are connected in series with each other and then connected in parallel with the power chip Q5, and the diodes LB3 and LB4 are connected in series with each other and then connected in parallel with the power chip Q5.

[0012] Preferably, the power chip Q5 is an IGBT power chip, and also includes an FRD power chip D5, and the IGBT power chip Q5 is connected in parallel with the FRD power chip D5; or the power chip Q5 is a MOSFET power chip.

[0013] Preferably, the wiring terminals include a power terminal E and a power terminal G, and the emitters and gates of the power chips Q1, Q2, Q3, Q4, and Q5 are respectively connected to the power terminal E and the power terminal G; the power terminal E is used for sampling the emitters of the power chips, and the power terminal G is used for controlling the switching states of the power chips.

[0014] Preferably, the power semiconductor module outputs power through terminal U and terminal V. Terminal V is connected to the first power circuit, and terminal U is connected to the second power circuit.

[0015] Preferably, the power semiconductor module further includes a sampling terminal I and a sampling terminal T. The sampling terminal I is a current sampling terminal for detecting the operating current of the power semiconductor module through a current detection resistor, and the sampling terminal T is a temperature sampling terminal for detecting the operating temperature of the power semiconductor module.

[0016] Preferably, the power semiconductor module further includes an electrical input terminal P(+) and an electrical output terminal P(-). The current detection resistor is connected between the sampling terminal I and the electrical output terminal P(-). The electrical input terminal P(+) is used to connect to an external input power supply; the sampling terminal T is arranged at the edge of the power semiconductor module.

[0017] Preferably, the power semiconductor module is encapsulated with hard silicone gel or hard encapsulation resin.

[0018] Implementing one of the technical solutions in the above technical solutions of the present utility model has the following advantages or beneficial effects:

[0019] This application is based on the improvement of the traditional H-bridge structure. By adding an auxiliary unit to increase the number of output levels, it is applicable to a wider range of applications, such as generators, high-power inverters, etc. At the same time, fewer electronic components are used. The auxiliary unit shunts the freewheeling current during the operation of the four-switch H-bridge unit, avoiding the breakdown and failure of the power chip in the power semiconductor module due to excessive reverse voltage, making the power semiconductor module have higher performance, stability, and safety. Description of the Drawings

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings. In the drawings:

[0021] Figure 1 is the circuit diagram of the output level E' of the existing H-bridge circuit;

[0022] Figure 2 is the circuit diagram of the output level -E' of the existing H-bridge circuit;

[0023] Figure 3 is the internal circuit diagram of the multilevel power semiconductor module of the embodiment of the present invention;

[0024] Figure 4 It is a schematic structural diagram of a multilevel power semiconductor module according to an embodiment of the present invention. Detailed implementation manners

[0025] In order to make the objectives, technical solutions and advantages of the present utility model clearer, various exemplary embodiments to be described below will refer to the corresponding drawings, which form a part of the exemplary embodiments and describe various exemplary embodiments that may be adopted to implement the present utility model. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation manners described in the following exemplary embodiments do not represent all implementation manners consistent with the present disclosure. It should be understood that they are only examples of processes, methods, devices, etc. that are consistent with some aspects of the present utility model disclosed in detail in the appended claims. Other embodiments may also be used, or structural and functional modifications may be made to the embodiments listed herein without departing from the scope and essence of the present utility model.

[0026] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", etc. indicate the orientation or positional relationship based on the drawings shown, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the elements referred to must have a specific orientation, be constructed and operated in a specific orientation. The terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. The meaning of the term "plurality" is two or more. The terms "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a communication connection, a direct connection, an indirect connection through an intermediate medium, and may be the internal connection or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more of the related listed items. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0027] In order to illustrate the technical solutions described in the present utility model, the following will be described by specific examples, and only the parts related to the embodiments of the present utility model are shown.

[0028] Embodiment:

[0029] As Figure 3As shown in the figure, the utility model provides a multilevel power semiconductor module, which includes a first power circuit, a second power circuit, an auxiliary unit and a plurality of wiring terminals. The first power circuit and the second power circuit form a four-switch H-bridge unit, and both the first power circuit and the second power circuit are half-bridge circuits, so as to realize the positive-level and negative-level outputs of the power semiconductor module. The auxiliary unit is connected to the second power circuit, specifically connected by bonding wires (preferably aluminum wires), and is used to increase the output level state of the power semiconductor module. For example, after setting power chips in the auxiliary unit, the output level state of the traditional H-bridge circuit can be increased, and the freewheeling current during the operation of the four-switch H-bridge unit is shunted. One end of the wiring terminal is connected to the four-switch H-bridge unit and the auxiliary unit, and the other end is connected to an external module to realize the functions of the power semiconductor module. The plurality of wiring terminals are used for power supply access, power output, operation control (controlling the power chips in the power semiconductor module) and operation parameter detection of the power semiconductor module. Therefore, the normal functions of the power semiconductor module can be realized through the power supply access wiring terminal and the power output terminal wiring terminal. The wiring terminal detects the operation parameter indexes, which is convenient for further obtaining the state of the power semiconductor module and improving the stability of the power semiconductor module. The wiring terminal is any one of a sheet type, an S type or a Z type, and is arranged at the edge of the power semiconductor module. Its main materials include but are not limited to weldable and conductive materials such as copper, aluminum, copper alloy, aluminum alloy, electroplated gold, nickel, tin, silver, etc. This embodiment is improved based on the traditional H-bridge structure, and the number of output levels is increased by adding an auxiliary unit, which is applicable to a wider range of applications, such as generators, high-power inverters, etc. At the same time, this embodiment uses fewer electronic components. The auxiliary unit shunts the freewheeling current during the operation of the four-switch H-bridge unit, avoiding the breakdown and failure of the power chips in the power semiconductor module caused by excessive reverse voltage, so that the power semiconductor module has higher performance, stability and safety.

[0030] As an alternative embodiment, such as Figure 4As shown, the four-switch H-bridge unit includes power chips Q1, Q2, Q3, and Q4, all of which are IGBT power chips. Preferably, power chips Q1 and Q3 are arranged on the same DBC substrate, and power chips Q2 and Q4 are arranged on different DBC substrates to facilitate the layout of the wiring terminals. It also includes FRD power chips D1, D2, D3, and D4. The FRD power chip is a fast recovery diode, which is a semiconductor diode with good switching characteristics and short reverse recovery time. It is mainly used in electronic circuits such as switching power supplies, PWM pulse width modulators, and frequency converters as a high-frequency rectifier diode, freewheeling diode, or damping diode. Power chips Q1, Q2, Q3, and Q4 are respectively connected in parallel with FRD power chips D1, D2, D3, and D4, which can improve the voltage withstand capacity of the IGBT power chip and ensure its electrical performance. Power chips Q1 and Q2 form the first power circuit; power chips Q3 and Q4 form the second power circuit, which is similar to the existing H-bridge circuit.

[0031] As an alternative embodiment, as Figure 4 shown, the four-switch H-bridge unit includes power chips Q1, Q2, Q3, and Q4, all of which are MOS transistors; power chips Q1 and Q2 form the first power circuit; power chips Q3 and Q4 form the second power circuit. That is, when the power chips are MOS transistors, there is no need to set FRD power chips, and the power chips can be selected as IGBT power chips or MOS transistors according to the actual usage scenario to improve the applicability of this embodiment.

[0032] As an alternative embodiment, as Figure 4 shown, the auxiliary unit includes diodes LB1, LB2, LB3, LB4, and power chip Q5. Preferably, power chip Q5 and diodes LB1, LB2, LB3, and LB4 are located on different DBC substrates. Diodes LB1 and LB2 are connected in series with each other and then connected in parallel with power chip Q5. Diodes LB3 and LB4 are connected in series with each other and then connected in parallel with power chip Q5. Preferably, diodes LB1, LB2 and diodes LB3, LB4 are respectively located on both sides of power chip Q5 and connected in parallel. The connection between diodes LB3 and LB4 is connected to the positive electrode of power supply U1, and the connection between diodes LB1 and LB2 is connected to the output terminal of the second power circuit, that is, connected to power chips Q1 and Q2. Through the above connection, the auxiliary unit can control and assist the power circuit to increase the level state.

[0033] As an alternative embodiment, as Figure 4 shown, the power chip Q5 is an IGBT power chip, and further includes an FRD power chip D5. The IGBT power chip Q5 is connected in parallel with the FRD power chip D5, which can improve the withstand voltage ability of the IGBT power chip and ensure its electrical performance. Alternatively, the power chip Q5 is a MOSFET power chip, and in this case, there is no need to connect an FRD power chip in parallel.

[0034] As an alternative embodiment, as Figure 4 shown, the wiring terminals include a power terminal E and a power terminal G. The emitters and gates of the power chips Q1, Q2, Q3, Q4, and Q5 are respectively connected to the power terminal E and the power terminal G. That is, the number of both the power terminal E and the power terminal G is 5, and they are respectively connected to the power chips Q1, Q2, Q3, Q4, and Q5. The power terminal E is used for sampling the emitter of the power chip to obtain the current and voltage operating parameters of the power chip, facilitating control operations. The power terminal G is used for controlling the switching state of the power chip. By connecting to the gate, the conduction and cutoff of the power chip can be controlled, thereby realizing the control of the entire power semiconductor module. Further, the power terminal E can be connected to the terminal U or the terminal V through an external circuit, so that the terminal of the emitter is coordinated with the external circuit and at the same time is connected to the collector of the power chip connected to the same bridge arm.

[0035] As an alternative embodiment, as Figure 4 shown, the power semiconductor module outputs power through the terminals U and V. The terminal V is connected to the first power circuit, and the terminal U is connected to the second power circuit. That is, the terminals U and V respectively correspond to the power outputs of two half-bridges. That is, the connection to an external load can be realized through the terminals U and V, thereby realizing the power output of the entire power semiconductor module.

[0036] As an alternative embodiment, as Figure 4 shown, the power semiconductor module further includes a sampling terminal I and a sampling terminal T, and the operating parameters of the power semiconductor module are detected through sampling. The sampling terminal I is a current sampling terminal, and the operating current of the power semiconductor module is detected through a current detection resistor, so that the current abnormality of the power semiconductor module can be detected in time, thereby ensuring a more stable operating state of the semiconductor module. The sampling terminal T is a temperature sampling terminal, which is used to detect the operating temperature of the semiconductor module. Preferably, the operating temperature is sampled through an NTC (Negative Temperature Coefficient) thermistor. By detecting the operating temperature of the power semiconductor module, the temperature abnormality of the semiconductor module can be found in time, thereby ensuring a more stable operating state.

[0037] As an alternative embodiment, as Figure 4 shown, the power semiconductor module further includes an electrical input terminal P(+) and an electrical output terminal P(-) for power supply access, that is, an external DC power supply is connected to the positive and negative electrodes through the terminals P(+) and P(-) respectively. Specifically, there are 2 terminals P(+) and 1 terminal P(-) in this embodiment. The terminal P(-) is separately connected to a DBC substrate and is located in the middle of the four-switch H-bridge unit and the auxiliary unit to facilitate power supply access to the auxiliary unit and the four-switch H-bridge unit. A current detection resistor is connected between the sampling terminal I and the electrical output terminal P(-). The electrical input terminal P(+) is used to connect to an external input power supply. The sampling terminal T is arranged at the edge of the power semiconductor module and can be on any side of the power semiconductor module, so as to facilitate temperature sampling.

[0038] As an alternative embodiment, the power semiconductor module is encapsulated with hard silicone gel or hard encapsulation resin, which has a lower cost than the epoxy encapsulation or ME4 plastic shell of the existing power semiconductor module.

[0039] The embodiment is only a special case and does not indicate that the present utility model has only such an implementation manner.

[0040] The above are only the preferred embodiments of the present utility model. Those skilled in the art know that without departing from the spirit and scope of the present utility model, various changes or equivalent replacements can be made to these features and embodiments. In addition, under the teaching of the present utility model, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the present utility model. Therefore, the present utility model is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application belong to the protection scope of the present utility model.

Claims

1. A multi-level power semiconductor module, characterized in that: It includes a first power circuit, a second power circuit, an auxiliary unit and a plurality of connection terminals; The first power circuit and the second power circuit form a four-switch H-bridge unit; The auxiliary unit is connected to the second power circuit and is used to increase the output level state of the power semiconductor module and shunt the freewheeling current of the four-switch H-bridge unit during operation; A number of the wiring terminals are connected to the four-switch H-bridge unit and the auxiliary unit, and are used for power supply access, power output, operation control and operation parameter detection of the power semiconductor module.

2. A multi-level power semiconductor module according to claim 1, characterized in that: The four-switch H-bridge unit includes power chip Q1, power chip Q2, power chip Q3, and power chip Q4, which are all IGBT power chips, and also includes FRD power chip D1, FRD power chip D2, FRD power chip D3, and FRD power chip D4; the power chip Q1, power chip Q2, power chip Q3, and power chip Q4 are respectively connected in parallel with the FRD power chip D1, FRD power chip D2, FRD power chip D3, and FRD power chip D4; the power chip Q1 and power chip Q2 form the first power circuit; the power chip Q3 and power chip Q4 form the second power circuit.

3. The multi-level power semiconductor module according to claim 1, characterized in that: The four-switch H-bridge unit includes power chip Q1, power chip Q2, power chip Q3, and power chip Q4, all of which are MOS tubes; the power chip Q1 and power chip Q2 form the first power circuit; the power chip Q3 and power chip Q4 form the second power circuit.

4. A multi-level power semiconductor module according to claim 2 or 3, characterized in that: The auxiliary unit includes a diode LB1, a diode LB2, a diode LB3, a diode LB4, and a power chip Q5; the diode LB1 and the diode LB2 are connected in series and then connected in parallel with the power chip Q5, and the diode LB3 and the diode LB4 are connected in series and then connected in parallel with the power chip Q5.

5. A multi-level power semiconductor module according to claim 4, characterized in that: The power chip Q5 is an IGBT power chip, and further includes an FRD power chip D5, wherein the IGBT power chip Q5 is connected in parallel with the FRD power chip D5; or The power chip Q5 is a MOSFET power chip.

6. A multi-level power semiconductor module according to claim 4, characterized in that: The connection terminals include a power terminal E and a power terminal G, and the emitters and gates of the power chips Q1, Q2, Q3, Q4 and Q5 are connected to the power terminals E and G respectively; the power terminal E is used for emitter sampling of the power chip, and the power terminal G is used for controlling the switching state of the power chip.

7. A multi-level power semiconductor module according to any one of claims 1 to 3, characterized in that: The power semiconductor module outputs power through a terminal U and a terminal V. The terminal V is connected to the first power circuit, and the terminal U is connected to the second power circuit.

8. A multi-level power semiconductor module according to any one of claims 1 to 3, characterized in that: The power semiconductor module further includes a sampling terminal I and a sampling terminal T. The sampling terminal I is a current sampling terminal for detecting the operating current of the power semiconductor module through a current sensing resistor. The sampling terminal T is a temperature sampling terminal for detecting the operating temperature of the power semiconductor module.

9. The multi-level power semiconductor module according to claim 8, characterized in that: The power semiconductor module also includes an electrical input terminal P(+) and an electrical output terminal P(-), the current sensing resistor is connected between the sampling terminal I and the electrical output terminal P(-), the electrical input terminal P(+) is used to connect to an external input power supply; the sampling terminal T is arranged at the edge of the power semiconductor module.

10. A multi-level power semiconductor module according to any one of claims 1 to 3, characterized in that: The power semiconductor module is packaged with hard silicone gel or hard packaging resin.

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