Direct-current input anti-reverse-connection protection circuit

Abstract

The utility model is suitable for the field of power electronic technology improvement, and provides a direct current input anti-reverse connection protection circuit, which comprises an input voltage detection control circuit and a relay control circuit, and the output end of the input voltage detection control circuit is connected with the input end of the relay control circuit. The detection control circuit ensures the reliability when the input connection is correct and reverse, and the current consumed by the sampling circuit can be less than 0.1 mA, so that the loss of the detection control circuit is very small or can be neglected, and the reverse connection prevention protection circuit is simple, applicable, high in reliability and very low in cost.

Description

Technical Field

[0001] The utility model belongs to the technical field of power electronics, and in particular relates to a direct current input anti-reverse connection protection circuit. Background Art

[0002] Currently, the industry's approach to input reverse polarity protection is to detect the input voltage polarity to control the on / off of a MOS tube in series in the input main power circuit. This provides reverse polarity protection when the input polarity is reversed. The input section is called the front stage, and the output section, isolated from the input section after power conversion, is called the back stage. Alternatively, a normally open relay is connected in series in the input main power circuit, with a start-up charging branch connected in parallel at both ends of the relay contacts. Figure 1 When the input polarity is reversed, the reverse blocking diode VD1 and the normally open relay contact K1 are maintained in the disconnected state to achieve anti-reverse polarity protection. However, there is a necessary prerequisite, that is, the relay K1 will not be attracted when the input polarity is reversed. Generally, the input voltage polarity needs to be connected correctly to establish the VCC voltage, that is, the front-stage auxiliary power supply requires the input voltage polarity to be connected correctly to work normally. In the actual use scenarios in the industry, there are many scenarios that require the input power supply of the DCDC power supply to be disconnected in the standby state, but the output control part needs to maintain communication with the host computer or transmit status information. For example, an on-board DCDC power supply with electrical isolation of input and output in the industry, the back-end part needs to be awakened by the on-board monitoring unit in the standby state before it can enter the working state. It is powered by the 24V battery on the vehicle, so the 24V battery is usually used as the input power supply of the back-end auxiliary power supply. The control circuit power supply VCC and the drive power supply on the front-end input side are both derived from the isolated output of the back-end auxiliary power supply. If the DCDC needs to enter the working state, it needs to be awakened. There are two common awakening methods. One is to wake up through CAN communication, and the back-end auxiliary power supply will keep working. The CAN communication circuit is continuously powered. The other method is to wake up the circuit through the high level of the enable signal. First, the auxiliary power supply of the subsequent stage is awakened. After the DCDC power supply works, it supplies power to the subsequent control circuit and the VCC and drive circuit of the previous stage control circuit. After the DCDC power supply is awakened, the subsequent stage gives the input relay K1 a control signal to attract the input relay K1. In this case, if the positive and negative polarity of the input are reversed, the reverse input will be short-circuited through the internal circuit and the already attracted contacts of the relay K1, which will damage the power components and blow the input fuse, that is, the anti-reverse polarity protection cannot be achieved. Utility Model Content

[0003] To address the above issues, the present invention proposes a preferred technical solution by adding a positive and negative polarity detection control circuit for the input voltage located before the input relay. When the input polarity is normal, the relay closes and closes normally according to the relay's control instructions. When the input polarity is reversed, the detection control circuit disconnects the input relay, thereby ensuring circuit reliability even when the input is reversed. The added detection control circuit ensures reliability both when the input is connected correctly and when it is reversed. The sampling circuit consumes very little current, resulting in negligible or negligible losses. The circuit is simple, applicable, and low-cost.

[0004] The utility model is implemented as follows: a DC input anti-reverse connection protection circuit, the DC input anti-reverse connection protection circuit includes an input voltage detection control circuit and a relay control circuit, the output end of the input voltage detection control circuit is connected to the input end of the relay control circuit.

[0005] A DC input reverse connection protection circuit includes: a normally open relay K1, an anti-parallel diode VD2 on the control line of the normally open relay K1, a slow start charging branch consisting of a diode VD1 and a resistor R1 in series, an input voltage detection control circuit, a relay control circuit, a control optocoupler D1 and a resistor R8;

[0006] Furthermore, the anode of the diode VD1, one contact of the normally open relay K1 and one end of the input voltage detection control circuit are connected to the positive input VIN_P, the cathode of the diode VD1 is connected to one end of the resistor R1, and the other end of the resistor R1 is connected to the other contact of the normally open relay K1 to form the output voltage VIN_1;

[0007] Furthermore, the other end of the input voltage detection control circuit is connected to the negative input VIN_N, where the negative input is also the previous stage working ground GND1, and the output signal end of the input voltage detection control circuit is connected to the relay control circuit;

[0008] Furthermore, the output end of the relay control circuit is connected to one end of the control coil of the normally open relay K1 and the anode of the diode VD2. The other end of the control coil of the normally open relay K1 and the cathode of the diode VD2 are connected to the power supply VCC. This power supply VCC is one of the isolated outputs of the subsequent auxiliary power supply. The relay control circuit is connected to the 4th and 3rd pins of the control optocoupler D1. The 1st pin of the optocoupler D1 is connected to one end of the resistor R8. The other end of the resistor R8 is connected to the control signal CTL_K1_SEC given by the subsequent control unit circuit. The 2nd pin of the control optocoupler D1 is connected to the subsequent control ground GNDS.

[0009] Furthermore, the resistor R1 may also be a cement resistor, a positive temperature coefficient resistor PTC, a negative temperature coefficient resistor NTC or other dedicated integrated resistors with heat sinks;

[0010] A further technical solution of the present utility model is: the input voltage detection control circuit includes a resistor R4, a resistor R6, a resistor R7, a MOS transistor VT2 and a voltage regulator diode VD3, one end of the resistor R4 is connected to one end of the resistor R7 via the resistor R6, the other end of the resistor R7 is respectively connected to the gate of the MOS transistor and the cathode of the voltage regulator diode VD3, and the source of the MOS transistor VT2 and the anode of the voltage regulator diode VD3 are respectively grounded.

[0011] A further technical solution of the present utility model is: the relay control circuit includes a transistor VT1, a resistor R3, a capacitor C1, a resistor R2 and a resistor R5, the emitter of the transistor VT1 is connected to the drain of the MOS tube VT2, the base of the transistor VT1 is respectively connected to one end of the resistor R3, one end of the capacitor C1 and one end of the resistor R2, the other end of the resistor R3 and the other end of the capacitor C1 are respectively grounded, and one end of the resistor R5 is connected to the power supply VCC+12V.

[0012] In addition, if a specific anti-reverse polarity protection function is implemented, the VCC and control unit circuits of the associated post-stage auxiliary power supply isolation output are also required, which are not described in detail here.

[0013] The working principle of this utility model is specifically described as follows:

[0014] When the DCDC power supply is started and enters the working state, the host computer will send a wake-up signal to wake up the DCDC power supply. Figure 2 The VCC in the circuit has a normal power supply voltage. At this time, the subsequent stage gives a high-level signal CTL_K1_SEC, which is a pull-in signal for the previous stage relay K1.

[0015] First, when the input positive and negative polarity connections are normal, that is, VIN_P is connected to the input positive terminal voltage, and VIN_N is connected to the input negative terminal voltage, at this time, the input voltage detection control circuit detects that the input power supply connection is correct, and the input voltage detection control circuit outputs a signal to the relay control circuit that the relay K1 can be attracted. At the same time, the input voltage passes through the diode VD1 and the resistor R1 to slowly start charging the output terminal VIN_1;

[0016] Furthermore, the output of the relay control circuit is controlled by the output signal of the input voltage detection control circuit and the CTL_K1_SEC signal given by the subsequent stage. Only when the CTL_K1_SEC signal given by the subsequent stage is high and the input voltage detection control circuit outputs the pull-in signal level, the relay control circuit output is low. In any other state, the relay control circuit output is high, that is, the normally open relay K1 is disconnected.

[0017] Furthermore, the end of the relay control circuit connected to the anode of VD2 and one end of the control wire package of the normally open relay K1 is the output end of the relay control circuit. When the output end of the relay control circuit is at a low level, the normally open relay K1 is energized.

[0018] Furthermore, when the relay control circuit receives the high-level control signal CTL_K1_SEC given by the subsequent stage through the optocoupler D1, the relay control circuit must output a low level after an appropriate delay. This delay time is used to ensure that the input voltage slowly starts and charges the output terminal VIN_1 through the diode VD1 and the resistor R1 until the output terminal VIN_1 voltage is basically equal to the input VIN_P voltage, so as to achieve zero-voltage closure of the two contacts of the normally open relay K1, reduce the instantaneous current when the normally open relay K1 is closed, and improve reliability. After that, the front-stage main power circuit of the DCDC power supply enters the normal working mode after slow startup.

[0019] Second, when the input polarity is reversed, that is, VIN_P is connected to the input negative voltage and VIN_N is connected to the input positive voltage, the input voltage detection control circuit detects that the input power supply connection is reversed, and the input voltage detection control circuit outputs a signal to the relay control circuit that the normally open relay K1 is disconnected. Therefore, the relay control circuit outputs a high level, that is, the normally open relay K1 remains disconnected. At the same time, the input reverse voltage is reversely blocked by the diode VD1. Therefore, when the input is reversed, there is no adverse effect on the reliability of the DCDC power supply circuit, and the anti-reverse protection is effectively achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a principle block diagram of the prior art;

[0021] Figure 2 This is a principle block diagram of a DC input anti-reverse connection protection circuit provided by the utility model.

[0022] Figure 3 This is a circuit diagram of an embodiment of the principle diagram of the input anti-reverse connection protection circuit provided by the utility model. DETAILED DESCRIPTION

[0023] In order to make the technical means implemented by the present invention clear, the following Figure 3 Further explain the principle of this utility model Figure 2 The specific implementation method of the present invention will not be further elaborated on the main power circuit and the front and rear stage control circuits that need to be related thereto.

[0024] like Figure 2As shown in Figure 3, the input reverse connection protection circuit provided by the present invention includes: a normally open relay K1, an anti-parallel diode VD2 on the control line of the normally open relay K1, a slow start charging branch composed of a resistor R1 in series with the diode VD1, an input voltage detection control circuit, a relay control circuit and a control optocoupler D1;

[0025] Specifically, refer to Figure 3 , the anode of diode VD1, one contact of normally open relay K1 and one end of resistor R4 are connected to the positive input VIN_P, the cathode of diode VD1 is connected to one end of resistor R1, and the other end of resistor R1 is connected to the other contact of normally open relay K1 to form the output voltage VIN_1;

[0026] Furthermore, the other end of the resistor R4 is connected to one end of the resistor R6, the other end of the resistor R6 is connected to one end of the resistor R7, the other end of the resistor R7 is connected to the base of the NMOS transistor VT2 and the cathode of the voltage-stabilizing diode VD3, the anode of the voltage-stabilizing diode VD3 and the source of the NMOS transistor VT2 are connected to the front-stage working ground GND1 (VIN_N), and the drain of the NMOS transistor VT2 is connected to the emitter of the NPN transistor VT1;

[0027] Furthermore, the base of the NPN transistor VT1 is connected to one end of the resistor R3, one end of the capacitor C1, and one end of the resistor R2. The other end of the resistor R3 and the other end of the capacitor C1 are connected to the front-stage working ground GND1. The other end of the resistor R2 is connected to the third pin of the control optocoupler D1. The fourth pin of the control optocoupler is connected to one end of the resistor R5. The other end of the resistor R5 is connected to the power supply VCC+12V. The collector of the NPN transistor VT1 is connected to the anode of the diode VD2 and one end of the control wiring package of the normally open relay K1. The cathode of the diode VD2 and the other end of the control wiring package of the normally open relay K1 are connected to the power supply VCC+12V.

[0028] Furthermore, the first pin of the control optocoupler D1 is connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the control signal CTL_K1_SEC. This signal CTL_K1_SEC is a signal given by the subsequent control unit circuit for controlling the normally open relay K1 to be attracted or disconnected. The second pin of the control optocoupler D1 is connected to the subsequent working ground GNDS.

[0029] Specific embodiment of the utility model Figure 3 The working principle is described as follows:

[0030] VCC+12V is the power supply voltage for the isolated output of the subsequent auxiliary power supply;

[0031] First, when the input positive and negative polarity connections are normal, the driving voltage VGS applied to the gate-source pin of the NMOS tube VT2 is the regulated voltage value of the voltage regulator diode VD3, and the drain of the NMOS tube VT2 is at a low level. At the same time, the input voltage passes through the diode VD1 and the resistor R1 to slowly start charging the output terminal VIN_1. When the post-stage control signal CTL_K1_SEC changes from a low level to a high level, the NPN transistor VT1 is turned on after a delay, so that the collector of VT1 changes from a high level to a low level, and the normally open relay K1 is energized. After that, the front-stage main power circuit of the DCDC power supply starts to start working.

[0032] Furthermore, the conduction delay time of the NPN transistor VT1 is determined by the current flowing between the 4th and 3rd pins of the control optocoupler D1 to charge the capacitor C1 in parallel with the resistor R3 to the BE junction conduction threshold of the NPN transistor VT1. The conduction delay time of the NPN transistor VT1 needs to be sufficient to ensure that the input is charged to the output terminal VIN_1 through the diode VD1 and the series resistor R1 to a voltage that is basically equal to the input terminal voltage VIN_P, ensuring that the voltage difference between the two contacts is basically zero when the normally open relay K1 is energized, so as to reduce the current flowing through the contacts of the normally open relay K1 at the instant of energization.

[0033] Second, when the positive and negative polarity of the input are reversed, that is, VIN_P is connected to the input negative terminal voltage, and VIN_N is connected to the input positive terminal voltage. At this time, the driving voltage VGE applied to the gate-source pin of the NMOS tube VT2 is about -0.7V, and the NMOS tube VT2 is cut off. It can be considered that the drain of the NMOS tube VT2 is at a high level. At this time, the reverse input voltage is applied between the two contacts of the normally open relay, and is also reversely applied to the diode VD1 and reversely blocked by the diode VD1. When the subsequent control signal CTL_K1_SEC changes from a low level to a high level, the NPN transistor VT1 maintains the cut-off state, thereby maintaining the normally open relay K1 in the cut-off state. Therefore, when the input is reversed, there is no adverse effect on the reliability of the DCDC power supply circuit, and reliable anti-reverse protection is achieved.

[0034] The detection and control circuit ensures reliability when the input connection is correct or reversed. The sampling circuit consumes less than 0.1mA of current, so the detection and control circuit loss is very small or negligible. The anti-reverse connection protection circuit is simple and applicable, highly reliable, and low cost.

[0035] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A DC input reverse connection protection circuit, characterized in that: The input reverse connection protection circuit includes an input voltage detection control circuit and a relay control circuit, and the output end of the input voltage detection control circuit is connected to the input end of the relay control circuit.

2. The DC input anti-reverse connection protection circuit according to claim 1, characterized in that: The input voltage detection control circuit includes a resistor R4, a resistor R6, a resistor R7, a MOS transistor VT2 and a voltage stabilizing diode VD3. One end of the resistor R4 is connected to one end of the resistor R7 via the resistor R6. The other end of the resistor R7 is respectively connected to the gate of the MOS transistor and the cathode of the voltage stabilizing diode VD3. The source of the MOS transistor VT2 and the anode of the voltage stabilizing diode VD3 are respectively grounded.

3. The DC input anti-reverse connection protection circuit according to claim 2, characterized in that: The relay control circuit includes a transistor VT1, a resistor R3, a capacitor C1, a resistor R2, and a resistor R5. The emitter of the transistor VT1 is connected to the drain of the MOS transistor VT2. The base of the transistor VT1 is respectively connected to one end of the resistor R3, one end of the capacitor C1, and one end of the resistor R2. The other ends of the resistor R3 and the other ends of the capacitor C1 are respectively grounded. One end of the resistor R5 is connected to the power supply VCC+12V.

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