PM chip detection circuit and detection system

Abstract

The utility model discloses a PM chip detection circuit and detection system in the technical field of chip testing, which comprises a PM chip, an electrode 1, an electrode 2, an electrode 3 and an electrode 4 of the PM chip, and further comprises a first processing circuit and a second processing circuit, a switching circuit for controlling the supply voltage to pass through the first processing circuit or the second processing circuit; the single chip microcomputer is used for controlling the switching circuit and calculating the resistance value between the electrode 1 and the electrode 4, the resistance value between the electrode 2 and the electrode 3 or the resistance value between the electrode 1 and the electrode 3 according to the corresponding sampling voltage of the first processing circuit or the second processing circuit; short circuit, open circuit and resistance performance automatic batch detection can be carried out, the detection efficiency is improved, and manual errors are reduced; the circuit is low in cost, ingenious in circuit principle, reliable in function and simple and intelligent to operate.

Description

Technical Field

[0001] The utility model relates to the technical field of chip testing, in particular to a PM chip detection circuit and a detection system. Background Art

[0002] PM stands for particulate matter. Scientists use PM2.5 to represent the amount of this particulate matter per cubic meter of air. The higher the value, the more severe the air pollution.

[0003] PM chips such as Figure 1 As shown, under normal circumstances, the resistance between electrodes 1 and 4, and between electrodes 2 and 3, is approximately 10Ω. The resistance between electrodes 1 and 3 is infinite (greater than 50MΩ). Before leaving the factory, PM chips need to be tested for short circuit, open circuit, and resistance performance between electrodes 1 and 4, electrodes 2 and 3, and electrodes 1 and 3.

[0004] The original PM chip detection uses a multimeter to measure chip short circuit, open circuit, and the resistance range of the chip resistor. This is inefficient, has incomplete detection functions, and is not conducive to mass production. Utility Model Content

[0005] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and in the abstract and title of the present invention to avoid obscuring the purpose of this section, the abstract and the title of the utility model, and such simplifications or omissions shall not be used to limit the scope of the present invention.

[0006] Therefore, the purpose of the present invention is to provide a PM chip detection circuit and detection system, which can perform automatic batch detection of short circuit, open circuit and resistance performance, improve detection efficiency and reduce manual errors; the circuit is low-cost, the circuit principle is ingenious, the function is reliable, and the operation is simple and intelligent.

[0007] To solve the above technical problems, the present invention provides a PM chip detection circuit, which adopts the following technical solution: it includes a PM chip and electrodes 1, electrode 2, electrode 3 and electrode 4 of the PM chip, and also includes a first processing circuit and a second processing circuit; a switching circuit is used to control the power supply voltage to pass through the first processing circuit or the second processing circuit; a single-chip microcomputer is used to control the switching circuit and calculate the resistance between electrode 1 and electrode 4, the resistance between electrode 2 and electrode 3, or the resistance between electrode 1 and electrode 3 according to the corresponding sampling voltage of the first processing circuit or the second processing circuit.

[0008] Optionally, the switching circuit includes a field effect transistor Q5, a field effect transistor Q6 and a field effect transistor Q7, the drain of the field effect transistor Q5 is connected to electrode 4, the power supply voltage end is connected to electrode 1 and the drain of the field effect transistor Q6, the source of the field effect transistor Q6 is connected to electrode 2, the drain of the field effect transistor Q7 is connected to electrode 3 and the second processing circuit, and the source of the field effect transistor Q5 and the source of the field effect transistor Q7 are connected to the first processing circuit.

[0009] Optionally, the gates of the field effect transistor Q5, the field effect transistor Q6 and the field effect transistor Q7 are respectively connected to the Mos1 terminal, the Mos2 terminal and the Mos3 terminal of the single chip microcomputer.

[0010] Optionally, the single chip microcomputer includes a first AD sampler for collecting a sampled voltage output by the first processing circuit; and a second AD sampler for collecting a sampled voltage output by the second processing circuit.

[0011] Optionally, the first processing circuit includes a voltage divider resistor R40, the source of the field effect transistor Q5 and the source of the field effect transistor Q7 are connected to the first end of the voltage divider resistor R40 and the first end of the resistor R45, the second end of the resistor R45 is connected to the in-phase pin of the operational amplifier U3A, the inverting pin of the operational amplifier U3A is connected to the first end of the resistor R42 and the first end of the resistor R43, the output pin of the operational amplifier U3A is connected to the second end of the resistor R43 and the first end of the resistor R41, and the second end of the resistor R41 is connected to the capacitor C15 and the first AD sampler.

[0012] Optionally, the second processing circuit includes a voltage divider resistor R13, the drain of the field effect transistor Q7 and the electrode 3 are connected to the first end of the voltage divider resistor R13 and the first end of the resistor R9, the second end of the resistor R45 is connected to the capacitor C12 and the in-phase pin of the operational amplifier U3B, the inverting pin of the operational amplifier U3B is connected to the first end of the resistor R15, the output pin of the operational amplifier U3B is connected to the second end of the resistor R15 and the first end of the resistor R12, and the second end of the resistor R12 is connected to the capacitor C14 and the second AD sampler.

[0013] A PM chip detection system includes a plurality of chip detection circuits as described above, each chip detection circuit is connected to a corresponding PM chip, and the plurality of chip detection circuits are connected to a computer host computer having a single-chip microcomputer.

[0014] Optionally, a multi-station detection fixture is also included, with a PM chip installed at each station.

[0015] In summary, the present invention has at least one of the following beneficial effects:

[0016] The utility model can simultaneously perform short-circuit, open-circuit, and resistance performance automatic batch detection on the resistance between electrodes 1 and 4 of a PM chip, the resistance between electrodes 2 and 3, and the resistance between electrodes 1 and 3 through a chip detection circuit, thereby improving detection efficiency and reducing manual errors; the circuit is low-cost, the circuit principle is ingenious, the function is reliable, and the operation is simple and intelligent. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 Schematic diagram of the PM chip structure;

[0019] Figure 2 This is a schematic diagram of the PM chip detection circuit of the utility model;

[0020] Figure 3 This is a schematic diagram of a circuit for detecting the resistance between electrode 1 and electrode 4 according to the present invention;

[0021] Figure 4 This is a schematic diagram of a circuit for detecting the resistance between electrode 2 and electrode 3 according to the present invention;

[0022] Figure 5 This is a schematic diagram of a circuit for detecting the resistance between electrode 1 and electrode 3 according to the present invention;

[0023] Figure 6 This is the structural block diagram of the PM chip detection system of the utility model;

[0024] Figure 7 This is a schematic diagram of the actual measurement interface of the computer host computer of this utility model. DETAILED DESCRIPTION

[0025] The following will combine the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all the embodiments. All other embodiments obtained by ordinary technicians in this field without making creative work based on the embodiments in the present invention fall within the scope of protection of the present invention.

[0026] In the description of this utility model, it should be noted that the terms "upper," "lower," "inner," "outer," "top / bottom," and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this utility model and simplify the description. They are not intended to indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this utility model. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0027] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "provided with," "mounted / connected," and "connected" should be understood in a broad sense. For example, "connected" can mean a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be internal communication between two components. For those skilled in the art, the specific meanings of the above terms in this utility model can be understood according to the specific circumstances.

[0028] Example 1

[0029] Reference Figure 2 The utility model discloses a PM chip detection circuit, including a PM chip and electrodes 1, electrode 2, electrode 3 and electrode 4 of the PM chip, and also including a first processing circuit and a second processing circuit; a switching circuit, used to control the power supply voltage to pass through the first processing circuit or the second processing circuit; a single-chip microcomputer, used to control the switching circuit and calculate the resistance between electrode 1 and electrode 4, the resistance between electrode 2 and electrode 3, or the resistance between electrode 1 and electrode 3 according to the corresponding sampling voltage of the first processing circuit or the second processing circuit.

[0030] In detail, in this embodiment, the switching circuit includes a field-effect transistor (FET) Q5, a field-effect transistor (FET) Q6, and a field-effect transistor (FET) Q7. The drain of the field-effect transistor (FET) Q5 is connected to electrode 4, the power supply terminal is connected to electrode 1 and the drain of the field-effect transistor (FET) Q6, the source of the field-effect transistor (FET) Q6 is connected to electrode 2, the drain of the field-effect transistor (FET) Q7 is connected to electrode 3 and the second processing circuit, and the source of the field-effect transistor (FET) Q5 and the source of the field-effect transistor (FET) Q7 are connected to the first processing circuit. The gates of the field-effect transistors (FET) Q5, Q6, and Q7 are connected to the MOSFET 1, MOSFET 2, and MOSFET 3 terminals of the microcontroller, respectively.

[0031] In detail, in this embodiment, the single chip microcomputer includes a first AD sampler for collecting the sampled voltage output by the first processing circuit; and a second AD sampler for collecting the sampled voltage output by the second processing circuit.

[0032] The first processing circuit includes a voltage-dividing resistor R40, the source of the field-effect transistor Q5 and the source of the field-effect transistor Q7 are connected to the first end of the voltage-dividing resistor R40 and the first end of the resistor R45, the second end of the resistor R45 is connected to the in-phase pin of the operational amplifier U3A, the inverting pin of the operational amplifier U3A is connected to the first end of the resistor R42 and the first end of the resistor R43, the output pin of the operational amplifier U3A is connected to the second end of the resistor R43 and the first end of the resistor R41, and the second end of the resistor R41 is connected to the capacitor C15 and the first AD sampler.

[0033] The second processing circuit includes a voltage-dividing resistor R13, the drain of the field-effect transistor Q7 and the electrode 3 are connected to the first end of the voltage-dividing resistor R13 and the first end of the resistor R9, the second end of the resistor R45 is connected to the capacitor C12 and the non-inverting pin of the operational amplifier U3B, the inverting pin of the operational amplifier U3B is connected to the first end of the resistor R15, the output pin of the operational amplifier U3B is connected to the second end of the resistor R15 and the first end of the resistor R12, and the second end of the resistor R12 is connected to the capacitor C14 and the second AD sampler.

[0034] Working principle:

[0035] When measuring the resistance between electrode 1 and electrode 4, the single chip microcomputer controls the field effect tube Q5 to be turned on, and the field effect tube Q6 and field effect tube Q7 to be turned off. The simplified circuit is as follows Figure 3 As shown,

[0036] The circuit is powered by a 36V voltage, which is divided by the measured electrode Rh and the sampling resistor R40. After passing through the operational amplifier U3A, the voltage signal is sent to the single-chip microcomputer. After the first AD sampler collects the voltage Vh, the single-chip microcomputer calculates and obtains the resistance value of the measured resistor between electrode 1 and electrode 4, Rh = (36 R42 / Vh (R42+R43))-R40.

[0037] When measuring the resistance between electrode 2 and electrode 3, the single chip microcomputer controls the field effect tube Q5 to be cut off, the field effect tube Q6 and the field effect tube Q7 to be turned on, and the power supply voltage does not pass through the operational amplifier U3B. After the field effect tube Q7 is turned on, the voltage divider resistor R13 is equivalent to being directly short-circuited to the ground. At this time, the operational amplifier U3B is invalid, and U3A is responsible for sampling. The simplified circuit is as follows Figure 4 As shown,

[0038] The circuit is powered by a 36V voltage, which is divided by the electrode under test Rs and the sampling resistor R40. After passing through the operational amplifier U3A, the voltage signal is sent to the microcontroller. After the first AD sampler collects the voltage Vh, the microcontroller calculates and obtains the resistance value of the measured resistor between electrode 2 and electrode 3, Rs = (36 R42 / Vh (R42+R43))-R40.

[0039] When measuring the resistance between electrode 1 and electrode 3, the single chip microcomputer controls the field effect transistor Q5, field effect transistor Q6 and field effect transistor Q7 to be cut off. The simplified circuit is as follows Figure 5 As shown,

[0040] The circuit is supplied with a voltage of 36V, which is divided by the electrode to be measured Rn and the sampling resistor R40. After passing through the operational amplifier U3B, the voltage signal is sent to the single-chip microcomputer. After the second AD sampler collects the voltage Vn, the single-chip microcomputer calculates and obtains the resistance value of the measured resistor between electrode 1 and electrode 3, Rn = 36 / (Vn R13)-R13.

[0041] Example 2

[0042] Reference Figure 6 Based on the same concept as the above embodiment 1, it also includes a PM chip detection system, a PM chip detection system includes multiple chip detection circuits as described above, each chip detection circuit is connected to a PM chip, and multiple chip detection circuits are connected to a computer host computer with a single-chip microcomputer.

[0043] It also includes a multi-station detection fixture, with a PM chip installed at each station.

[0044] The number of stations of a multi-station detection fixture can be designed according to actual needs. In this embodiment, an eight-station detection fixture is used, and a PM chip is installed in each station. When detecting the PM chip, the PM chip is placed in each station of the eight-station detection fixture and clamped. The multiple chip detection circuits are powered on, and the computer host control software is operated to allow the circuit to automatically detect short circuits, open circuits, and the resistance range of the chip resistor wire of the tested chip, and upload them to the computer host. The qualified tested chips are screened out by the software, and the test interface is as follows: Figure 7 shown.

[0045] The above are all preferred embodiments of the present invention, and are not intended to limit the scope of protection of the present invention. Therefore, any equivalent changes made based on the structure, shape, and principle of the present invention should be included in the scope of protection of the present invention.

Claims

1. A PM chip detection circuit, comprising a PM chip and electrodes 1, 2, 3, and 4 of the PM chip, characterized in that: Also includes a first processing circuit and a second processing circuit; a switch circuit, configured to control the supply voltage to pass through the first processing circuit or the second processing circuit; The single chip microcomputer is used to control the switch circuit and calculate the resistance between electrode 1 and electrode 4, the resistance between electrode 2 and electrode 3, or the resistance between electrode 1 and electrode 3 according to the corresponding sampled voltage of the first processing circuit or the second processing circuit.

2. A PM chip detection circuit according to claim 1, characterized in that: The switching circuit includes a field effect transistor Q5, a field effect transistor Q6 and a field effect transistor Q7, the drain of the field effect transistor Q5 is connected to the electrode 4, the power supply voltage end is connected to the electrode 1 and the drain of the field effect transistor Q6, the source of the field effect transistor Q6 is connected to the electrode 2, the drain of the field effect transistor Q7 is connected to the electrode 3 and the second processing circuit, and the source of the field effect transistor Q5 and the source of the field effect transistor Q7 are connected to the first processing circuit.

3. The PM chip detection circuit according to claim 2, characterized in that: The gates of the field effect transistor Q5, the field effect transistor Q6 and the field effect transistor Q7 are connected to the Mos1 terminal, the Mos2 terminal and the Mos3 terminal of the single chip computer respectively.

4. The PM chip detection circuit according to claim 3, characterized in that: The single chip microcomputer includes A first AD sampler, configured to collect a sampled voltage output by the first processing circuit; The second AD sampler is used to collect the sampled voltage output by the second processing circuit.

5. The PM chip detection circuit according to claim 4, characterized in that: The first processing circuit includes a voltage-dividing resistor R40, the source of the field-effect transistor Q5 and the source of the field-effect transistor Q7 are connected to the first end of the voltage-dividing resistor R40 and the first end of the resistor R45, the second end of the resistor R45 is connected to the in-phase pin of the operational amplifier U3A, the inverting pin of the operational amplifier U3A is connected to the first end of the resistor R42 and the first end of the resistor R43, the output pin of the operational amplifier U3A is connected to the second end of the resistor R43 and the first end of the resistor R41, and the second end of the resistor R41 is connected to the capacitor C15 and the first AD sampler.

6. The PM chip detection circuit according to claim 4, characterized in that: The second processing circuit includes a voltage-dividing resistor R13, the drain of the field-effect transistor Q7 and the electrode 3 are connected to the first end of the voltage-dividing resistor R13 and the first end of the resistor R9, the second end of the resistor R45 is connected to the capacitor C12 and the non-inverting pin of the operational amplifier U3B, the inverting pin of the operational amplifier U3B is connected to the first end of the resistor R15, the output pin of the operational amplifier U3B is connected to the second end of the resistor R15 and the first end of the resistor R12, and the second end of the resistor R12 is connected to the capacitor C14 and the second AD sampler.

7. A PM chip detection system, characterized by: It comprises a plurality of chip detection circuits according to any one of claims 1 to 6, each chip detection circuit is connected to a corresponding PM chip, and the plurality of chip detection circuits are connected to a computer host computer having a single-chip microcomputer.

8. The PM chip detection system according to claim 7, characterized in that: It also includes a multi-station detection fixture, with a PM chip installed at each station.

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