Engine rotation speed processing device

Abstract

The utility model relates to an engine rotating speed processing device, which belongs to the technical field of rotating speed acquisition and processing and comprises a frequency division amplifier, the frequency division amplifier amplifies and shapes rotating speed signals into square waves, simultaneously can divide the signals in proportion, divides the rotating speed signals into two parts after processing, and outputs the two parts to a controller for use. According to the utility model, the digital logic circuit is adopted to collect the input rotating speed and divide the collected rotating speed into two parts, so that different control systems can obtain the same rotating speed signal, and the redundancy control is more reliable; and meanwhile, the collected rotating speed signal is processed into a 4-20mA signal for on-site display or upper computer display.

Description

Technical Field

[0001] The utility model relates to an engine speed control technology, belongs to the technical field of speed acquisition and processing, and particularly relates to an engine speed processing device. Background Art

[0002] With the continuous advancement of technology, engine control systems are increasingly being used in the automotive, aviation, and marine industries. Speed ​​sensors play a crucial role in these control systems, monitoring engine speed in real time and providing accurate speed signals to the controller. However, due to the significant speed variations among engines with different gear counts, accurately and efficiently processing speed signals has become a technical challenge.

[0003] Existing speed signal processing devices have certain limitations, such as the inability to simultaneously process signals collected by magnetoelectric and Hall-effect speed sensors, as well as insufficient flexibility in signal amplification and scaling. This can lead to errors in the output speed and 4-20mA signals in practical applications, affecting engine control effectiveness. Utility Model Content

[0004] The purpose of the utility model is to provide an engine speed processing device, which has the advantages of simple structure, stable performance, convenient adjustment, etc. and is expected to be widely used in the field of engine control.

[0005] In order to achieve the above-mentioned purpose, the technical solution of the present invention provides an engine speed processing device, including a frequency division amplifier, which amplifies the speed signal into a square wave and can also divide the signal proportionally. After processing, the speed signal is divided into two and output to the controller for use.

[0006] Preferably, the frequency dividing amplifier can process a sine wave frequency signal and a square wave frequency signal.

[0007] Preferably, the frequency dividing amplifier can amplify or reduce the generated square wave frequency signal by 3 or 5 times in equal proportion.

[0008] Preferably, the frequency dividing amplifier can be adjusted by an internal dial to stabilize the output speed signal and the output 4-20mA signal.

[0009] Preferably, the signal received by the frequency dividing amplifier is amplified by an operational amplifier and then enters the voltage leveling module to convert the frequency signal into a voltage signal.

[0010] Preferably, the operational amplifier can process a minimum 30mV sine wave signal and convert it into a stable 15V square wave.

[0011] Preferably, it also includes a voltage leveling module, and the signal processed by the operational amplifier enters the voltage leveling module to convert the frequency signal into a voltage signal.

[0012] Preferably, a resistor network is further included to amplify or reduce the voltage signal to achieve adjustment of the speed signal.

[0013] Preferably, the current adjustment range is from 4mA to 20mA, where 4mA corresponds to the lowest frequency 0Hz and 20mA corresponds to the highest frequency 1500Hz.

[0014] Preferably, the adjusted signal is transmitted to the speed governor, which scales down or amplifies the signal as needed to ensure the accuracy and stability of the engine speed.

[0015] In summary, the present invention has the following beneficial technical effects:

[0016] This speed processing device can simultaneously process both magnetoelectric speed sensors (sine wave frequency signals) and Hall effect speed sensors (square wave frequency signals), enhancing its versatility. Using a frequency divider amplifier, the device can proportionally amplify or reduce the signal by 3 or 5 times, meeting the processing requirements of various engine speed signals. Internal frequency divider adjustment is simple, making it suitable for engines with varying gear counts. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the engine speed processing device of the utility model;

[0018] Figure 2 This is a partial schematic diagram of the frequency division amplifier in the engine speed processing device of the present invention;

[0019] Figure 3 This is another schematic diagram of the frequency division amplifier in the engine speed processing device of the present invention. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0021] The embodiment of the utility model discloses an engine speed processing device, which includes a frequency dividing amplifier.

[0022] The speed sensor inputs the collected speed signal into the speed processing device, which amplifies the speed signal into a square wave through a frequency division amplifier and reduces the signal proportionally (frequency division). After processing, the speed signal is divided into two and output to the controller for use.

[0023] Specifically, the speed processing device processes signals collected by the magnetoelectric speed sensor (sine wave frequency signal) and the Hall effect speed sensor (square wave frequency signal), and can proportionally amplify or reduce the generated square wave frequency signal by 3 or 5 times. The frequency division can be adjusted via an internal dial to adapt to engines with different gear counts. This frequency division controls the output speed within a relatively accurate range, ensuring more accurate output speed signals and 4-20mA signals.

[0024] The frequency signal after frequency division is processed by hardware and outputs two identical frequency signals. At the same time, it is processed and outputs a 4-20mA signal for speed display. The speed range of this signal can be adjusted through two sliding resistors to match the tachometer or host computer.

[0025] Reference Figure 2 and Figure 3 The speed signal output by the speed sensor at point B is first amplified by operational amplifier IC1C and then output through ports K and M. The system can process a sine wave signal as low as 30mV and convert it into a stable 15V square wave, ensuring a more stable output signal at ports K and M.

[0026] The output signals from ports K and M then enter the voltage-smoothing module, which converts the frequency signal into a voltage signal. A resistor network then amplifies or reduces the voltage signal appropriately to adjust the speed signal. This provides a speed signal within the appropriate frequency range of 0 to 1500 Hz for devices such as the engine controller.

[0027] The PUL signal is obtained by processing the signal output from the K terminal. The signal is adjusted to a suitable frequency range, generally 0-1500Hz. This processed signal is used to adjust the output signal of J7.1 through resistors P7 and P8.

[0028] Specifically, resistors P7 and P8 adjust the output current to match the corresponding frequency width. The current adjustment range is from 4mA to 20mA, with 4mA corresponding to a minimum frequency of 0Hz and 20mA corresponding to a maximum frequency of 1500Hz. This design allows the system to output a current signal that corresponds to frequency changes, achieving precise control.

[0029] Finally, these adjusted signals are sent to the speed governor, which scales or amplifies the signals as needed to ensure accurate and stable engine speed.

[0030] The utility model realizes the speed division into two parts, solves the technical problem of the redundancy of the speed signal, and realizes the speed redundancy of the dual controller without changing the number of speed sensors. The utility model adopts pure hardware construction, which is more reliable, and has the function of frequency division adjustment to adapt to engines with different numbers of teeth, making the output speed more accurate.

[0031] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or make equivalent replacements for some of the technical features therein. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An engine speed processing device, characterized in that: It includes a frequency divider amplifier, which amplifies the speed signal into a square wave and divides the signal proportionally. After processing, the speed signal is divided into two and output to the controller for use; the frequency divider amplifier can process sinusoidal wave frequency signals and square wave frequency signals.

2. The engine speed processing device according to claim 1, characterized in that: The frequency division amplifier can amplify or reduce the generated square wave frequency signal by 3 or 5 times in equal proportion.

3. The engine speed processing device according to claim 2, characterized in that: The frequency divider amplifier can be adjusted through the internal dial to output the speed signal and the 4-20mA signal.

4. The engine speed processing device according to claim 3, characterized in that: The signal received by the frequency divider amplifier is amplified by the operational amplifier and then enters the voltage leveling module to convert the frequency signal into a voltage signal.

5. The engine speed processing device according to claim 4, characterized in that: The operational amplifier can process a sine wave signal as low as 30mV and convert it into a 15V square wave.

6. The engine speed processing device according to claim 5, characterized in that: It also includes a voltage leveling module. The signal processed by the operational amplifier enters the voltage leveling module and converts the frequency signal into a voltage signal.

7. The engine speed processing device according to claim 6, characterized in that: It also includes a resistor network to amplify or reduce the voltage signal to achieve adjustment of the speed signal.

8. The engine speed processing device according to claim 7, characterized in that: The current adjustment range is from 4mA to 20mA, where 4mA corresponds to the lowest frequency 0Hz and 20mA corresponds to the highest frequency 1500Hz.

9. The engine speed processing device according to claim 8, characterized in that: The regulated signal is sent to the speed regulator, which scales it down or amplifies it as needed.

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