Frequency detection circuit for blind box circuit of wave limiter

Abstract

The utility model relates to a frequency detection circuit for a blind box circuit of a wave limiter, and belongs to the field of electronic technology experiment teaching. The device comprises a noise selection circuit, a wave limiter blind box circuit, four window comparison circuits and four display modules. Wherein the noise selection circuit selects one noise from four noises with different frequencies through a one-out-of-four switch and sends the selected noise to the wave limiter blind box circuit; the wave limiter blind box circuit filters noise and then selects different window comparison circuits through the one-to-four switch. And the window comparison circuit judges the noise filtering effect and sends the result to the display circuit to be displayed. According to the utility model, the filtering effect of the wave limiter designed by a student can be judged, the learning efficiency of the student can be effectively improved, the student can better master the characteristics of the window comparator, and the learning interest of the student is improved.

Description

Technical Field

[0001] The utility model relates to a frequency detection circuit for a blind box circuit of a wave limiter, and belongs to the field of electronic technology experimental teaching. Background Art

[0002] At present, when students design a limiter, they can only observe the filtering effect through an oscilloscope. There are certain problems with the accuracy of observing the quality of filtering with the naked eye, which leads to unstable detection quality and low efficiency, thus wasting students' learning time and greatly reducing their learning efficiency. Summary of the Invention

[0003] The technical problem solved by the utility model is: the utility model provides a frequency detection circuit of a wave limiter blind box circuit, and can quickly judge the noise filtering effect of the wave limiter designed by students through a noise selection circuit, a wave limiter blind box circuit, four window comparison circuits and four display modules.

[0004] The technical solution of the utility model is: a frequency detection circuit of a wave limiter blind box circuit, comprising a noise selection circuit 1, a wave limiter blind box circuit 2, four window comparison circuits 3, and four display modules 4; the noise selection circuit 1 is connected to the wave limiter blind box circuit 2 through a four-to-one switch, the wave limiter blind box circuit 2 is connected to the four comparison circuits 3 through a one-to-four switch, and the four comparison circuits 3 are respectively connected one-to-one with the four display modules 4.

[0005] As a further solution of the present invention, the noise selection circuit 1 includes 1kHz, 2kHz, 4kHz, and 8kHz sine wave signal generators, a four-selection switch MPC509A, and push switches S1 and S2; the 1kHz, 2kHz, 4kHz, and 8kHz sine wave signal generators are respectively connected to the input terminals IN1A, IN2A, IN3A, and IN4A of the four-selection switch MPC509A; the input terminals of the push switches S1 and S2 are connected to the power supply VDD, and the output terminals of the push switches S1 and S2 are respectively connected to the A0 and A1 terminals of the four-selection switch MPC509A; the EN terminal and VDD terminal of the four-selection switch MPC509A are connected to the power supply VDD, the VSS terminal is connected to the power supply VSS, and the GND terminal is grounded.

[0006] As a further solution of the present utility model, the limiter blind box circuit 2 includes capacitors C1, C2 and C3, resistors R1, R2, R3, R4 and R5, and an operational amplifier LF353N; the input ends of the capacitor C1 and the resistor R1 are connected to the OUTA output end of the four-to-one switch MPC509A, the output end of the capacitor C1 is connected to the input ends of the resistor R3 and the capacitor C2, and the output end of the resistor R1 is connected to the input ends of the resistor R2 and the capacitor C3; the capacitor C2 and the resistor R2 are connected to the same-direction input end of the operational amplifier LF353N, the inverting input end of the operational amplifier LF353N is connected to the input end of the resistor R4 and the output end of R5, the output end of the resistor R3 is connected to the output end of the operational amplifier LF353N and the input end of the resistor R5, and the output end of the resistor R4 and the output end of the capacitor C3 are connected to GND.

[0007] As a further solution of the present invention, the four window comparator circuits 3 include four groups of window comparators: window comparator I, window comparator II, window comparator III, and window comparator IV. The window comparator I includes resistors R6, R7, R8, R9, R10, R11, R12, R13, R14, and R15, LM393N voltage comparators A1 and LM393N voltage comparators A2, and a 74LS32N or gate U1. The output end of the operational amplifier in the wave limiter blind box circuit 2 is connected to the four window comparator circuits 3 via a one-to-four switch. The same-direction end of the LM393N voltage comparator A1 and the reverse-direction end of the LM393N voltage comparator A2 are connected to the first output end of the one-to-four switch S3. The input end of the resistor R6 is connected to VCC. The output end of the resistor R6 is connected to the input ends of the resistors R7 and R8. The reverse end of the LM393N voltage comparator A1 is connected to the resistor R8. The output end of the LM393N voltage comparator A2 is connected to the output end of the resistor R13, the input end of the resistor R11 is connected to VEE, the output end of the resistor R11 is connected to the input ends of the resistors R12 and R13, the non-inverting end of the LM393N voltage comparator A2 is connected to the output end of the resistor R13, the output end of the LM393N voltage comparator A1 is connected to the output end of the resistor R9 and the input end of the resistor R10, the input end of the resistor R9 is connected to VCC, the output end of the LM393N voltage comparator A2 is connected to the output end of the resistor R14 and the input end of the resistor R15, the input end of the resistor R14 is connected to VCC, the output ends of the resistors R10 and R15 are respectively connected to the two input ends of the 74LS32N OR gate U1, and the output ends of the resistors R7 and R12 are grounded.

[0008] The window comparator II includes resistors R16, R17, R18, R19, R20, R21, R22, R23, R24 and R25, LM393N voltage comparator A3 and LM393N voltage comparator A4, and 74LS32N OR gate U2; the same-direction end of LM393N voltage comparator A3 and the reverse end of LM393N voltage comparator A4 are connected to the second output end of the one-to-four switch S3, the input end of resistor R16 is connected to VCC, the output end of resistor R16 is connected to the input ends of resistors R17 and R18, the reverse end of LM393N voltage comparator A3 is connected to the output end of resistor R18, and the input end of resistor R21 is connected to VCC. connected to VEE, the output end of resistor R21 is connected to the input ends of resistors R22 and R23, the non-inverting end of LM393N voltage comparator A4 is connected to the output end of resistor R23, the output end of LM393N voltage comparator A3 is connected to the output end of resistor R19 and the input end of resistor R20, the input end of resistor R19 is connected to VCC, the output end of LM393N voltage comparator A4 is connected to the output end of resistor R24 ​​and the input end of resistor R25, the input end of resistor R24 ​​is connected to VCC, the output ends of resistors R20 and R25 are respectively connected to the two input ends of 74LS32N OR gate U2, and the output ends of resistors R17 and R22 are grounded;

[0009] The window comparator III includes resistors R26, R27, R28, R29, R30, R31, R32, R33, R34 and R35, LM393N voltage comparator A5 and LM393N voltage comparator A6, and 74LS32N OR gate U3; the same-direction end of LM393N voltage comparator A5 and the reverse end of LM393N voltage comparator A6 are connected to the third output end of the one-to-four switch S3, the input end of resistor R26 is connected to VCC, the output end of resistor R26 is connected to the input ends of resistors R27 and R28, the reverse end of LM393N voltage comparator A5 is connected to the output end of resistor R28, and the input end of resistor R31 is connected to VCC. The output end of the LM393N voltage comparator A5 is connected to the output end of the resistor R29 and the input end of the resistor R30, the input end of the resistor R29 is connected to VCC, the output end of the LM393N voltage comparator A6 is connected to the output end of the resistor R34 and the input end of the resistor R35, the input end of the resistor R34 is connected to VCC, the output ends of the resistors R30 and R35 are connected to the two input ends of the 74LS32N OR gate U3 respectively, and the output ends of the resistors R27 and R32 are grounded;

[0010] The window comparator IV includes resistors R36, R37, R38, R39, R40, R41, R42, R43, R44 and R45, LM393N voltage comparators A7 and A8, and a 74LS32N OR gate U4; the same-direction end of the LM393N voltage comparator A7 and the reverse end of the LM393N voltage comparator A8 are connected to the fourth output end of the one-to-four switch S3, the input end of the resistor R36 is connected to VCC, the output end of the resistor R36 is connected to the input ends of the resistors R37 and R38, the reverse end of the LM393N voltage comparator A7 is connected to the output end of the resistor R38, and the input end of the resistor R41 is connected to VCC. Connected to VEE, the output end of resistor R41 is connected to the input ends of resistors R42 and R43, the non-inverting end of LM393N voltage comparator A8 is connected to the output end of resistor R43, the output end of LM393N voltage comparator A7 is connected to the output end of resistor R39 and the input end of resistor R40, the input end of resistor R39 is connected to VCC, the output end of LM393N voltage comparator A8 is connected to the output end of resistor R44 and the input end of resistor R45, the input end of resistor R44 is connected to VCC, the output ends of resistors R40 and R45 are connected to the two input ends of 74LS32N OR gate U4 respectively, and the output ends of resistors R37 and R42 are grounded.

[0011] As a further embodiment of the present invention, the four display modules 4 include four display modules: display module I, display module II, display module III, and display module IV. Display module I includes a 74LS04N NOT gate P1, a 74LS279N trigger N1, a small light bulb X1, and a square wave generator V1. The output end of the 74LS32N OR gate U1 is connected to the input end of the 74LS04N NOT gate P1, the output end of the 74LS04N NOT gate P1 is connected to the S1 and S2 ports of the 74LS279N trigger N1, one end of the square wave generator V1 is connected to the R1 port of the 74LS279N trigger N1, the other end of the square wave generator V1 is connected to GND, and the output end Q1 of the 74LS279N trigger N1 is connected to the small light bulb X1.

[0012] The display module II includes a 74LS04N NOT gate P2, a 74LS279N trigger N2, a small light bulb X2 and a square wave generator V2; the output end of the 74LS32N OR gate U2 is connected to the input end of the 74LS04N NOT gate P2, the output end of the 74LS04N NOT gate P2 is connected to the S1 and S2 ports of the 74LS279N trigger N2, one end of the square wave generator V2 is connected to the R1 port of the 74LS279N trigger N2, the other end of the square wave generator V2 is connected to GND, and the output end Q1 of the 74LS279N trigger N2 is connected to the small light bulb X2;

[0013] The display module III includes a 74LS04N NOT gate P3, a 74LS279N trigger N3, a small light bulb X3 and a square wave generator V3; the output end of the 74LS32N OR gate U3 is connected to the input end of the 74LS04N NOT gate P3, the output end of the 74LS04N NOT gate P3 is connected to the S1 and S2 ports of the 74LS279N trigger N3, one end of the square wave generator V3 is connected to the R1 port of the 74LS279N trigger N3, the other end of the square wave generator V3 is connected to GND, and the output end Q1 of the 74LS279N trigger N3 is connected to the small light bulb X3;

[0014] The display module IV includes a 74LS04N NOT gate P4, a 74LS279N trigger N4, a small light bulb X4 and a square wave generator V4; the output end of the 74LS32N OR gate U4 is connected to the input end of the 74LS04N NOT gate P4, the output end of the 74LS04N NOT gate P4 is connected to the S1 and S2 ports of the 74LS279N trigger N4, one end of the square wave generator V4 is connected to the R1 port of the 74LS279N trigger N4, the other end of the square wave generator V4 is connected to GND, and the output end Q1 of the 74LS279N trigger N4 is connected to the small light bulb X4.

[0015] The working principle of this utility model is:

[0016] The noise selection circuit 1 generates sine wave noises of 1kHz, 2kHz, 4kHz, and 8kHz respectively through four signal generators. The four noises are selected by the four-to-one switch MPC509AP. When S2=0, S1=0, 1kHz noise is input; when S2=0, S1=1, 2kHz noise is input; when S2=1, S1=0, 4kHz noise is input; when S2=1, S1=1, 8kHz noise is input. The selected noise is input to the blind box circuit of the limiter.

[0017] The wave limiter blind box circuit 2 uses a T-type wave limiter. This structure makes the circuit present high impedance at specific frequencies, thereby blocking signals of specific frequencies. By adjusting the values ​​of resistors R1, R2, R3 and capacitors C1, C2, C3, the noise frequency to be filtered is controlled. After the noise is filtered, it is sent to four window comparator circuits through a one-to-four switch.

[0018] The input signal enters the four window comparator circuits 3, window comparator I, window comparator II, window comparator III, and window comparator IV. The four window comparators obtain different voltage measurement ranges by changing the resistance value. Each window comparator uses two voltage comparators to determine the voltage measurement range. When the input signal is within the measurement range of the window comparator, it will output a low level. When the input signal is outside the measurement range of the window comparator, it will generate a high level. The two output levels are used to determine whether there is a high level through an OR gate. The output result is input to the display module

[0019] The four display modules use small light bulbs to determine if filtering is successful. The window comparator output is converted between high and low levels by a NOT gate, which then feeds the output level into an RS flip-flop. When the input is low, a pulse is applied to the R terminal, causing the output light bulb to illuminate. When the input is high, no pulse is applied to the R terminal, and the output light bulb remains off. A non-flashing light indicates that noise filtering has met the preset criteria; otherwise, it indicates failure.

[0020] The beneficial effects of the utility model are:

[0021] The utility model provides a frequency detection circuit for a blind box circuit of a wave limiter, so as to solve the problem that when students need to design a wave limiter, they cannot intuitively judge the filtering effect of the wave limiter, resulting in the inability to complete the experimental task within the prescribed class time, thereby affecting the teaching progress and other teaching accidents. The utility model can conveniently and quickly judge the filtering effect of the wave limiter, effectively reducing the use of hardware resources. With this tool, students can better design a wave limiter with good filtering effect, improve students' learning interest, and exercise students' hands-on ability and component identification ability, thereby improving teaching quality and teaching progress. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of the frequency detection circuit principle of the blind box circuit of the wave limiter of the utility model;

[0023] Figure 1 The labels are: 1-noise selection circuit, 2-wave limiter blind box circuit, 3-4 window comparator circuits, 4-4 display modules, R1~R5, R6~R15, R16~R25, R26~R35, R36~R45-resistors, S1, S2-switches, S3-one-to-four switch, MPC509AP-four-to-one switch, LF353N-operational amplifier, LM393N(A1)~LM393N(A8)-voltage comparator, 74LS32N(U1)~74LS32N(U4)-NOT gate, 74LS04N(P1)~74LS0N4(P4)-NOT gate, 74LS279N(N1)~74LS279N(N4)-RS trigger, X1~X4-small light bulb, V1~V4-square wave generator. DETAILED DESCRIPTION

[0024] The following is a further description of a frequency detection circuit for a blind box circuit of a wave limiter proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to facilitate and clearly illustrate the purpose of the embodiments of the present invention.

[0025] Example 1: Figure 1 As shown, a frequency detection circuit for a limiter blind box circuit includes a noise selection circuit 1, a limiter blind box circuit 2, four window comparison circuits 3, and four display modules 4; the noise selection circuit 1 is connected to the limiter blind box circuit 2 through a four-to-one switch, the limiter blind box circuit 2 is connected to the four comparison circuits 3 through a one-to-four switch, and the four comparison circuits 3 are respectively connected to the four display modules 4 one by one.

[0026] As a further solution of the present invention, the noise selection circuit 1 includes 1kHz, 2kHz, 4kHz, and 8kHz sine wave signal generators, a four-selection switch MPC509A, and push switches S1 and S2; the 1kHz, 2kHz, 4kHz, and 8kHz sine wave signal generators are respectively connected to the input terminals IN1A, IN2A, IN3A, and IN4A of the four-selection switch MPC509A; the input terminals of the push switches S1 and S2 are connected to the power supply VDD, and the output terminals of the push switches S1 and S2 are respectively connected to the A0 and A1 terminals of the four-selection switch MPC509A; the EN terminal and VDD terminal of the four-selection switch MPC509A are connected to the power supply VDD, the VSS terminal is connected to the power supply VSS, and the GND terminal is grounded.

[0027] As a further solution of the present utility model, the limiter blind box circuit 2 includes capacitors C1, C2 and C3, resistors R1, R2, R3, R4 and R5, and an operational amplifier LF353N; the input ends of the capacitor C1 and the resistor R1 are connected to the OUTA output end of the four-to-one switch MPC509A, the output end of the capacitor C1 is connected to the input ends of the resistor R3 and the capacitor C2, and the output end of the resistor R1 is connected to the input ends of the resistor R2 and the capacitor C3; the capacitor C2 and the resistor R2 are connected to the same-direction input end of the operational amplifier LF353N, the inverting input end of the operational amplifier LF353N is connected to the input end of the resistor R4 and the output end of R5, the output end of the resistor R3 is connected to the output end of the operational amplifier LF353N and the input end of the resistor R5, and the output end of the resistor R4 and the output end of the capacitor C3 are connected to GND.

[0028] As a further solution of the present invention, the four window comparator circuits 3 include four groups of window comparators: window comparator I, window comparator II, window comparator III, and window comparator IV. The window comparator I includes resistors R6, R7, R8, R9, R10, R11, R12, R13, R14, and R15, LM393N voltage comparators A1 and LM393N voltage comparators A2, and a 74LS32N or gate U1. The output end of the operational amplifier in the wave limiter blind box circuit 2 is connected to the four window comparator circuits 3 via a one-to-four switch. The same-direction end of the LM393N voltage comparator A1 and the reverse-direction end of the LM393N voltage comparator A2 are connected to the first output end of the one-to-four switch S3. The input end of the resistor R6 is connected to VCC. The output end of the resistor R6 is connected to the input ends of the resistors R7 and R8. The reverse end of the LM393N voltage comparator A1 is connected to the resistor R8. The output end of the LM393N voltage comparator A2 is connected to the output end of the resistor R13, the input end of the resistor R11 is connected to VEE, the output end of the resistor R11 is connected to the input ends of the resistors R12 and R13, the non-inverting end of the LM393N voltage comparator A2 is connected to the output end of the resistor R13, the output end of the LM393N voltage comparator A1 is connected to the output end of the resistor R9 and the input end of the resistor R10, the input end of the resistor R9 is connected to VCC, the output end of the LM393N voltage comparator A2 is connected to the output end of the resistor R14 and the input end of the resistor R15, the input end of the resistor R14 is connected to VCC, the output ends of the resistors R10 and R15 are respectively connected to the two input ends of the 74LS32N OR gate U1, and the output ends of the resistors R7 and R12 are grounded.

[0029] The window comparator II includes resistors R16, R17, R18, R19, R20, R21, R22, R23, R24 and R25, LM393N voltage comparator A3 and LM393N voltage comparator A4, and 74LS32N OR gate U2; the same-direction end of LM393N voltage comparator A3 and the reverse end of LM393N voltage comparator A4 are connected to the second output end of the one-to-four switch S3, the input end of resistor R16 is connected to VCC, the output end of resistor R16 is connected to the input ends of resistors R17 and R18, the reverse end of LM393N voltage comparator A3 is connected to the output end of resistor R18, and the input end of resistor R21 is connected to VCC. connected to VEE, the output end of resistor R21 is connected to the input ends of resistors R22 and R23, the non-inverting end of LM393N voltage comparator A4 is connected to the output end of resistor R23, the output end of LM393N voltage comparator A3 is connected to the output end of resistor R19 and the input end of resistor R20, the input end of resistor R19 is connected to VCC, the output end of LM393N voltage comparator A4 is connected to the output end of resistor R24 ​​and the input end of resistor R25, the input end of resistor R24 ​​is connected to VCC, the output ends of resistors R20 and R25 are respectively connected to the two input ends of 74LS32N OR gate U2, and the output ends of resistors R17 and R22 are grounded;

[0030] The window comparator III includes resistors R26, R27, R28, R29, R30, R31, R32, R33, R34 and R35, LM393N voltage comparator A5 and LM393N voltage comparator A6, and 74LS32N OR gate U3; the same-direction end of LM393N voltage comparator A5 and the reverse end of LM393N voltage comparator A6 are connected to the third output end of the one-to-four switch S3, the input end of resistor R26 is connected to VCC, the output end of resistor R26 is connected to the input ends of resistors R27 and R28, the reverse end of LM393N voltage comparator A5 is connected to the output end of resistor R28, and the input end of resistor R31 is connected to VCC. The output end of the LM393N voltage comparator A5 is connected to the output end of the resistor R29 and the input end of the resistor R30, the input end of the resistor R29 is connected to VCC, the output end of the LM393N voltage comparator A6 is connected to the output end of the resistor R34 and the input end of the resistor R35, the input end of the resistor R34 is connected to VCC, the output ends of the resistors R30 and R35 are connected to the two input ends of the 74LS32N OR gate U3 respectively, and the output ends of the resistors R27 and R32 are grounded;

[0031] The window comparator IV includes resistors R36, R37, R38, R39, R40, R41, R42, R43, R44 and R45, LM393N voltage comparators A7 and A8, and a 74LS32N OR gate U4; the same-direction end of the LM393N voltage comparator A7 and the reverse end of the LM393N voltage comparator A8 are connected to the fourth output end of the one-to-four switch S3, the input end of the resistor R36 is connected to VCC, the output end of the resistor R36 is connected to the input ends of the resistors R37 and R38, the reverse end of the LM393N voltage comparator A7 is connected to the output end of the resistor R38, and the input end of the resistor R41 is connected to VCC. Connected to VEE, the output end of resistor R41 is connected to the input ends of resistors R42 and R43, the non-inverting end of LM393N voltage comparator A8 is connected to the output end of resistor R43, the output end of LM393N voltage comparator A7 is connected to the output end of resistor R39 and the input end of resistor R40, the input end of resistor R39 is connected to VCC, the output end of LM393N voltage comparator A8 is connected to the output end of resistor R44 and the input end of resistor R45, the input end of resistor R44 is connected to VCC, the output ends of resistors R40 and R45 are connected to the two input ends of 74LS32N OR gate U4 respectively, and the output ends of resistors R37 and R42 are grounded.

[0032] As a further embodiment of the present invention, the four display modules 4 include four display modules: display module I, display module II, display module III, and display module IV. Display module I includes a 74LS04N NOT gate P1, a 74LS279N trigger N1, a small light bulb X1, and a square wave generator V1. The output end of the 74LS32N OR gate U1 is connected to the input end of the 74LS04N NOT gate P1, the output end of the 74LS04N NOT gate P1 is connected to the S1 and S2 ports of the 74LS279N trigger N1, one end of the square wave generator V1 is connected to the R1 port of the 74LS279N trigger N1, the other end of the square wave generator V1 is connected to GND, and the output end Q1 of the 74LS279N trigger N1 is connected to the small light bulb X1.

[0033] The display module II includes a 74LS04N NOT gate P2, a 74LS279N trigger N2, a small light bulb X2 and a square wave generator V2; the output end of the 74LS32N OR gate U2 is connected to the input end of the 74LS04N NOT gate P2, the output end of the 74LS04N NOT gate P2 is connected to the S1 and S2 ports of the 74LS279N trigger N2, one end of the square wave generator V2 is connected to the R1 port of the 74LS279N trigger N2, the other end of the square wave generator V2 is connected to GND, and the output end Q1 of the 74LS279N trigger N2 is connected to the small light bulb X2;

[0034] The display module III includes a 74LS04N NOT gate P3, a 74LS279N trigger N3, a small light bulb X3 and a square wave generator V3; the output end of the 74LS32N OR gate U3 is connected to the input end of the 74LS04N NOT gate P3, the output end of the 74LS04N NOT gate P3 is connected to the S1 and S2 ports of the 74LS279N trigger N3, one end of the square wave generator V3 is connected to the R1 port of the 74LS279N trigger N3, the other end of the square wave generator V3 is connected to GND, and the output end Q1 of the 74LS279N trigger N3 is connected to the small light bulb X3;

[0035] The display module IV includes a 74LS04N NOT gate P4, a 74LS279N trigger N4, a small light bulb X4 and a square wave generator V4; the output end of the 74LS32N OR gate U4 is connected to the input end of the 74LS04N NOT gate P4, the output end of the 74LS04N NOT gate P4 is connected to the S1 and S2 ports of the 74LS279N trigger N4, one end of the square wave generator V4 is connected to the R1 port of the 74LS279N trigger N4, the other end of the square wave generator V4 is connected to GND, and the output end Q1 of the 74LS279N trigger N4 is connected to the small light bulb X4.

[0036] The noise selection circuit 1 generates sine wave noises of 1kHz, 2kHz, 4kHz, and 8kHz respectively through four signal generators. The four noises are selected by the four-to-one switch MPC509AP. When S2=0, S1=0, 1kHz noise is input; when S2=0, S1=1, 2kHz noise is input; when S2=1, S1=0, 4kHz noise is input; when S2=1, S1=1, 8kHz noise is input. The selected noise is input to the limiter blind box circuit 2.

[0037] The wave limiter blind box circuit 2 uses a T-type wave limiter. This structure makes the circuit present high impedance at specific frequencies, thereby blocking signals of specific frequencies. By adjusting the values ​​of resistors R1, R2, R3 and capacitors C1, C2, C3, the noise frequency to be filtered is controlled. After the noise is filtered, it is sent to the four window comparator circuits 3 through a one-to-four switch.

[0038] The input signal enters the four window comparator circuits 3, window comparator I, window comparator II, window comparator III, and window comparator IV. The four window comparators obtain different voltage measurement ranges by changing the resistance value. Each window comparator uses two voltage comparators to determine the voltage measurement range. When the input signal is within the measurement range of the window comparator, it will output a low level. When the input signal is outside the measurement range of the window comparator, it will generate a high level. The two output levels are used to determine whether there is a high level through an OR gate. The output result is input to the display module

[0039] The four display modules use small light bulbs to determine if filtering is successful. The window comparator output is converted between high and low levels by a NOT gate, which then feeds the output level into an RS flip-flop. When the input is low, a pulse is applied to the R terminal, causing the output light bulb to illuminate. When the input is high, no pulse is applied to the R terminal, and the output light bulb remains off. A non-flashing light indicates that noise filtering has met the preset criteria; otherwise, it indicates failure.

[0040] The specific embodiments of the present invention are described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made within the knowledge of ordinary technicians in this field without departing from the purpose of the present invention.

Claims

1. A frequency detection circuit for a blind box circuit of a wave limiter, characterized in that: The invention comprises a noise selection circuit (1), a wave limiter blind box circuit (2), four window comparison circuits (3), and four display modules (4); the noise selection circuit (1) is connected to the wave limiter blind box circuit (2) via a four-to-one switch, the wave limiter blind box circuit (2) is connected to the four window comparison circuits (3) via a one-to-four switch, and the four window comparison circuits (3) are respectively connected to the four display modules (4) one by one.

2. The frequency detection circuit of the blind box circuit of the limiter according to claim 1, characterized in that: The noise selection circuit (1) comprises 1kHz, 2kHz, 4kHz, and 8kHz sine wave signal generators, a four-selection switch MPC509A, and key switches S1 and S2; the 1kHz, 2kHz, 4kHz, and 8kHz sine wave signal generators are respectively connected to input terminals IN1A, IN2A, IN3A, and IN4A of the four-selection switch MPC509A; the input terminals of the key switches S1 and S2 are connected to a power supply VDD, and the output terminals of the key switches S1 and S2 are respectively connected to terminals A0 and A1 of the four-selection switch MPC509A; the EN terminal and VDD terminal of the four-selection switch MPC509A are connected to the power supply VDD, the VSS terminal is connected to the power supply VSS, and the GND terminal is grounded.

3. The frequency detection circuit of the blind box circuit of the limiter according to claim 1, characterized in that: The wave limiter blind box circuit (2) comprises capacitors C1, C2 and C3, resistors R1, R2, R3, R4 and R5, and an operational amplifier LF353N; the input ends of the capacitor C1 and the resistor R1 are connected to the OUTA output end of the four-select-one switch MPC509A, the output end of the capacitor C1 is connected to the input ends of the resistor R3 and the capacitor C2, and the output end of the resistor R1 is connected to the input ends of the resistor R2 and the capacitor C3; the output ends of the capacitor C2 and the resistor R2 are connected to the same-direction input end of the operational amplifier LF353N, the inverse input end of the operational amplifier LF353N is connected to the input end of the resistor R4 and the output end of R5, the output end of the resistor R3 is connected to the output end of the operational amplifier LF353N and the input end of the resistor R5, and the output end of the resistor R4 and the output end of the capacitor C3 are connected to GND.

4. The frequency detection circuit of the blind box circuit of the limiter according to claim 1, characterized in that: The four window comparator circuits (3) include four groups of window comparators: window comparator I, window comparator II, window comparator III, and window comparator IV; the output end of the operational amplifier in the wave limiter blind box circuit (2) is connected to the four window comparator circuits (3) through a one-to-four switch; the window comparator I includes resistors R6, R7, R8, R9, R10, R11, R12, R13, R14, and R15, LM393N voltage comparators A1 and LM393N voltage comparators A2, and a 74LS32N OR gate U1; the same-direction end of the LM393N voltage comparator A1 and the reverse end of the LM393N voltage comparator A2 are connected to the first output end of the one-to-four switch S3, the input end of the resistor R6 is connected to VCC, and the output end of the resistor R6 is connected to the resistors R7, R8, R9, R10, R11, R12, R13, R14, and R15. 8, the inverting terminal of the LM393N voltage comparator A1 is connected to the output terminal of the resistor R8, the input terminal of the resistor R11 is connected to VEE, the output terminal of the resistor R11 is connected to the input terminals of the resistors R12 and R13, the non-inverting terminal of the LM393N voltage comparator A2 is connected to the output terminal of the resistor R13, the output terminal of the LM393N voltage comparator A1 is connected to the output terminal of the resistor R9 and the input terminal of the resistor R10, the input terminal of the resistor R9 is connected to VCC, the output terminal of the LM393N voltage comparator A2 is connected to the output terminal of the resistor R14 and the input terminal of the resistor R15, the input terminal of the resistor R14 is connected to VCC, the output terminals of the resistors R10 and R15 are respectively connected to the two input terminals of the 74LS32N OR gate U1, and the output terminals of the resistors R7 and R12 are grounded; The window comparator II includes resistors R16, R17, R18, R19, R20, R21, R22, R23, R24 and R25, LM393N voltage comparator A3 and LM393N voltage comparator A4, and 74LS32N OR gate U2; the same-direction end of LM393N voltage comparator A3 and the reverse end of LM393N voltage comparator A4 are connected to the second output end of the one-to-four switch S3, the input end of resistor R16 is connected to VCC, the output end of resistor R16 is connected to the input ends of resistors R17 and R18, the reverse end of LM393N voltage comparator A3 is connected to the output end of resistor R18, and the input end of resistor R21 is connected to VCC. connected to VEE, the output end of resistor R21 is connected to the input ends of resistors R22 and R23, the non-inverting end of LM393N voltage comparator A4 is connected to the output end of resistor R23, the output end of LM393N voltage comparator A3 is connected to the output end of resistor R19 and the input end of resistor R20, the input end of resistor R19 is connected to VCC, the output end of LM393N voltage comparator A4 is connected to the output end of resistor R24 ​​and the input end of resistor R25, the input end of resistor R24 ​​is connected to VCC, the output ends of resistors R20 and R25 are respectively connected to the two input ends of 74LS32N OR gate U2, and the output ends of resistors R17 and R22 are grounded; The window comparator III includes resistors R26, R27, R28, R29, R30, R31, R32, R33, R34 and R35, LM393N voltage comparator A5 and LM393N voltage comparator A6, and 74LS32N OR gate U3; the same-direction end of LM393N voltage comparator A5 and the reverse end of LM393N voltage comparator A6 are connected to the third output end of the one-to-four switch S3, the input end of resistor R26 is connected to VCC, the output end of resistor R26 is connected to the input ends of resistors R27 and R28, the reverse end of LM393N voltage comparator A5 is connected to the output end of resistor R28, and the input end of resistor R31 is connected to VCC. The output end of the LM393N voltage comparator A5 is connected to the output end of the resistor R29 and the input end of the resistor R30, the input end of the resistor R29 is connected to VCC, the output end of the LM393N voltage comparator A6 is connected to the output end of the resistor R34 and the input end of the resistor R35, the input end of the resistor R34 is connected to VCC, the output ends of the resistors R30 and R35 are connected to the two input ends of the 74LS32N OR gate U3 respectively, and the output ends of the resistors R27 and R32 are grounded; The window comparator IV includes resistors R36, R37, R38, R39, R40, R41, R42, R43, R44 and R45, LM393N voltage comparators A7 and A8, and a 74LS32N OR gate U4; the same-direction end of the LM393N voltage comparator A7 and the reverse end of the LM393N voltage comparator A8 are connected to the fourth output end of the one-to-four switch S3, the input end of the resistor R36 is connected to VCC, the output end of the resistor R36 is connected to the input ends of the resistors R37 and R38, the reverse end of the LM393N voltage comparator A7 is connected to the output end of the resistor R38, and the input end of the resistor R41 is connected to VCC. Connected to VEE, the output end of resistor R41 is connected to the input ends of resistors R42 and R43, the non-inverting end of LM393N voltage comparator A8 is connected to the output end of resistor R43, the output end of LM393N voltage comparator A7 is connected to the output end of resistor R39 and the input end of resistor R40, the input end of resistor R39 is connected to VCC, the output end of LM393N voltage comparator A8 is connected to the output end of resistor R44 and the input end of resistor R45, the input end of resistor R44 is connected to VCC, the output ends of resistors R40 and R45 are connected to the two input ends of 74LS32N OR gate U4 respectively, and the output ends of resistors R37 and R42 are grounded.

5. The frequency detection circuit of the blind box circuit of the limiter according to claim 1, characterized in that: The four display modules (4) include four display modules: display module I, display module II, display module III, and display module IV; the display module I includes a 74LS04N NOT gate P1, a 74LS279N trigger N1, a small light bulb X1, and a square wave generator V1; the output end of the 74LS32N OR gate U1 is connected to the input end of the 74LS04N NOT gate P1, the output end of the 74LS04N NOT gate P1 is connected to the S1 and S2 ports of the 74LS279N trigger N1, one end of the square wave generator V1 is connected to the R1 port of the 74LS279N trigger N1, the other end of the square wave generator V1 is connected to GND, and the output end Q1 of the 74LS279N trigger N1 is connected to the small light bulb X1; The display module II includes a 74LS04N NOT gate P2, a 74LS279N trigger N2, a small light bulb X2 and a square wave generator V2; the output end of the 74LS32N OR gate U2 is connected to the input end of the 74LS04N NOT gate P2, the output end of the 74LS04N NOT gate P2 is connected to the S1 and S2 ports of the 74LS279N trigger N2, one end of the square wave generator V2 is connected to the R1 port of the 74LS279N trigger N2, the other end of the square wave generator V2 is connected to GND, and the output end Q1 of the 74LS279N trigger N2 is connected to the small light bulb X2; The display module III includes a 74LS04N NOT gate P3, a 74LS279N trigger N3, a small light bulb X3 and a square wave generator V3; the output end of the 74LS32N OR gate U3 is connected to the input end of the 74LS04N NOT gate P3, the output end of the 74LS04N NOT gate P3 is connected to the S1 and S2 ports of the 74LS279N trigger N3, one end of the square wave generator V3 is connected to the R1 port of the 74LS279N trigger N3, the other end of the square wave generator V3 is connected to GND, and the output end Q1 of the 74LS279N trigger N3 is connected to the small light bulb X3; The display module IV includes a 74LS04N NOT gate P4, a 74LS279N trigger N4, a small light bulb X4 and a square wave generator V4; the output end of the 74LS32N OR gate U4 is connected to the input end of the 74LS04N NOT gate P4, the output end of the 74LS04N NOT gate P4 is connected to the S1 and S2 ports of the 74LS279N trigger N4, one end of the square wave generator V4 is connected to the R1 port of the 74LS279N trigger N4, the other end of the square wave generator V4 is connected to GND, and the output end Q1 of the 74LS279N trigger N4 is connected to the small light bulb X4.

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