Semiconductor integrated transistor packaging structure

By introducing structures such as card slots, card rods, mobile plates and springs into the semiconductor integrated transistor packaging structure, the problem of complex bolt packaging operations in the prior art is solved, and the rapid packaging and disassembly of the upper cover is achieved, and the operation efficiency is improved.

CN223260585UActive Publication Date: 2025-08-22SHENZHEN BOTONG CULTURE TECHNOLOGY CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202422153813.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-03
Publication Date
2025-08-22
Estimated Expiration
2034-09-03

AI Technical Summary

Technical Problem

The existing semiconductor integrated transistor packaging structure requires multiple bolts to be rotated during installation and disassembly, which increases the workload of staff and is inconvenient to operate.

Method used

The structures of the upper cover are quickly packaged and disassembled by pulling the pull plate, which simplifies the operation process.

Benefits of technology

It realizes rapid packaging and disassembly of semiconductor integrated transistors, simplifies the operation process and improves work efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223260585U_ABST
    Figure CN223260585U_ABST
Patent Text Reader

Abstract

The utility model discloses a semiconductor integrated transistor packaging structure which comprises a bottom plate, the upper side of the bottom plate is fixedly connected with a plurality of supporting blocks and fixing rods, the upper ends of the fixing rods are fixedly connected with a supporting plate, and the upper side of the supporting plate is provided with a semiconductor chip. A plurality of pins are fixedly connected to the front side and the rear side of the semiconductor chip, a packaging unit and an upper cover are arranged on the upper side of the bottom plate, the packaging unit comprises mounting blocks, the mounting blocks are fixedly connected to the upper sides of the left end and the right end of the bottom plate, and clamping grooves are formed in the sides, close to the upper cover, of the mounting blocks on the left side and the right side; and clamping rods are arranged on the inner sides of the clamping grooves. Through the arrangement of the bottom plate, the semiconductor chip, the pins, the upper cover, the mounting blocks, the clamping grooves, the clamping rods, the moving plates, the first springs, the connecting plates, the limiting rods, the second springs and the pulling plates, the pulling plates on the two sides can be conveniently controlled to ascend and be pulled to the middle, the upper cover can be conveniently and rapidly packaged and disassembled, and compared with packaging through bolts, operation is easy.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to the field of semiconductor packaging, in particular to a semiconductor integrated transistor packaging structure. Background Art

[0002] Semiconductor integrated transistors are core components of modern electronic technology, responsible for functions such as current amplification, switching, and signal modulation in integrated circuits.

[0003] After searching, the application number is "202420105914.3", which provides a semiconductor integrated transistor packaging structure. When using the semiconductor integrated transistor packaging structure, the upper cover is first put on the surface of the chip body, and the groove on the edge of the upper cover is aligned with the pin on the side surface of the chip body. Then the bottom cover drives the limiting slider to slide upward inside the limiting groove. When the bottom cover drives the clamping plate to move to the lower surface position of the chip body through the spring bar, the bottom cover continues to move upward to compress the spring bar. At the same time, the bottom cover can drive the sleeve to slide on the surface of the limit block. When the limiting slider drives the threaded hole to move upward to one side of the circular hole, the bolt can be rotated. The bolt can be threadedly connected with the threaded hole by rotation, so that the upper cover and the bottom cover can be fixed, thereby completing the packaging of the semiconductor integrated transistor.

[0004] The upper cover is installed by bolts on both sides, which is convenient for packaging semiconductor integrated transistors. When installing and removing chips, the bolts on both sides need to be turned. When multiple semiconductor integrated transistors need to be packaged, the workload of the staff is increased, the operation is troublesome, and it is inconvenient for the staff to install and remove. Utility Model Content

[0005] In order to overcome the shortcomings of the prior art in semiconductor integrated crystal packaging and disassembly, which require a lot of work, one of the objectives of the present utility model is to provide a semiconductor integrated transistor packaging structure.

[0006] One of the objectives of the present utility model is achieved by the following technical solution: A semiconductor integrated transistor packaging structure, comprising a base plate: a plurality of support blocks and fixing rods are fixedly connected to the upper side of the base plate, the upper ends of the fixing rods are fixedly connected to the support plate, a semiconductor chip is arranged on the upper side of the support plate, a plurality of pins are fixedly connected to the front and rear sides of the semiconductor chip, and a packaging unit and an upper cover are arranged on the upper side of the base plate;

[0007] The packaging unit includes a mounting block, which is fixedly connected to the upper sides of the left and right ends of the bottom plate. A card slot is provided on one side of the mounting blocks on the left and right sides close to the upper cover. A card rod is provided on the inner side of the card slot. The outer end of the card rod is fixedly connected to a movable plate. A telescopic rod and a spring 1 are fixedly connected between the movable plate and the upper cover. The upper sides of the movable plates on the left and right sides are fixedly connected to connecting plates. The outer sides of the upper ends of the connecting plates on the left and right sides are fixedly connected to a top plate. A limiting rod is provided on the outer side of the top plate. The upper end of the limiting rod is fixedly connected to a pull plate. A spring 2 is fixedly connected between the pull plate and the top plate. A limiting slot is provided on the upper side of the upper cover.

[0008] According to the semiconductor integrated transistor packaging structure, the lower end of the limiting rod passes through the outer side of the top plate, and the limiting rod is adapted to be arranged in the limiting groove, so as to facilitate the limiting of the pull plate.

[0009] According to the semiconductor integrated transistor packaging structure, the connecting plate is arranged in an L-shaped structure.

[0010] According to the semiconductor integrated transistor packaging structure, the latching rod is adapted to fit the latching slot.

[0011] According to the semiconductor integrated transistor packaging structure, the connecting plate is slidably connected to the upper cover.

[0012] According to the semiconductor integrated transistor packaging structure, both the front and rear sides of the upper cover are provided with connection grooves adapted to the support blocks, so as to facilitate the positioning of the pins.

[0013] Beneficial effects:

[0014] By providing a base plate, semiconductor chip, pins, upper cover, mounting block, slot, clamping rod, movable plate, spring 1, connecting plate, limit rod, spring 2 and pull plate, it is convenient to control the pull plates on both sides to rise and pull them to the middle, so as to facilitate the quick packaging and disassembly of the upper cover. Compared with packaging with bolts, the operation is simple.

[0015] Additional aspects and advantages of the present invention will be given in part in the following description and will become apparent from the following description or learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments;

[0017] Figure 1 This is an overall three-dimensional structural diagram of a semiconductor integrated transistor packaging structure of the present utility model;

[0018] Figure 2 This is a partial exploded view of a semiconductor integrated transistor packaging structure of the present utility model;

[0019] Figure 3 This is a three-dimensional structural diagram of a packaging unit in a semiconductor integrated transistor packaging structure of the present utility model;

[0020] Figure 4 for Figure 3 Enlarged view of point A in the middle;

[0021] Figure 5 The present invention is a three-dimensional structural diagram of an upper cover in a semiconductor integrated transistor packaging structure.

[0022] Legend:

[0023] 1. Bottom plate; 2. Support block; 3. Pin; 4. Upper cover; 5. Connecting slot; 6. Packaging unit; 601. Mounting block; 602. Card slot; 603. Telescopic rod; 604. Spring 1; 605. Moving plate; 606. Card rod; 607. Connecting plate; 608. Top plate; 609. Limiting rod; 610. Spring 2; 612. Pull plate; 613. Limiting slot; 7. Semiconductor chip; 8. Fixing rod; 9. Support plate. DETAILED DESCRIPTION

[0024] This section will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and overall technical solution of the present invention, but it cannot be understood as a limitation on the scope of protection of the present invention.

[0025] Reference Figure 1 - Figure 5 A semiconductor integrated transistor packaging structure includes a base plate 1: a plurality of support blocks 2 and a fixing rod 8 are fixedly connected to the upper side of the base plate 1, a support plate 9 is fixedly connected to the upper end of the fixing rod 8, a semiconductor chip 7 is arranged on the upper side of the support plate 9, and a plurality of pins 3 are fixedly connected to the front and rear sides of the semiconductor chip 7, a packaging unit 6 and an upper cover 4 are arranged on the upper side of the base plate 1, and connection grooves 5 that are adapted to the support blocks 2 are provided on the front and rear sides of the upper cover 4, and the connection grooves 5 cooperate with the upper cover 4 so that the upper cover 4 limits the pins 3 and encapsulates the upper cover 4 through the packaging unit 6.

[0026] The packaging unit 6 includes a mounting block 601, which is fixedly connected to the upper sides of the left and right ends of the bottom plate 1. A slot 602 is provided on one side of the mounting blocks 601 on the left and right sides close to the upper cover 4. A clamping rod 606 is provided on the inner side of the clamping slot 602. The outer end of the clamping rod 606 is fixedly connected to a movable plate 605. A telescopic rod 603 and a spring 1 604 are fixedly connected between the movable plate 605 and the upper cover 4. The upper sides of the movable plates 605 on the left and right sides are fixedly connected to connecting plates 607. The outer sides of the upper ends of the connecting plates 607 on the left and right sides are fixedly connected to a top plate 608. The top plate A limiting rod 609 is provided on the outside of 608, and a pull plate 612 is fixedly connected to the upper end of the limiting rod 609. A spring 2 610 is fixedly connected between the pull plate 612 and the top plate 608. A limiting slot 613 is provided on the upper side of the upper cover 4. The lower end of the limiting rod 609 passes through the outer side of the top plate 608. The limiting rod 609 is adapted to the limiting slot 613. The connecting plate 607 is an L-shaped structure. The card rod 606 is adapted to the card slot 602. The connecting plate 607 is slidably connected to the upper cover 4. When disassembling the upper cover 4, the staff first pulls the pull plate 612, and then pulls The plate 612 drives the limit rod 609 to move, so that the limit rod 609 is separated from the limit slot 613, and then the pull plate 612 is pulled to pull the pull plates 612 on the left and right sides horizontally toward the middle, so that the pull plate 612 drives the top plate 608 to move, the top plate 608 drives the connecting plate 607 to move, the connecting plate 607 drives the moving plate 605 to move, and the moving plate 605 drives the card rod 606 to move, so that the card rod 606 separates the voice card slot 602, and then the upper cover 4 is taken out of contact, so that the upper cover 4 can be disassembled without the help of tools. The operation is simple. When the upper cover 4 needs to be packaged, the staff pulls the pull plates 612 on both sides, and then places the upper cover 4 on the upper side of the bottom plate 1. Since the spring 1 604 is in a compressed state, the staff then lets go, so that under the action of the spring 1 604, the movable plate 605 drives the clamping rod 606 to engage with the clamping slot 602. At the same time, when the limiting rod 609 moves to the limiting slot 613, under the action of the spring 2 610, the limiting rod 609 moves to the inside of the limiting slot 613, which facilitates the limiting of the pull plate 612, so that the upper cover 4 can be quickly installed, and the semiconductor chip 7 can be packaged conveniently.

[0027] Working principle: When packaging the semiconductor chip 7, first place the semiconductor chip 7 on the upper side of the support plate 9, then pull the pull plates 612 on both sides so that the pull plates 612 drive the top plate 608 to move. Under the action of the connecting plate 607 and the movable plate 605, it is convenient to control the movement of the card rod 606. Then place the upper cover 4 on the bottom plate 1, and then let go. Under the action of the spring 1 604, it is convenient to move the card rod 606 to the inside of the card slot 602. At the same time, the spring 2 610 moves the limit rod 609 to the limit slot 613, which is convenient for quickly packaging the upper cover 4. When disassembling, first pull the pull plate 612 to control the limit rod 609 to rise and separate from the limit slot 613. Then pull the pull plate 612 toward the middle. The pull plate 612 drives the card rod 606 on the movable plate 605 to separate. Then the upper cover 4 can be directly removed. The operation is simple.

[0028] The embodiments of the present invention are described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made within the scope of knowledge possessed by ordinary technicians in the relevant technical field without departing from the purpose of the present invention.

Claims

1. A semiconductor integrated transistor packaging structure, characterized in that: The invention comprises a base plate (1), wherein a plurality of support blocks (2) and a fixing rod (8) are fixedly connected to the upper side of the base plate (1), a support plate (9) is fixedly connected to the upper end of the fixing rod (8), a semiconductor chip (7) is arranged on the upper side of the support plate (9), a plurality of pins (3) are fixedly connected to the front and rear sides of the semiconductor chip (7), and a packaging unit (6) and an upper cover (4) are arranged on the upper side of the base plate (1); The packaging unit (6) comprises a mounting block (601), the mounting block (601) being fixedly connected to the upper sides of the left and right ends of the bottom plate (1), a card slot (602) being provided on one side of the mounting block (601) on the left and right sides close to the upper cover (4), a card rod (606) being provided on the inner side of the card slot (602), a movable plate (605) being fixedly connected to the outer end of the card rod (606), a telescopic rod (603) and a spring (606) being fixedly connected between the movable plate (605) and the upper cover (4), 4), the upper sides of the movable plates (605) on the left and right sides are fixedly connected with connecting plates (607), the outer sides of the upper ends of the connecting plates (607) on the left and right sides are fixedly connected with top plates (608), a limiting rod (609) is provided on the outer side of the top plate (608), the upper end of the limiting rod (609) is fixedly connected with a pulling plate (612), a spring 2 (610) is fixedly connected between the pulling plate (612) and the top plate (608), and a limiting groove (613) is provided on the upper side of the upper cover (4).

2. The semiconductor integrated transistor packaging structure according to claim 1, wherein: The lower end of the limiting rod (609) passes through the outer side of the top plate (608), and the limiting rod (609) is adapted to be arranged in the limiting groove (613).

3. The semiconductor integrated transistor packaging structure according to claim 1, wherein: The connecting plate (607) is arranged in an L-shaped structure.

4. The semiconductor integrated transistor packaging structure according to claim 1, wherein: The clamping rod (606) is adapted to fit the clamping slot (602).

5. The semiconductor integrated transistor packaging structure according to claim 1, wherein: The connecting plate (607) is slidably connected to the upper cover (4).

6. The semiconductor integrated transistor packaging structure according to claim 1, wherein: Connecting grooves (5) adapted to the support block (2) are provided on both the front and rear sides of the upper cover (4).

Citation Information

Patent Citations

  • Semiconductor integrated transistor packaging structure

    CN221447153U