Non-polar charging circuit

Abstract

The utility model provides a non-polar charging circuit, which comprises four field effect transistors, when the input of an INPUT1 is a charging positive electrode and the input of an INPUT2 is a charging negative electrode, a field effect transistor Q1 and a field effect transistor Q4 are conducted, current flows from the INPUT1 to a VCC through the field effect transistor Q1, then flows from the VCC to a GND through an internal circuit, and then flows back to the INPUT2 through the field effect transistor Q4 from the GND; when the input of the I < NPUT1 > is a charging negative electrode and the input of the I < NPUT2 > is a charging positive electrode, the field effect transistor Q2 and the field effect transistor Q3 are conducted, current flows from the I < NPUT2 > to the VCC through the field effect transistor Q2, then flows from the VCC to the GND through an internal circuit, and then flows back to the I < NPUT1 > through the field effect transistor Q3, charging access positive and negative polarities do not need to be considered, the field effect transistor design is adopted completely, the voltage drop of the field effect transistor is small, larger current can pass through, and the charging capacity is improved. The circuit can be applied to a large-current charging circuit.

Description

Technical Field

[0001] The utility model relates to the technical field of charging, in particular to a non-polarity charging circuit. Background Art

[0002] Batteries have positive and negative polarity. Specifically, when charging, the positive terminal of the battery must be connected to the positive terminal of the charger, and the negative terminal of the battery must be connected to the negative terminal of the charger for normal charging. If the positive and negative terminals of the battery are connected to the positive and negative terminals of the charger, the battery will burn out. Existing non-polarity positive and negative charging circuits that do not require identification, such as the patent publication number CN217590318U, use two diodes and two field-effect transistors to achieve non-polarity positive and negative charging. However, due to the relatively large voltage drop of the diodes, the current that can pass through is small. This non-polarity charging circuit is not suitable for the high-current charging circuits of existing electronic products. Therefore, further improvement is needed. Utility Model Content

[0003] In view of this, the utility model provides a non-polarity charging circuit. Aiming at the problems of the prior art, four field effect transistors are designed to identify non-polarity charging, thereby solving the existing technical problems.

[0004] The purpose of this utility model is achieved through the following technical solutions:

[0005] A non-polarity charging circuit includes a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, and a field effect transistor Q4. The gate G of the field effect transistor Q1 is electrically connected to the input INPUT2, the gate G of the field effect transistor Q3, the drain D of the field effect transistor Q2, and the drain D of the field effect transistor Q4, respectively. The drain D of the field effect transistor Q1 is electrically connected to the input INPUT1, the drain D of the field effect transistor Q3, the gate G of the field effect transistor Q2, and the gate G of the field effect transistor Q4, respectively. The source S of the field effect transistor Q1 and the source S of the field effect transistor Q2 are electrically connected to the internal circuit power supply VCC, respectively. The source S of the field effect transistor Q3 and the source S of the field effect transistor Q4 are electrically connected to the internal circuit negative electrode GND, respectively.

[0006] The beneficial effects of the present invention are:

[0007] The utility model designs a non-polarity charging circuit including four field-effect transistors on a charging access circuit. When the input of INPUT1 is the positive charging electrode and the input of INPUT2 is the negative charging electrode, the field-effect transistors Q1 and Q4 are turned on, and current flows from INPUT1 through the field-effect transistor Q1 to VCC, then from VCC through the internal circuit to GND, and then from GND through the field-effect transistor Q4 back to INPUT2. When the input of INPUT1 is the negative charging electrode and the input of INPUT2 is the positive charging electrode, the field-effect transistors Q2 and Q3 are turned on, and current flows from INPUT2 through the field-effect transistor Q2 to VCC, then from VCC through the internal circuit to GND, and then from GND through the field-effect transistor Q3 back to INPUT1. When connecting for charging, the positive and negative polarity of the charging access does not need to be considered. Moreover, since all field-effect transistors are designed, the field-effect transistors have a small voltage drop, can pass a larger current, and are also well suited for circuits with large current charging. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 This is the circuit diagram of the non-polarity charging circuit in this utility model. DETAILED DESCRIPTION

[0009] The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0010] The following describes the embodiments of the present disclosure through specific concrete examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0011] In order to adapt to high current non-polarity charging, the specific contents of the utility model are as follows.

[0012] Combine Figure 1As shown, an embodiment of the present utility model is a non-polarity charging circuit, including a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, and a field effect transistor Q4. The gate G of the field effect transistor Q1 is electrically connected to the input I NPUT2, the gate G of the field effect transistor Q3, the drain D of the field effect transistor Q2, and the drain D of the field effect transistor Q4, respectively. The drain D of the field effect transistor Q1 is electrically connected to the input INPUT1, the drain D of the field effect transistor Q3, the gate G of the field effect transistor Q2, and the gate G of the field effect transistor Q4, respectively. The source S of the field effect transistor Q1 and the source S of the field effect transistor Q2 are electrically connected to the internal circuit power supply VCC, respectively. The source S of the field effect transistor Q3 and the source S of the field effect transistor Q4 are electrically connected to the negative electrode GND of the internal circuit, respectively.

[0013] The specific circuit operation principle is: when the input of I NPUT1 is the positive charging pole and the input of I NPUT2 is the negative charging pole, the field effect transistor Q1 and the field effect transistor Q4 are turned on, and the current flows from I NPUT1 through the field effect transistor Q1 to VCC, and then from VCC through the internal circuit to GND, and then from GND through the field effect transistor Q4 back to I NPUT2; when the input of I NPUT1 is the negative charging pole and the input of I NPUT2 is the positive charging pole, the field effect transistor Q2 and the field effect transistor Q3 are turned on, and the current flows from I NPUT2 through the field effect transistor Q2 to VCC, and then from VCC through the internal circuit to GND, and then from GND through the field effect transistor Q3 back to I NPUT1. When connecting for charging, there is no need to consider the positive and negative polarity of the charging connection, and all field effect transistors are designed. The field effect transistors have a small voltage drop and can pass a larger current, and can also be well applied to circuits with large current charging.

[0014] The above is only for explaining the implementation mode of the present invention and is not intended to limit the present invention. For those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present invention without creative work should be included in the scope of protection of the present invention.

Claims

1. A non-polarity charging circuit, characterized in that: It includes field effect transistor Q1, field effect transistor Q2, field effect transistor Q3, and field effect transistor Q4. The gate G of the field effect transistor Q1 is electrically connected to the input INPUT2, the gate G of the field effect transistor Q3, the drain D of the field effect transistor Q2, and the drain D of the field effect transistor Q4, respectively. The drain D of the field effect transistor Q1 is electrically connected to the input INPUT1, the drain D of the field effect transistor Q3, the gate G of the field effect transistor Q2, and the gate G of the field effect transistor Q4, respectively. The source S of the field effect transistor Q1 and the source S of the field effect transistor Q2 are electrically connected to the internal circuit power supply VCC, respectively. The source S of the field effect transistor Q3 and the source S of the field effect transistor Q4 are electrically connected to the negative electrode GND of the internal circuit, respectively.

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