Control architecture of inverter system

By adopting redundant DSP unit design in the inverter system, the problem of system crash caused by controller failure is solved, and high reliability and efficient operation of the system are achieved.

CN223402397UActive Publication Date: 2025-09-30NINGBO GINLONG TECH
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Patent Information

Application Number
CN202422640444.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-31
Publication Date
2025-09-30
Estimated Expiration
2034-10-31

AI Technical Summary

Technical Problem

The controllers of existing inverter systems lack redundant fault tolerance capabilities, resulting in system crashes in the event of a fault.

Method used

The system adopts redundant DSP unit design. Each group of DSP units is redundant to each other. They work together in normal operation. In case of failure, other DSP units will take over the task to ensure system reliability.

Benefits of technology

It improves the reliability and operational efficiency of the system, prevents faults from causing system failure, and achieves fast switching and seamless connection.

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Abstract

The utility model discloses a control architecture of an inverter system. The control architecture comprises at least one set of DSP units used for controlling corresponding function units of the system. The plurality of DSP units in each group are mutually redundant, and each DSP unit can execute all tasks of the corresponding functional unit; when the system works normally, each DSP unit outputs a signal for executing at least part of tasks of the corresponding functional unit; and when a faulty DSP unit occurs in the plurality of DSP units in each group, the other DSP units in the group are suitable for replacing the faulty DSP unit to output signals required by corresponding tasks. The system has the beneficial effects that through redundancy setting of the DSP unit, the reliability of the system can be higher, and system failure caused by a fault of the DSP unit is prevented.
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Description

Technical Field

[0001] The present application relates to the technical field of inverters, and in particular to a control architecture of an inverter system. Background Art

[0002] like Figure 1 The figure shows the structure of a typical photovoltaic inverter system. PV panels are connected to the grid after passing through a DC / DC unit and then a DC / AC unit. Generally, both the DC / DC unit and the DC / AC unit require a controller to control the circuitry. These controllers form the system's control architecture. However, typical controllers lack redundant fault-tolerant operation, so a failure in any one controller could cause the entire system to crash. Utility Model Content

[0003] One of the objectives of the present application is to provide a control architecture for an inverter system that can address at least one of the drawbacks of the above-mentioned background technology.

[0004] In order to achieve at least one of the above-mentioned purposes, the technical solution adopted in the present application is: a control architecture of an inverter system, comprising at least one group of DSP units for controlling the corresponding functional units of the system; the multiple DSP units in each group are redundant with each other and each DSP unit can perform all tasks of the corresponding functional unit; when the system is operating normally, each of the DSP units outputs a signal for executing at least part of the tasks of the corresponding functional unit; when a fault occurs in the multiple DSP units in each group, the remaining DSP units in the group are suitable for replacing the faulty DSP unit to output the signals required for the corresponding tasks.

[0005] Preferably, the tasks performed by the DSP unit include driving of functional units, information interaction and system protection; a plurality of circuit modules corresponding to all tasks are provided in the DSP unit, and signals for performing different tasks are output by activating different circuit modules.

[0006] Preferably, the multiple DSP units in each group respectively activate different circuit modules to output signals for executing different tasks of the corresponding functional units when the system is operating normally, and then all the tasks of the corresponding functional units are executed through the joint work of all the DSP units in each group; when some of the DSP units in each group fail, the remaining DSP units increase the number of activated circuit modules to replace the failed DSP units to output the signals required for the corresponding tasks.

[0007] Preferably, the control architecture further comprises a CPLD unit connecting each of the DSP units and each functional unit; the CPLD unit is suitable for communicating all of the DSP units in each group with the corresponding functional units.

[0008] Preferably, the multiple DSP units in each group are divided into a main control DSP unit and a redundant DSP unit; when the system is operating normally, all the circuit modules of the main control DSP unit are activated to execute all the tasks of the corresponding functional unit; when the main control DSP unit fails, the redundant DSP unit replaces the main control DSP unit by activating all the circuit modules to execute all the tasks of the corresponding functional unit.

[0009] Preferably, the control architecture further includes a CPLD unit, which is connected to the main control DSP unit, the redundant DSP unit and each functional unit; the main control DSP unit and the redundant DSP unit simultaneously activate all the circuit modules; the CPLD unit is suitable for communicating between the main control DSP unit and the corresponding functional unit when the system is operating normally; the CPLD unit is suitable for communicating between the redundant DSP unit and the corresponding functional unit when the main control DSP unit fails.

[0010] Preferably, the control architecture further includes a collection unit, which is suitable for collecting the voltage and current of the functional unit when it is working and feeding back the data to the DSP unit.

[0011] Preferably, the control architecture also includes a communicatively connected ARM unit and a master control unit, wherein the ARM unit is communicatively connected to all the DSP units; the master control unit is suitable for issuing control instructions to the ARM according to the task requirements of the functional units, and the ARM is suitable for distributing the received control instructions to the corresponding DSP units.

[0012] Preferably, the system has multiple functional units, and the DSP units are used in a group, and each of the DSP units can control the functional units to perform all tasks at the same time.

[0013] Preferably, the system has multiple functional units, and the number of groups of the DSP units corresponds to the number of functional units; any one of the DSP units in each group can perform all tasks of the corresponding functional unit.

[0014] Compared with the prior art, the present invention has the following advantages:

[0015] By setting up redundant DSP units, the system reliability can be improved, preventing system failure caused by a DSP unit failure. The system operation efficiency can be improved by the division of labor and cooperation between different DSP units. Or, by running different DSP units in parallel, rapid switching can be performed when a failure occurs, further improving the system reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The figure is a structural diagram of an existing photovoltaic inverter system.

[0017] Figure 2 This is a schematic diagram of the architecture of Example 1 in this application.

[0018] Figure 3 This is a schematic diagram of the architecture of Example 2 in this application.

[0019] Figure 4 This is a schematic diagram of the working logic of one example of Embodiment 1 in this application under normal circumstances.

[0020] Figure 5 This is a schematic diagram of the working logic of one example of the first embodiment of the present application under a fault condition.

[0021] Figure 6 This is a schematic diagram of the working logic of another example of Embodiment 1 in this application under normal circumstances.

[0022] Figure 7 This is a schematic diagram of the working logic of another example of embodiment 1 in the present application under a fault condition. DETAILED DESCRIPTION

[0023] Below, the present application is further described in conjunction with specific implementation methods. It should be noted that, in the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" and the like are intended to mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms should not be understood as necessarily referring to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0024] In the description of this application, it should be noted that for directional words, such as the terms "center", "horizontal", "longitudinal", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and so on, the directions and positional relationships indicated are based on the directions or positional relationships shown in the accompanying drawings, which are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and cannot be understood as limiting the specific scope of protection of this application.

[0025] It should be noted that the terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0026] In this application, unless otherwise expressly specified or limited, terms such as "mounted," "connected," "connect," and "fixed" should be understood broadly. For example, they may refer to connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0027] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0028] The terms "comprises" and "having" and any variations thereof in the specification and claims of this application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus that includes a series of steps or units is not necessarily limited to those steps or units expressly listed, but may include other steps or units not expressly listed or inherent to such process, method, product or apparatus.

[0029] One of the preferred embodiments of this application is as follows: Figure 2 and Figure 3 The control architecture of an inverter system includes at least one group of DSP units for controlling corresponding functional units of the system. The multiple DSP units in each group are redundant and each DSP unit can perform all the tasks of the corresponding functional unit. During normal system operation, each DSP unit outputs a signal to execute at least part of the tasks of the corresponding functional unit. If a DSP unit in each group fails, the remaining DSP units in the group are adapted to replace the failed DSP unit and output the signals required for the corresponding task. This redundant configuration of DSP units enhances system reliability and prevents system failure caused by DSP unit failure.

[0030] It's understandable that within an inverter system, there are multiple functional units, each of which performs a variety of tasks, such as driving the functional unit, information exchange, and system protection. These tasks require the corresponding DSP unit to send corresponding signals for implementation. Specifically, the DSP unit contains multiple circuit modules corresponding to all of these tasks. Activating different circuit modules generates different signals, which are used to control the functional units to perform different tasks. In other words, each DSP unit has the ability to send signals to control the corresponding functional unit to perform all of its tasks.

[0031] When the inverter system is operating normally (i.e., all DSP units are fault-free), each DSP unit can activate some or all of its own circuit modules to perform some or all of the tasks of the corresponding functional unit. If a DSP unit fails, other DSP units in the same group can replace the failed DSP unit and activate the corresponding circuit modules to perform the corresponding tasks.

[0032] It should be noted that the functional units of the inverter system primarily include the DC / DC unit and the DC / AC unit. Therefore, the driving task of the functional unit is to perform loop control and timing logic for the DC / DC unit and the DC / AC unit. The information interaction task of the functional unit primarily involves exchanging status information during the operation of the DC / DC unit and the DC / AC unit to monitor their operating status in real time. The system protection task of the functional unit primarily involves controlling the system protection circuit during the operation of the DC / DC unit and the DC / AC unit to ensure that the DC / DC unit and the DC / AC unit do not affect other modules of the inverter system during operation, thereby ensuring the safe operation of the inverter system.

[0033] It is understandable that there are many specific configuration methods for the control architecture based on the multiple functional units included in the inverter system. For ease of understanding, two embodiments will be used for detailed description below.

[0034] Example 1:

[0035] In this embodiment, Figure 2 As shown, the number of DSP unit groups is equal to the number of functional units, and any DSP unit in each group can perform all tasks of the corresponding functional unit.

[0036] Specifically, such as Figure 2As shown, taking the example of a functional unit including a DC / DC unit and a DC / AC unit, there are two groups of DSP units. In one group of DSP units corresponding to the DC / DC unit, each DSP unit can perform all the tasks corresponding to the DC / DC unit; in another group of DSP units corresponding to the DC / AC unit, each DSP unit can perform all the tasks corresponding to the DC / AC unit.

[0037] In this embodiment, there are multiple specific control modes for each group of DSP units to control the corresponding functional units. For ease of understanding, two specific examples are used below to provide a detailed description.

[0038] Example 1: Figure 4 and Figure 5 As shown, when the system is operating normally, the multiple DSP units in each group activate different circuit modules to output signals that execute the different tasks of the corresponding functional units. All DSP units in each group work together to execute all the tasks of the corresponding functional units. If some DSP units in each group fail, the remaining DSP units increase the number of activated circuit modules to replace the failed DSP units and output the signals required for the corresponding tasks.

[0039] For ease of understanding, the following detailed description uses the example of a functional unit consisting of a DC / DC unit and a DC / AC unit. The specific number of DSP units in each group can be selected based on actual needs. For ease of description, the following description assumes that each group has two DSP units. The two DSP units corresponding to the DC / DC unit are labeled DSP_DC / DC#1 and DSP_DC / DC#2, and the two DSP units corresponding to the DC / AC unit are labeled DSP_DC / AC#1 and DSP_DC / AC#2.

[0040] like Figure 4 As shown, when the inverter system is operating normally, the circuit modules corresponding to the drive tasks of DSP_DC / DC#1 are activated, allowing DSP_DC / DC#1 to perform conventional DC / DC unit loop control and timing logic, while the circuit modules corresponding to tasks such as DC / DC unit information exchange and system protection are inactivated. Simultaneously, DSP_DC / DC#2 can activate the circuit modules corresponding to tasks such as information exchange and system protection, allowing DSP_DC / DC#2 to perform tasks such as DC / DC unit information exchange and system protection, while the circuit modules corresponding to tasks such as DC / DC unit loop control and timing logic are inactivated. Similarly, DSP_DC / AC#1 only performs conventional DC / AC unit loop control and timing logic, while DSP_DC / AC#2 only performs tasks such as DC / AC unit information exchange and system protection.

[0041] It's understandable that DSP_DC / DC#1 and DSP_DC / AC#1 can be defined as master DSP units, while DSP_DC / DC#2 and DSP_DC / AC#2 can be defined as redundant DSP units. In this example, the master DSP unit can normally focus on control loop calculations, while the redundant DSP units can handle other tasks. This allows for effective division of labor and higher system efficiency.

[0042] like Figure 5 As shown, if DSP_DC / DC#2 fails, DSP_DC / DC#1 will take over all tasks; that is, all circuit modules of DSP_DC / DC#1 will be activated to perform conventional DC / DC unit loop control and timing logic tasks, while also performing DC / DC unit information exchange and system protection tasks. Similarly, if DSP_DC / AC#2 fails, DSP_DC / AC#1 will take over all tasks; that is, all circuit modules of DSP_DC / AC#1 will be activated to perform conventional DC / AC unit loop control and timing logic tasks, while also performing DC / AC unit information exchange and system protection tasks.

[0043] It is understandable that because the redundant DSP unit does not participate in the loop calculation under normal circumstances, there is no need to perform control loop switching after a fault. The switching is relatively simple, and non-emergency tasks such as information interaction and system protection only need to be executed on the main control DSP unit.

[0044] If DSP_DC / DC#1 fails, DSP_DC / DC#2 will take over all tasks. That is, all circuit modules of DSP_DC / DC#2 will be activated to perform conventional DC / DC unit loop control and timing logic tasks, as well as DC / DC unit information exchange and system protection tasks. Similarly, if DSP_DC / AC#1 fails, DSP_DC / AC#2 will take over all tasks. That is, all circuit modules of DSP_DC / AC#2 will be activated to perform conventional DC / AC unit loop control and timing logic tasks, as well as DC / AC unit information exchange and system protection tasks.

[0045] Understandably, because the redundant DSP unit does not participate in the loop calculation under normal circumstances, a control loop switch is required after a fault. To ensure smooth control loop switch, the main control DSP unit can transmit the control loop integral value to the redundant DSP unit via SCI communication.

[0046] In this example, Figure 2As shown, the control architecture further includes a CPLD unit connecting each DSP unit and each functional unit; the CPLD unit can communicate with all DSP units in each group and the corresponding functional units.

[0047] Specifically, the CPLD unit manages digital signals. For example, a functional unit includes a DC / DC unit and a DC / AC unit. When the DSP unit performs its functional unit tasks, the drive signals output by DSP_DC / DC#1, DSP_DC / DC#2, DSP_DC / AC#1, and DSP_DC / AC#2 are fed into the CPLD unit. The CPLD then manages and transmits the drive signals from the two DSP units to the drive circuits of the DC / DC and DC / AC units, respectively, for control. During operation, the DC / DC and DC / AC units provide status information, such as voltage, current, and temperature, back to the CPLD unit. The CPLD then manages and transmits this status information to each DSP unit in each group.

[0048] Example 2: For example Figure 6 and Figure 7 As shown, the multiple DSP units in each group can be divided into a master DSP unit and a redundant DSP unit. During normal operation, the inverter system activates all circuit modules of the master DSP unit to execute all tasks of the corresponding functional unit. If the master DSP unit fails, the redundant DSP unit activates all circuit modules to replace the master DSP unit and execute all tasks of the corresponding functional unit.

[0049] Specifically, in this example, each DSP unit in each group is in an activated state with all circuit modules during normal system operation. That is, the multiple DSP units in each group operate in parallel, but only the signals generated by one of these DSP units can be output. This DSP unit is the master DSP unit, and the remaining DSP units are redundant DSP units. This allows for rapid switching between the master DSP unit and the failed DSP unit, without the need to reactivate the circuit modules. This makes inverter system control more reliable and the switching process seamless.

[0050] In this example, Figure 2 、 Figure 6 and Figure 7As shown, the control architecture also includes a CPLD unit, which can selectively output the signals generated by the parallel DSP units. The CPLD unit is connected to the master DSP unit, redundant DSP units, and each functional unit. The master and redundant DSP units can activate all circuit modules to generate corresponding signals. When the inverter system is operating normally, the CPLD unit enables communication between the master DSP unit and the corresponding functional unit. If the master DSP unit fails, the CPLD unit can switch the redundant DSP unit to communicate with the corresponding functional unit.

[0051] For ease of understanding, the following detailed description uses the DC / DC unit and the DC / AC unit as an example. DSP_DC / DC#1 and DSP_DC / DC#2, which perform all the tasks of the DC / DC unit and the DC / AC unit, and DSP_DC / AC#1 and DSP_DC / AC#2, can serve as the master DSP unit, while DSP_DC / DC#2 and DSP_DC / AC#2 serve as redundant DSP units.

[0052] like Figure 6 As shown, when the inverter system is operating normally, all circuit modules of DSP_DC / DC#1, DSP_DC / DC#2, DSP_DC / AC#1, and DSP_DC / AC#2 are activated, enabling DSP_DC / DC#1, DSP_DC / DC#2, DSP_DC / AC#1, and DSP_DC / AC#2 to respectively perform loop control, timing logic, information exchange, and system protection for the DC / DC and DC / AC units. At this time, after receiving signals generated by DSP_DC / DC#1, DSP_DC / DC#2, DSP_DC / AC#1, and DSP_DC / AC#2, the CPLD unit only selects the signals of DSP_DC / DC#1 and DSP_DC / AC#1, enabling DSP_DC / DC#1 to communicate with the DC / DC unit and DSP_DC / AC#1 to communicate with the DC / AC unit.

[0053] In the event of a failure, assuming that DSP_DC / DC#2 and / or DSP_DC / AC#2, which serve as redundant DSP units, fail, since the functional units are communicating with the main control DSP unit at this time, it is only necessary to keep DSP_DC / DC#2 and / or DSP_DC / AC#2 in operation. No other changes are required. The switching process in this scenario is very simple.

[0054] Assume that DSP_DC / DC#1 and / or DSP_DC / AC#1 as the master DSP unit fails. Figure 7 As shown, DSP_DC / DC#1 and / or DSP_DC / AC#1 will exit operation. At this point, DSP_DC / DC#2 and / or DSP_DC / AC#2, acting as redundant DSP units, will replace DSP_DC / DC#1 and / or DSP_DC / AC#1. That is, the CPLD unit will select the signals generated by DSP_DC / DC#2 and / or DSP_DC / AC#2, acting as redundant DSP units, enabling DSP_DC / DC#2 and / or DSP_DC / AC#2, acting as redundant DSP units, to communicate with the corresponding functional units. The entire control process in this scenario is also relatively simple.

[0055] In this embodiment, Figure 2 As shown, the control architecture further includes a collection unit, which can collect the voltage and current of the functional unit when it is working and feed it back to the DSP unit.

[0056] Specifically, taking the example of a functional unit including a DC / DC unit and a DC / AC unit, the acquisition unit can simulate the voltage and current of the DC / DC unit and the DC / AC unit during operation and simultaneously send them to DSP_DC / DC#1 and DSP_DC / DC#2, as well as DSP_DC / AC#1 and DSP_DC / AC#2. DSP_DC / DC#1, DSP_DC / DC#2, DSP_DC / AC#1, and DSP_DC / AC#2 then perform control loop calculations for the DC / DC unit and the DC / AC unit based on the received voltage and current information.

[0057] In this embodiment, Figure 2 As shown, the control architecture also includes a communicatively connected ARM unit and a master control unit. The master control unit is responsible for controlling the operation of the entire inverter system. The ARM unit can communicate with all DSP units to forward signals. The master control unit can issue control instructions to the ARM based on the task requirements of the functional units, and the ARM can distribute the received control instructions to the corresponding DSP unit.

[0058] It is understood that there are many types of master control units, with host computers and LCD controllers being common. The specific operating principles are well known to those skilled in the art and will not be elaborated on in detail here. The ARM and DSP units can communicate in various ways, such as using a CAN bus. Point-to-point communication is used between the ARM and the master control unit, using various specific methods, such as a serial port using the UART protocol. The individual DSP units in each group can also communicate with each other to facilitate information exchange in the event of a fault, using various specific methods, such as the SCI communication protocol.

[0059] Example 2:

[0060] The difference between this embodiment and the first embodiment is that: Figure 3 As shown, there is only one group of DSP units, and each DSP unit can simultaneously control each functional unit to perform all tasks.

[0061] Specifically, such as Figure 3 As shown, the functional units include a DC / DC unit and a DC / AC unit as an example; there are multiple specific numbers of DPS units in this group, which can be selected according to the actual needs of those skilled in the art; for the convenience of description, the number of DSP units in this group is two as an example, marked as DSP#1 and DSP#2 respectively. Then, DSP#1 and DSP#2 can both simultaneously control the DC / DC unit and the DC / AC unit to perform tasks such as loop control, timing logic, information exchange, and system protection. The specific control methods of DSP#1 and DSP#2 over the corresponding functional units are similar to those in the above-mentioned embodiment 1, so they will not be repeated here. For details, please refer to Example 1 and Example 2 in the above-mentioned embodiment 1.

[0062] The above describes the basic principles, main features, and advantages of the present application. Those skilled in the art should understand that the present application is not limited to the above embodiments. The above embodiments and descriptions merely illustrate the principles of the present application. Various changes and improvements may be made to the present application without departing from the spirit and scope of the present application. These changes and improvements fall within the scope of the present application for which system protection is sought. The scope of system protection claimed by the present application is defined by the appended claims and their equivalents.

Claims

1. A control architecture for an inverter system, characterized in that: The system comprises at least one group of DSP units for controlling corresponding functional units of the system; the multiple DSP units in each group are mutually redundant and each DSP unit can perform all tasks of the corresponding functional unit; When the system is operating normally, each of the DSP units outputs a signal for executing at least part of the task of the corresponding functional unit; When a faulty DSP unit occurs in the plurality of DSP units in each group, the remaining DSP units in the group are adapted to replace the faulty DSP unit to output signals required for corresponding tasks.

2. The control architecture of the inverter system according to claim 1, wherein: The tasks performed by the DSP unit include driving the functional units, information interaction and system protection; The DSP unit is provided with a plurality of circuit modules corresponding to all tasks, and signals for executing different tasks are output by activating different circuit modules.

3. The control architecture of the inverter system according to claim 2, wherein: When the system is operating normally, the multiple DSP units in each group respectively activate different circuit modules to output signals for executing different tasks of the corresponding functional units, and then all the tasks of the corresponding functional units are executed through the joint operation of all the DSP units in each group; When some of the DSP units in each group fail, the remaining DSP units increase the number of activated circuit modules to replace the failed DSP units to output signals required for the corresponding tasks.

4. The control architecture of the inverter system according to claim 3, wherein: The control architecture further includes a CPLD unit connecting each of the DSP units and each functional unit; The CPLD unit is adapted to enable all the DSP units of each group to communicate with corresponding functional units.

5. The control architecture of the inverter system according to claim 2, wherein: The multiple DSP units in each group are divided into a main control DSP unit and a redundant DSP unit; When the system is operating normally, all the circuit modules of the main control DSP unit are activated to execute all the tasks of the corresponding functional units; When the main control DSP unit fails, the redundant DSP unit activates all the circuit modules to replace the main control DSP unit to perform all the tasks of the corresponding functional unit.

6. The control architecture of the inverter system according to claim 5, wherein: The control architecture further includes a CPLD unit, which is connected to the main control DSP unit, the redundant DSP unit and each functional unit; The main control DSP unit and the redundant DSP unit activate all the circuit modules simultaneously; the CPLD unit is adapted to communicate the main control DSP unit with the corresponding functional unit when the system is operating normally; The CPLD unit is adapted to enable the redundant DSP unit to communicate with the corresponding functional unit when the main control DSP unit fails.

7. The control architecture of the inverter system according to claim 1, wherein: The control architecture further includes a collection unit, which is adapted to collect voltage and current when the functional unit is working and feed the data back to the DSP unit.

8. The control architecture of the inverter system according to claim 1, wherein: The control architecture further includes an ARM unit and a master control unit in communication connection, wherein the ARM unit is in communication connection with all the DSP units; The master control unit is adapted to issue control instructions to the ARM according to the task requirements of the functional units, and the ARM is adapted to distribute the received control instructions to the corresponding DSP units.

9. The control architecture of the inverter system according to any one of claims 1 to 8, wherein: The system has multiple functional units, and the DSP units are used in a group. Each of the DSP units can simultaneously control the functional units to perform all tasks.

10. The control architecture of the inverter system according to any one of claims 1 to 8, wherein: The system has multiple functional units, and the number of groups of the DSP units corresponds to the number of functional units; any one of the DSP units in each group can perform all the tasks of the corresponding functional unit.