Charging circuit for improving loop stability, charging equipment and electronic equipment
By introducing a current mirror circuit and a frequency compensation circuit into the charging circuit, the problem of charging circuit instability is solved, a stable charging process and controllable current magnitude are achieved, and the stability of electronic devices is improved.
Patent Information
- Application Number
- CN202423321634.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2034-12-31
AI Technical Summary
During the charging process, the charging circuit may become unstable due to poor frequency response, or even oscillate, affecting the normal operation of electronic devices.
A current mirror circuit, a frequency compensation circuit, and a voltage detection circuit are introduced into the charging circuit. The energy storage module is connected through a current control branch and a current mirror branch. Frequency compensation and current control are performed using an operational amplifier and a combination of capacitors and resistors to ensure circuit stability.
The stability of the charging circuit has been improved, ensuring that the charging current of the energy storage module is controllable, reducing the number of components and costs, and achieving a stable charging process.
Smart Images
Figure CN223486430U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of charging, and in particular to a charging circuit, charging device, and electronic device that improves loop stability. Background Technology
[0002] Electronic devices typically rely on a power supply to operate. During the charging process, which involves complex components that may generate signals of various frequencies, the charging circuitry is crucial. Poor frequency response of these signals can lead to circuit instability or even oscillation. Therefore, ensuring the stability of the charging circuit is extremely important.
[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Utility Model Content
[0004] To provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended as a general commentary, nor is it intended to identify key / important components or describe the scope of protection of these embodiments, but rather as a prelude to the detailed description that follows.
[0005] This application provides a charging circuit, charging device, and electronic device that improve loop stability, thereby enhancing the stability of the charging circuit.
[0006] This application provides a charging circuit, including: a current mirror circuit, the current mirror circuit including a current control branch and a current mirror branch connected to the current control branch; the current mirror branch is used to connect to an energy storage module; the connection point between the current control branch and the current mirror branch is the current control terminal of the current mirror circuit; a frequency compensation circuit connected to the current control branch; a first operational amplifier, the first input terminal of the first operational amplifier is used to receive a first preset reference voltage signal; the second input terminal of the first operational amplifier is used to receive a voltage signal reflecting the current magnitude of the current control branch; the output terminal of the first operational amplifier is connected to the current control terminal; a voltage detection circuit is used to connect to the energy storage module to detect the voltage of the energy storage module; a second operational amplifier, the second input terminal of the second operational amplifier is used to receive a second preset reference voltage signal; the first input terminal of the second operational amplifier is used to receive the voltage of the energy storage module; the output terminal of the second operational amplifier is connected to the third input terminal of the first operational amplifier.
[0007] In the above embodiment, by adding a frequency compensation circuit connected to the current control branch in the charging circuit, the frequency compensation circuit can perform frequency compensation on the mirror current circuit, thereby improving the circuit stability.
[0008] Furthermore, the current control branch includes: a first controlled switch, the first end of which is connected to a preset power supply; the control end of the first controlled switch is connected to the current mirror branch; and a first resistor, the first end of which is connected to the second end of the first controlled switch and the second input end of the first operational amplifier, and the second end of the first resistor is grounded.
[0009] In the above embodiment, by setting a first resistor in the current control branch, the current magnitude of the current control branch can be limited by the resistance value of the first resistor. Since the current mirror branch can mirror the current of the current control branch, and the current mirror branch is used to connect to the energy storage module to charge the energy storage module, this circuit design allows for easy control of the charging current of the energy storage module.
[0010] Furthermore, the current mirror branch includes: a second controlled switch, the first end of the second controlled switch being connected to a preset power supply, the second end of the second controlled switch being used to connect to the energy storage module, and the control end of the second controlled switch being connected to the current control branch.
[0011] In the above embodiment, a mirror current circuit is formed by the first controlled switch, the second controlled switch and the first resistor. The number of devices used to achieve current mirroring is small and the cost is low.
[0012] Furthermore, the frequency compensation circuit includes: a first capacitor, the first end of which is connected to the control terminal of the first controlled switch; a second resistor, the first end of which is connected to the second end of the first capacitor; and the second end of which is connected to the first end of the first resistor.
[0013] In the above embodiment, by adding a first capacitor, a large capacitor can be equivalently applied to the current control terminal of the current mirror circuit to achieve frequency compensation of the charging circuit. By adding a second resistor, the impact of the zero point caused by the addition of the first capacitor on the stability of the charging circuit can be suppressed. This improves the stability of the charging circuit.
[0014] Furthermore, the voltage detection circuit includes: a third resistor, the first end of which is connected to the positive terminal of the energy storage module; a fourth resistor, the first end of which is connected to the second end of the third resistor and the first input terminal of the second operational amplifier; and the second end of the fourth resistor is grounded.
[0015] In the above implementation, the voltage of the current energy storage module can be easily reflected by the third and fourth resistors, so as to facilitate subsequent determination of whether the energy storage module needs to stop charging.
[0016] Furthermore, the charging circuit also includes an auxiliary mirror circuit, used to make the output voltage of the second terminal of the first controlled switch equal to the output voltage of the second terminal of the second controlled switch.
[0017] In the above embodiment, by adding an auxiliary mirror circuit, the output voltage of the second terminal of the first controlled switch is made equal to the output voltage of the second terminal of the second controlled switch, which makes it easier to control the charging current of the energy storage module more accurately.
[0018] Furthermore, the auxiliary mirror circuit includes: a third controlled switch, wherein the first resistor is connected to the second terminal of the first controlled switch through the third controlled switch; a third operational amplifier, wherein the first input terminal of the third operational amplifier is connected to the second terminal of the first controlled switch, and the second input terminal of the third operational amplifier is connected to the second terminal of the second controlled switch; and the output terminal of the third operational amplifier is connected to the control terminal of the third controlled switch.
[0019] In the above embodiment, the third operational amplifier can clamp the second terminals of the first and second controlled switches to improve the accuracy of current replication between the first and second controlled switches. Simultaneously, the output of the third operational amplifier is connected to the control terminal of the third controlled switch, enabling the third controlled switch to function as a source follower.
[0020] Furthermore, the first controlled switch is a PMOS transistor or a PNP transistor, and the second controlled switch is a PMOS transistor or a PNP transistor.
[0021] In the above embodiments, based on the characteristic that the gate voltage of a PMOS transistor controls its drain current, or the characteristic that the base voltage of a PNP transistor controls its collector current, a mirrored current can be achieved.
[0022] This application provides a charging device including the charging circuit described above.
[0023] This application provides an electronic device, including the charging circuit described above and an energy storage module connected to the charging circuit described above.
[0024] The above general description and the description below are exemplary and illustrative only and are not intended to limit this application. Attached Figure Description
[0025] One or more embodiments are exemplarily described by corresponding drawings. These exemplary descriptions and drawings do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements. The drawings do not constitute a scale limitation. In addition,
[0026] Figure 1 This is a schematic diagram of the structure of the first charging circuit provided in the embodiments of this application;
[0027] Figure 2 This is a schematic diagram of the structure of the second charging circuit provided in the embodiments of this application;
[0028] Figure 3 This is a schematic diagram of the third charging circuit provided in the embodiments of this application.
[0029] Figure label:
[0030] 1: Current mirror circuit; 2: Frequency compensation circuit; 3: First operational amplifier; 4: Voltage detection circuit; 5: Second operational amplifier; 6: First PMOS transistor; 7: Second PMOS transistor; 8: First resistor; 9: First capacitor; 10: Third resistor; 11: Fourth resistor; 12: Second resistor; 13: Third operational amplifier; 14: Third PMOS transistor. Detailed Implementation
[0031] To provide a more detailed understanding of the features and technical content of the embodiments of this disclosure, the implementation of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for illustrative purposes only and are not intended to limit the embodiments of this disclosure. In the following technical description, for ease of explanation, several details are used to provide a full understanding of the disclosed embodiments. However, one or more embodiments may still be implemented without these details. In other cases, well-known structures and devices may be simplified in their depiction to simplify the drawings.
[0032] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this disclosure described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.
[0033] Furthermore, the terms "set up," "connect," and "fix" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of this disclosure according to the specific circumstances.
[0034] Unless otherwise stated, the term "multiple" means two or more.
[0035] It should be noted that, unless otherwise specified, the embodiments and features described in the present disclosure can be combined with each other.
[0036] Example 1
[0037] Combination Figure 1 As shown in the illustration, this application provides a charging circuit, including: a current mirror circuit 1, a frequency compensation circuit 2, a first operational amplifier 3, a voltage detection circuit 4, and a second operational amplifier 5. The current mirror circuit 1 includes a current control branch and a current mirror branch connected to the current control branch; the current mirror branch is used to connect to an energy storage module; the connection point between the current control branch and the current mirror branch is the current control terminal of the current mirror circuit 1. The frequency compensation circuit 2 is connected to the current control branch. The first input terminal of the first operational amplifier 3 is used to receive a first preset reference voltage signal, the second input terminal of the first operational amplifier 3 is used to receive a voltage signal reflecting the current magnitude of the current control branch, and the output terminal of the first operational amplifier 3 is connected to the current control terminal. The voltage detection circuit 4 is used to connect to the energy storage module to detect the voltage of the energy storage module. The second input terminal of the second operational amplifier 5 is used to receive a second preset reference voltage signal, the first input terminal of the second operational amplifier 5 is used to receive the voltage of the energy storage module, and the output terminal of the second operational amplifier 5 is connected to the third input terminal of the first operational amplifier 3.
[0038] Combination Figure 1 and Figure 2 As shown, in some embodiments, the current control branch includes a first controlled switch and a first resistor 8. A first terminal of the first controlled switch is connected to a preset power supply, and a control terminal of the first controlled switch is connected to a current mirror branch. A first terminal of the first resistor 8 is connected to a second terminal of the first controlled switch and a second input terminal of the first operational amplifier 3, and the second terminal of the first resistor 8 is grounded.
[0039] In the above embodiment, the first resistor 8 can be an adjustable resistor. This allows for convenient adjustment of the resistance value of the first resistor 8, thereby controlling the current magnitude of the current control branch and consequently controlling the current magnitude for charging the energy storage module.
[0040] In the above embodiments, the first controlled switch is a PMOS transistor or a PNP transistor.
[0041] In some embodiments, the current mirror branch includes a second controlled switch. A first terminal of the second controlled switch is connected to a preset power supply, a second terminal of the second controlled switch is used to connect to an energy storage module, and a control terminal of the second controlled switch is connected to a current control branch.
[0042] In the above embodiments, the second controlled switch is a PMOS transistor or a PNP transistor.
[0043] Combination Figure 1 and Figure 2 As shown, in some embodiments, the frequency compensation circuit 2 includes a first capacitor 9 and a second resistor 12. A first terminal of the first capacitor 9 is connected to the control terminal of a first controlled switch. A first terminal of the second resistor 12 is connected to a second terminal of the first capacitor 9, and a second terminal of the second resistor 12 is connected to a first terminal of the first resistor 8.
[0044] In some embodiments, the voltage detection circuit 4 includes a third resistor 10 and a fourth resistor 11. The first terminal of the third resistor 10 is connected to the positive terminal of the energy storage module. The first terminal of the fourth resistor 11 is connected to the second terminal of the third resistor 10 and the first input terminal of the second operational amplifier; the second terminal of the fourth resistor 11 is grounded.
[0045] For example, the energy storage module is a battery.
[0046] For example, in combination Figure 2As shown, the first controlled switch is a first PMOS transistor 6. The second controlled switch is a second PMOS transistor 7. The source of the first PMOS transistor 6 is connected to a preset power supply (VDD), and the drain of the first PMOS transistor 6 is connected to the first terminal of the first resistor 8 and the second input terminal of the first operational amplifier 3. The second terminal of the first resistor 8 is grounded. The source of the second PMOS transistor 7 is connected to the preset power supply, and the gate of the second PMOS transistor 7 is connected to the gate of the first PMOS transistor 6 and the output terminal of the first operational amplifier 3. The drain of the second PMOS transistor 7 is connected to the first terminal of the third resistor 10. The drain of the second PMOS transistor 7 is also used to connect to the energy storage module (VBAT). The second terminal of the third resistor 10 is connected to the first terminal of the fourth resistor 11 and the first input terminal of the second operational amplifier 5. The second terminal of the fourth resistor 11 is grounded. The second input terminal of the second operational amplifier 5 is used to receive a second preset reference voltage signal (VREF2), and the output terminal of the second operational amplifier 5 is connected to the third input terminal of the first operational amplifier 3. The first input terminal of the first operational amplifier 3 is used to receive a first preset reference voltage signal (VREF1). The first terminal of the first capacitor 9 is connected to the gate of the first PMOS transistor 6, the second terminal of the first capacitor 9 is connected to the first terminal of the second resistor 12, and the second terminal of the second resistor 12 is connected to the first terminal of the first resistor 8.
[0047] For example, the first controlled switch is a first PNP transistor. The second controlled switch is a second PNP transistor. The emitter of the first PNP transistor is connected to a preset power supply, and the collector of the first PNP transistor is connected to the first terminal of the first resistor 8 and the second input terminal of the first operational amplifier 3. The second terminal of the first resistor 8 is grounded. The emitter of the second PNP transistor is connected to the preset power supply, and the base of the second PNP transistor is connected to the base of the first PNP transistor and the output terminal of the first operational amplifier 3. The collector of the second PNP transistor is connected to the first terminal of the third resistor 10. The collector of the second PNP transistor is also used to connect to an energy storage module. The second terminal of the third resistor 10 is connected to the first terminal of the fourth resistor 11 and the first input terminal of the second operational amplifier 5. The second terminal of the fourth resistor 11 is grounded. The second input terminal of the second operational amplifier 5 is used to receive a second preset reference voltage signal, and the output terminal of the second operational amplifier 5 is connected to the third input terminal of the first operational amplifier 3. The first input terminal of the first operational amplifier 3 is used to receive a first preset reference voltage signal. The first terminal of the first capacitor 9 is connected to the base of the first PNP transistor, the second terminal of the first capacitor 9 is connected to the first terminal of the second resistor 12, and the second terminal of the second resistor 12 is connected to the first terminal of the first resistor 8.
[0048] In some embodiments, the charging circuit further includes an auxiliary mirror circuit. The auxiliary mirror circuit is used to make the output voltage at the second terminal of the first controlled switch equal to the output voltage at the second terminal of the second controlled switch.
[0049] In the above embodiment, the auxiliary mirror circuit includes a third controlled switch and a third operational amplifier 13. A first resistor 8 is connected to the second terminal of the first controlled switch via the third controlled switch. The first input terminal of the third operational amplifier 13 is connected to the second terminal of the first controlled switch, and the second input terminal of the third operational amplifier 13 is connected to the second terminal of the second controlled switch; the output terminal of the third operational amplifier 13 is connected to the control terminal of the third controlled switch. In this way, the third operational amplifier can clamp the drains of the first and second controlled switches, ensuring high accuracy in current replication between the first and second controlled switches. Simultaneously, if the drain voltage of the first controlled switch increases, a low signal is output to the gate terminal of the third controlled switch after passing through the third operational amplifier. Since the current flowing through the third controlled switch remains unchanged, the source voltage of the third controlled switch will decrease as the gate voltage decreases, achieving a stable effect.
[0050] The third controlled switch can be any component that is controlled to turn on and off in the prior art, such as a MOS (Metal-Oxide-Semiconductor Field-Effect Transistor), a transistor, a relay, an optocoupler, a thyristor, etc., and is not limited here.
[0051] For example, in combination Figure 3As shown, the first controlled switch is the first PMOS transistor 6. The second controlled switch is the second PMOS transistor 7. The source of the first PMOS transistor 6 is connected to a preset power supply. The drain of the first PMOS transistor 6 is connected to the source of the third PMOS transistor 14 and the first input terminal of the third operational amplifier 13. The drain of the third PMOS transistor 14 is connected to the first terminal of the first resistor 8 and the second input terminal of the first operational amplifier 3. The second terminal of the first resistor 8 is grounded. The source of the second PMOS transistor 7 is connected to a preset power supply. The gate of the second PMOS transistor 7 is connected to the gate of the first PMOS transistor 6 and the output terminal of the first operational amplifier 3. The drain of the second PMOS transistor 7 is connected to the first terminal of the third resistor 10 and the second input terminal of the third operational amplifier 13. The output terminal of the third operational amplifier 13 is connected to the gate of the third PMOS transistor 14. The drain of the second PMOS transistor 7 is also used to connect to an energy storage module. The second terminal of the third resistor 10 is connected to the first terminal of the fourth resistor 11 and the first input terminal of the second operational amplifier 5. The second terminal of the fourth resistor 11 is grounded. The second input terminal of the second operational amplifier 5 is used to receive the second preset reference voltage signal, and the output terminal of the second operational amplifier 5 is connected to the third input terminal of the first operational amplifier 3. The first input terminal of the first operational amplifier 3 is used to receive the first preset reference voltage signal. The first terminal of the first capacitor 9 is connected to the gate of the first PMOS transistor 6, the second terminal of the first capacitor 9 is connected to the first terminal of the second resistor 12, and the second terminal of the second resistor 12 is connected to the first terminal of the first resistor 8.
[0052] In this state, before the first and second PMOS transistors are activated, no current flows, and the voltage across the first resistor is 0V, meaning the voltage at point PROG is 0V. At this time, the first operational amplifier detects the low voltage at point PROG and therefore outputs a low signal at point GATE. Since point GATE is connected to the gates of both the first and second PMOS transistors, when point GATE is low, the first and second PMOS transistors conduct, causing the source voltage of the third PMOS transistor to rise. As the source voltage of the third PMOS transistor continues to rise, when the voltage difference between its source and gate exceeds the turn-on voltage, the third PMOS transistor turns on, allowing current to flow through the branch containing the first resistor. Because current flows through the first resistor, the voltage at point PROG rises. When the voltage at point PROG rises and exceeds the voltage at the first input terminal VREF1 of the first operational amplifier, the output signal at point GATE becomes high, causing the drain voltage of the first PMOS transistor to decrease, and consequently, the voltage at point PROG. In this way, the first operational amplifier clamps the voltages at point PROG and VREF1, keeping the voltage at point PROG constant, thus generating a stable charging current. That is, the first operational amplifier ensures that the second PMOS transistor can provide a stable current to charge the battery even when the battery voltage is not fully charged.
[0053] Simultaneously, the drain of the second PMOS transistor is connected to the battery, and the current generated by the second PMOS transistor charges the battery, causing the voltage at point VBAT to rise. When the voltage at point VBAT rises to a certain value, the second operational amplifier detects that the voltage at point FB in the sampling circuit composed of the third and fourth resistors reaches the voltage of VREF2. The output signal VOUT of the second operational amplifier then goes low, which acts on the first operational amplifier. The first operational amplifier then raises its output signal GATE, increasing the gate voltage of the second PMOS transistor. The charging current gradually decreases, and when the current drops to the termination current threshold, the second PMOS transistor turns off, and the charging process ends. In other words, when the battery voltage is almost fully charged, the second operational amplifier reduces the charging current by adjusting the gate voltage of the second PMOS transistor until the charging current decreases to the termination current threshold, at which point the second PMOS transistor turns off, and the charging process ends.
[0054] The charging current is the current flowing from the drain of the second PMOS transistor to the battery connected to the charging circuit. The magnitude of the charging current is related to the current on the first PMOS transistor, and can be determined based on the width-to-length ratio of the first and second PMOS transistors. If the width-to-length ratio of the first PMOS transistor is greater than that of the second PMOS transistor, then the charging current will be greater than the drain current of the first PMOS transistor.
[0055] Furthermore, a first capacitor and a second resistor are added between the GATE and PROG points for frequency compensation. According to Miller's theorem, the first capacitor is equivalent to a large capacitor with a gain multiple at the GATE point and a small capacitor with the same capacitance value at the PROG point. This large capacitor significantly improves circuit stability. Simultaneously, by using a small capacitor to achieve the compensation effect of a large capacitor, area is greatly saved, and chip cost is reduced.
[0056] For example, the first controlled switch is a first PNP transistor. The second controlled switch is a second PNP transistor. The emitter of the first PNP transistor is connected to a preset power supply. The collector of the first PNP transistor is connected to the emitter of the third PNP transistor and the first input terminal of the third operational amplifier 13. The collector of the third PNP transistor is connected to the first terminal of the first resistor 8 and the second input terminal of the first operational amplifier 3. The second terminal of the first resistor 8 is grounded. The emitter of the second PNP transistor is connected to the preset power supply. The base of the second PNP transistor is connected to the base of the first PNP transistor and the output terminal of the first operational amplifier 3. The collector of the second PNP transistor is connected to the first terminal of the third resistor 10 and the second input terminal of the third operational amplifier 13. The output terminal of the third operational amplifier 13 is connected to the base of the third PNP transistor. The collector of the second PNP transistor is also used to connect to an energy storage module. The second terminal of the third resistor 10 is connected to the first terminal of the fourth resistor 11 and the first input terminal of the second operational amplifier 5. The second terminal of the fourth resistor 11 is grounded. The second input terminal of the second operational amplifier 5 is used to receive the second preset reference voltage signal, and the output terminal of the second operational amplifier 5 is connected to the third input terminal of the first operational amplifier 3. The first input terminal of the first operational amplifier 3 is used to receive the first preset reference voltage signal. The first terminal of the first capacitor 9 is connected to the base of the first PNP transistor, the second terminal of the first capacitor 9 is connected to the first terminal of the second resistor 12, and the second terminal of the second resistor 12 is connected to the first terminal of the first resistor 8.
[0057] This application provides a charging device, including the charging circuit described above.
[0058] Among them, the charging device can be a device that charges other devices with rechargeable batteries.
[0059] In the above embodiments, by setting the charging circuit in the charging device and adding a frequency compensation circuit connected to the current control branch in the charging circuit, the frequency compensation circuit can perform frequency compensation on the mirror current circuit, which can greatly improve the circuit stability and thus improve the stability of the charging device.
[0060] This application provides an electronic device, including the charging circuit described above and an energy storage module connected to the charging circuit described above.
[0061] Among them, electronic devices can be devices with rechargeable batteries, such as smartphones, smart lights, etc.
[0062] In the above embodiments, by setting the charging circuit in the electronic device and adding a frequency compensation circuit connected to the current control branch in the charging circuit, the frequency compensation circuit can perform frequency compensation on the mirror current circuit, which can greatly improve the circuit stability and thus improve the stability of the electronic device.
[0063] The foregoing description and accompanying drawings fully illustrate embodiments of the present disclosure to enable those skilled in the art to practice them. Other embodiments may include structural and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the order of operation may vary. Parts and features of some embodiments may be included or substituted for parts and features of other embodiments. Embodiments of the present disclosure are not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from its scope. The scope of the present disclosure is limited only by the appended claims.
Claims
1. A charging circuit for improving loop stability, characterized in that, include: A current mirroring circuit, the current mirroring circuit including a current control branch and a current mirroring branch connected to the current control branch; The current mirror branch is used to connect to the energy storage module; the connection point between the current control branch and the current mirror branch is the current control terminal of the mirror current circuit. A frequency compensation circuit is connected to the current control branch; A first operational amplifier has a first input terminal for receiving a first preset reference voltage signal; a second input terminal for receiving a voltage signal that reflects the magnitude of the current in the current control branch; and an output terminal connected to the current control terminal. A voltage detection circuit is used to connect to the energy storage module to detect the voltage of the energy storage module; The second operational amplifier has a second input terminal for receiving a second preset reference voltage signal; a first input terminal for receiving the voltage of the energy storage module; and an output terminal connected to the third input terminal of the first operational amplifier.
2. The charging circuit according to claim 1, characterized in that, The current control branch includes: A first controlled switch, the first terminal of which is connected to a preset power supply; the control terminal of the first controlled switch is connected to the current mirror branch; A first resistor, the first end of which is connected to the second end of the first controlled switch and the second input terminal of the first operational amplifier, and the second end of the first resistor is grounded.
3. The charging circuit according to claim 2, characterized in that, The current mirror branch includes: The second controlled switch has a first end connected to a preset power supply, a second end connected to the energy storage module, and a control end connected to the current control branch.
4. The charging circuit according to claim 2, characterized in that, The frequency compensation circuit includes: A first capacitor, the first terminal of which is connected to the control terminal of the first controlled switch; The second resistor has its first end connected to the second end of the first capacitor; the second end of the second resistor is connected to the first end of the first resistor.
5. The charging circuit according to claim 1, characterized in that, The voltage detection circuit includes: The third resistor, the first end of which is used to connect to the positive terminal of the energy storage module; A fourth resistor, the first end of which is connected to the second end of the third resistor and the first input terminal of the second operational amplifier; the second end of the fourth resistor is grounded.
6. The charging circuit according to claim 3, characterized in that, The charging circuit also includes: An auxiliary mirror circuit is used to make the output voltage of the second terminal of the first controlled switch equal to the output voltage of the second terminal of the second controlled switch.
7. The charging circuit according to claim 6, characterized in that, The auxiliary mirror circuit includes: The third controlled switch, wherein the first resistor is connected to the second terminal of the first controlled switch through the third controlled switch; A third operational amplifier has its first input terminal connected to the second terminal of the first controlled switch, and its second input terminal connected to the second terminal of the second controlled switch; the output terminal of the third operational amplifier is connected to the control terminal of the third controlled switch.
8. The charging circuit according to claim 3, characterized in that, The first controlled switch is a PMOS transistor or a PNP transistor, and the second controlled switch is a PMOS transistor or a PNP transistor.
9. A charging device, characterized in that, Includes the charging circuit as described in any one of claims 1 to 8.
10. An electronic device, characterized in that, include: The charging circuit as described in any one of claims 1 to 8, and the energy storage module connected to the charging circuit.