Integrated circuit package

Abstract

The utility model relates to an integrated circuit package. An integrated circuit package includes a support plate having a mounting surface. An electronic chip having a back surface and a front surface is mounted on the mounting surface, the front surface being electrically connected to the mounting surface of the support plate. A deformable thermally conductive film covers at least a portion of the backside of the electronic chip such that the film is in contact with the backside.

Description

[0001] Priority claim

[0002] This application claims priority to French Patent Application No. 23 09295, filed on September 5, 2023, the contents of which are incorporated by reference in their entirety to the maximum extent permitted by law. TECHNICAL FIELD

[0003] The embodiments and examples relate to the field of microelectronics, in particular to the field of integrated circuit packaging, and more particularly to heat dissipation structures in integrated circuit packaging. BACKGROUND

[0004] Heat dissipation structures are generally provided to dissipate the heat generated by a face of an electronic chip containing an integrated circuit present in a package.

[0005] These heat dissipation structures conventionally comprise a heat sink, for example a copper plate, which is attached to this face of the electronic chip by using a layer of thermal interface material, for example a mixture of silicon and copper well known to those skilled in the art.

[0006] In particular, the layer of thermal interface material makes it possible to have a thermal transfer between the chip and the heat sink, so that the heat sink can dissipate the heat outside the package and so that the temperature of the integrated circuit does not reach a value that causes it to degrade.

[0007] That is, the thermal interface material is the weak link of the thermal chain, since its thermal conductivity is lower than that of the heat sink.

[0008] In this respect, it would be desirable to reduce the thickness of the layer of thermal interface material to improve the heat dissipation of the package. However, it is known that the adhesion of the layer of thermal interface material is limited and that reducing the thickness of the layer of thermal interface material would deteriorate the mechanical strength of the heat sink on the chip.

[0009] In addition, the layer of thermal material deteriorates over the entire lifetime of the package and can present defects such as voids, which affect the mechanical strength of the heat sink and degrade the thermal performance of the package.

[0010] There is therefore a need to improve the thermal performance of integrated circuit packages. SUMMARY

[0011] In one embodiment, an integrated circuit package comprises a support plate having a mounting face, an electronic chip having a back face and a front face, the electronic chip being mounted on the mounting face so that the front face is electrically connected to the mounting face of the support plate, and a deformable thermally conductive film, for example made of metal, configured to cover and contact at least a portion of the back face of the chip.

[0012] The deformable thermally conductive film can adapt to the shape of the chip or other components mounted on the support plate.

[0013] Thus, such a film does not require the attachment of a thermal interface material to the chip, thus enabling to improve the heat dissipation within the package. The film also guarantees the mechanical strength of the package during its lifetime, which prevents the risk of degradation of the thermal performance of the package.

[0014] Moreover, in the case of a complete coverage of the chip, the film can act as a heat sink, while the film is advantageously thinner than the heat sinks of the prior art. Thus, the cost of manufacturing the film is lower than the heat sink, and enables to make the package smaller in this case.

[0015] Thus, the package according to this aspect benefits from an improved thermal performance during its entire lifetime.

[0016] According to an embodiment, the thermally conductive film is soldered to at least a portion of the back face of the chip.

[0017] The film is fixed on the back face of the chip and enables to directly evacuate the heat without the need to provide an intermediate medium such as a layer of thermal interface material between the film and the chip.

[0018] According to an embodiment, an adhesive is used to attach the thermally conductive film on at least a portion of the back face of the chip.

[0019] The adhesive is typically a glue or a double-sided tape, enabling to attach the film on the back face of the chip, while having a better thermal conductivity than a thermal interface material for a given thickness.

[0020] According to an embodiment, the support plate comprises an opening through the thickness of the support plate up to an opening on the mounting face, the thermally conductive film further covering the mounting face and sealing said opening.

[0021] Said opening forms a passage in the support plate, enabling to perform a vacuum lamination during the manufacturing of the package. Vacuum lamination is a technique adapted to attach the film on the chip, to avoid the presence of air between the adhesive and the back face of the chip, thus improving the fixing of the film on the chip.

[0022] According to an embodiment, the package comprises a molding resin disposed on the mounting face of the support plate, such that the resin coats the chip and exposes the back face of the chip, the thermally conductive film being further configured to cover the upper surface of the molding resin.

[0023] Said film is also compatible with a package comprising a molding resin, enabling to protect the electronic chip by exposing the back face of the chip to be in contact with the thermally conductive film.

[0024] According to an embodiment, the chip is configured to have a hot spot releasing heat during operation, the thermally conductive film being configured to cover the hot spot of the chip.

[0025] Thermal simulation tools or alternatively thermal sensors are used to detect hot spots, in other words, areas of the chip that can have temperature spikes during its operation. The location of these hot spots can be taken into account, once they are identified, to determine the shape of the film. Thus, identifying the hot spots of the chip makes it possible to shape the film in such a way as to cover these hot spots while limiting the amount of material used to manufacture the film.

[0026] According to an embodiment, the film has a thickness between 5 pm and 0.5 mm.

[0027] This film thickness range generally makes it possible to make the package smaller and can be defined according to the choice of material used for the film, so as to make it deformable.

[0028] According to an embodiment, the deformable thermally conductive film is a metal film.

[0029] According to an embodiment, the modulus of elasticity of the thermally conductive film is between 10 -5 and 100-150 Gpa.

[0030] Thus, a film having these modulus of elasticity values is deformable enough to adapt to the morphology of the chip without the risk of detachment.

[0031] According to an embodiment, the thermally conductive film also covers the mounting face of the support plate and is connected to the thermally conductive elements of the support plate.

[0032] The thermally conductive elements, such as solder beads, interconnection networks and electrical contacts of the plate, can advantageously form additional channels with the film to evacuate heat under the package.

[0033] According to an embodiment, the package comprises components mounted on the mounting face of the support plate, wherein the thermally conductive film also covers the mounting face of the support plate and comprises openings able to accommodate the components.

[0034] According to design constraints of the package, for example related to the presence of components mounted on the surface, openings can be made on the thermally conductive film. Thus, such openings make it possible to fix the film on the mounting face of the chip and of the plate without covering these components and without subsequently hindering their operation.

[0035] According to an embodiment, the thermally conductive film also covers at least part of the side face of the electronic chip.

[0036] The film can for example cover at least part of the back face of the chip and extend up to the edge of the chip to optimize the dissipation of heat.

[0037] According to another aspect, there is presented a method for manufacturing an integrated circuit package comprising a support plate having a mounting face, the method comprising: mounting an electronic chip having a back face and a front face on the mounting face of the support plate such that the front face is electrically connected to the mounting face; and covering a portion of the back face of the chip with a deformable thermally conductive film such that the film is in contact with the back face.

[0038] According to an embodiment, covering a portion of the back face with the thermally conductive film comprises attaching the film on at least a portion of the back face of the chip using an adhesive.

[0039] According to an embodiment, the method comprises forming an opening through the thickness of the support plate up to an opening on the mounting face, wherein the film is attached on at least a portion of the back face by creating a vacuum between the film and the support plate using said opening such that the film covers the mounting face and seals said opening.

[0040] According to an embodiment, the film has a thickness between 5 pm and 0.5 mm.

[0041] According to an embodiment, the thermally conductive film is a metal.

[0042] According to an embodiment, the thermally conductive film has an elastic modulus between 10 -5 and 100-150 Gpa.

[0043] According to an embodiment, covering a portion of the back face with the thermally conductive film comprises chemical vapor deposition on at least a portion of the back face of the chip.

[0044] According to an embodiment, the method comprises forming a molding resin on the mounting face of the support plate such that the molding resin coats the chip and leaves said back face exposed, the thermally conductive film covering an upper surface of the molding resin.

[0045] According to an embodiment, the method comprises identifying hot spots of the chip by thermal simulation of the chip during operation, wherein covering a portion of the back face with the thermally conductive film is performed such that the film covers the hot spots of the chip.

[0046] According to an embodiment, the method further comprises connecting the film to a thermally conductive element of the support plate.

[0047] According to an embodiment, the method comprises mounting an assembly on the mounting face of the support plate and forming an opening in the thermally conductive film such that said opening accommodates the assembly after said covering a portion of the back face with the thermally conductive film.

[0048] According to an embodiment, the method comprises covering a portion of a side face of the electronic chip with the thermally conductive film while covering a portion of the back face with the film. BRIEF DESCRIPTION OF DRAWINGS

[0049] Other advantages and features of the present application will become apparent after a review of the detailed description of the non-limiting embodiments and implementations, and the appended claims, taken in conjunction with the accompanying drawings, wherein:

[0050] Figure 1 schematically illustrates a cross-sectional view of an integrated circuit package;

[0051] Figure 2 schematically illustrates a cross-sectional view of a package;

[0052] Figure 3 schematically illustrates a cross-sectional view of a package;

[0053] Figure 4 schematically illustrates a cross-sectional view of a package;

[0054] Figure 5 schematically illustrates a top view of a package;

[0055] Figure 6 schematically illustrates a cross-sectional view of a package; and

[0056] Figures 7 to 13 illustrates steps of a method for manufacturing an integrated circuit package as described above in relation to Figures 1 to 6 the detailed description. DETAILED DESCRIPTION

[0057] Figure 1 schematically illustrates a cross-sectional view of an integrated circuit package BT.

[0058] The package BT comprises an electronic (integrated circuit - IC) chip CHP comprising one or more integrated circuits and a support plate SUB having a mounting face FM. The support plate SUB can be for example a support substrate. Such a support plate SUB can comprise an interconnection network INTCNX and electrical contacts PAD (pads) located on the mounting face FM and electrically connected to the interconnection network INTCNX.

[0059] The chip CHP comprises a back face FS1 and a front face FL1 comprising integrated circuit components, for example such as transistors.

[0060] The chip CHP is mounted on the mounting face FM of the support plate SUB according to a "flip-chip" type of mounting.

[0061] More particularly, the front face FL1 of the chip CHP can be electrically connected to the electrical contacts PAD of the support plate SUB by using a solder bead SLD1 embedded in an underfill UNDFLL material, as known by the person skilled in the art.

[0062] Moreover, the support plate SUB can be equipped with a solder bead SLD2 attached on the face of the support plate SUB opposite the mounting face FM and enabling the connection of the package BT to a printed circuit board (not shown in the figures), for example. The interconnection network INTCNX of the support plate SUB is generally configured to electrically couple the electrical contacts PAD to the solder bead SLD2 and to transmit signals between the electrical circuit of the electronic chip CHP and the printed circuit board.

[0063] However, during the operation of the chip CHP, the integrated circuits of the chip CHP generate heat which can diffuse through the back face FS1 of the chip CHP and also on the side edges EDG of the chip CHP. The heat emitted by the chip CHP causes a rise in temperature within the package BT and can degrade the integrated circuits if the temperature exceeds a certain value.

[0064] In this respect, the package BT advantageously comprises a deformable thermally conductive film FLM, for example made of a metal such as copper (Cu) or aluminium (Al). The film FLM can also be a copper film with a face coated with nickel (Ni), with a nickel platinum (NiPd) alloy or with aluminium.

[0065] The film FLM is configured to cover the back face FS1 of the chip CHP and to be in contact with it, for example by being attached on this part of the back face FS1 using an adhesive GL, as shown in Figure 1 .

[0066] The thermally conductive film FLM adapts to the shape of the chip or other component mounted on the support plate SUB and can be attached to the chip CHP using a thermally conductive adhesive GL.

[0067] The thermal performance of the package is thus improved. This film also guarantees mechanical strength during the lifetime of the package, which prevents the risk of degradation of the thermal performance of the package.

[0068] Here, the film FLM covers the back face FS1 of the chip CHP entirely and acts as a conventional heat sink by protecting the chip and by dissipating heat outside the package BT, while being thinner and cheaper than the heat sinks of the prior art.

[0069] Moreover, the film FLM also covers at least part of the side edges EDG of the chip CHP, through which the heat can also diffuse, thus enabling the optimization of the heat dissipation.

[0070] Moreover, the film FLM has a thickness between 5 pm and 0.5 mm. This film thickness range can be defined according to the choice of material used for the film to be deformable and to enable the package BT to be made smaller in the case where the film replaces the heat sink. The person skilled in the art will know how to adjust the thickness of the film according to the material used to make it deformable.

[0071] The thermally conductive film FLM also has a 10 -5 and an elastic modulus between 100 and 150 GPa.

[0072] Thus, a film having these elastic modulus values is deformable enough to adapt to the morphology of the chip without risk of film detachment, in particular in the case of attachment of the film by use of an adhesive GL.

[0073] The adhesive GL can be a glue, such as the non-conductive glue EA6900 sold by DOW or the conductive glue 2100A sold by Henkel. The adhesive GL can also be a double-sided tape, such as the tape PC07 sold by Boyd. The adhesive GL is preferably thermally conductive and generally has better adhesion than a thermal interface material.

[0074] Figure 2 A cross-sectional view of the package BT is schematically illustrated. Elements common to the package in Figure 1 Elements common to the package in

[0075] The thermally conductive film FLM is for example soldered to the back face FS1 of the chip CHP and covers the back face FS1 entirely. Alternatively, the thermally conductive film FLM can also be formed by sputtering from chemical vapor deposition of a thin metal layer on the back face FS1.

[0076] Thus, the back face FS1 and the edges EDG of the chip are directly covered by the film FLM without intermediate layer, thereby reducing the thermal chain between the chip CHP and the outside of the package BT. Thus, the heat dissipation is improved.

[0077] The thermally conductive film FLM is also soldered or formed on the mounting face FM of the support plate SUB. The film FLM is connected to thermally conductive elements of the support plate SUB, for example to non-operational electrical contacts PAD, i.e. which are not used for transmission of electrical signals, which are coupled to the soldered beads SLD2 by the interconnection network INTCNX.

[0078] The soldered beads SLD2, the interconnection network INTCNX and the electrical contacts PAD can advantageously form additional channels with the film FLM for dissipation of heat below the package BT, thereby contributing to improve the heat dissipation of the package BT.

[0079] Figure 3 A cross-sectional view of the package BT is schematically illustrated. Elements common to the package in Figure 1 Elements common to the package in

[0080] The support plate SUB comprises an opening FNT1 which passes through the thickness of the plate SUB up to the opening on the mounting face FM.

[0081] The film FLM is also attached to the support plate SUB by means of an adhesive GL to cover the plate SUB and seal the opening FNT1.

[0082] The opening FNT1 forms a passage in the support plate SUB, making it possible to attach the film FLM by vacuum lamination performed during the manufacture of the package BT.

[0083] The presence of air between the adhesive GL and the back face FS1 and the side edges EDG of the chip CHP is thus reduced, and the anchoring of the film FLM on the chip CHP and the heat dissipation are thus improved.

[0084] Figure 4 A cross-sectional view of the package BT is schematically illustrated. Elements common to the package in Figure 1 have the same reference numerals and will not be described in detail again.

[0085] The chip CHP can in some cases have hot spots that release heat in a more localized manner on the back face FS1 or on the side edges EDG of the chip CHP during operation.

[0086] The heat-conducting film FLM is attached on the back face FS1 of the chip CHP and covers a portion of the back face FS1, in particular the hot spots of the chip CHP located on this portion of the back face FS1.

[0087] The package BT also comprises a heat sink CPT, for example made of copper, attached on the support plate SUB using an adhesive GL2 (for example similar to the adhesive GL described above) and attached on the back face FS1 of the chip CHP and on the film FLM by means of a layer of thermal interface material TIM.

[0088] In particular, the layer of thermal interface material TIM of first thickness covers the portion of the back face FS1 not covered by the film FLM, and the layer of thermal interface material TIM of second thickness (lower than the first thickness) covers the film FLM.

[0089] The package BT thus benefits from a more efficient heat dissipation on the most heat-generating portions of the chip CHP thanks to the film FLM.

[0090] Figure 5 A top view of the package BT is schematically illustrated. Elements common to the package in Figure 1 have the same reference numerals and will not be described in detail again. The package BT can comprise a heat sink CPT and a layer of thermal interface material, which are not shown in Figure 5 .

[0091] Figure 5 The hot spots PC of the chip CHP shown in can be detected, for example, thanks to a thermal simulation tool such as the Simcenter Flotherm software from Siemens or a thermal sensor (not shown).

[0092] Once identified, the position of these hot spot PCs can be considered to define the shape of the film FLM. The film FLM is manufactured or formed, for example by chemical vapor deposition, so as to cover the hot spot PCs while limiting the amount of material of the film FLM.

[0093] Furthermore, the package BT also comprises components COMP, such as passive electronic components or antennas, located on the mounting face FM of the board SUB, and the film FLM comprises openings FNT2 able to accommodate the components COMP.

[0094] In practice, openings can be made on the thermally conductive film according to design constraints of the package BT, for example related to the presence of elements mounted on the surface. Such openings thus make it possible to fix the film on the mounting face of the chip and of the board without covering these components and also without thereby hindering their operation.

[0095] Figure 6 A cross-sectional view of the package BT is schematically illustrated. Elements common to the package in Figure 1 have the same reference numerals and will not be described in detail again.

[0096] The package BT comprises a molded resin MLD deployed on the mounting face FM of the support board SUB, so that the resin MLD covers, for example encapsulates, the chip CHP and exposes the back face FS1. The resin MLD is generally an epoxy resin mixed with vitreous silica or metal oxides, such as aluminum oxide.

[0097] The thermally conductive film FLM is attached on the back face FS1 of the chip CHP using an adhesive GL, such as the one described above with respect to the package in Figure 1 and is also attached on the upper face FS2 encapsulated by the molded resin MLD using the adhesive GL.

[0098] The FLM film is also compatible with a molded package comprising a molded resin, so as to make it possible to protect the electronic chip by exposing the back face of the chip, thereby bringing the back face of the electronic chip into contact with the thermally conductive film.

[0099] The resin MDL can also be thermally conductive, in particular when the resin comprises metal oxides, and makes it possible to transmit the heat generated by the side edges EDG of the chip CHP toward the film FLM.

[0100] Figures 7 to 13 Steps of a method for manufacturing an integrated circuit package described above with respect to Figures 1 to 6 are illustrated.

[0101] Figure 7A step 100 of obtaining a support plate SUB comprising a mounting face FM is illustrated. The support plate SUB comprises an interconnection network INTCNX and electrical contacts PAD formed on the mounting face FM and electrically connected to the interconnection network INTCNX.

[0102] Additional electrical contacts PAD can be formed on the mounting face FM to enable connection of a thermally conductive film, such as described above in relation to Figure 2 These electrical contacts PAD are non-operational electrical contacts that are not used for transmission of electrical signals.

[0103] Figure 8 A step 101 of attaching an electronic chip CHP on the mounting face FM of the plate SUB is illustrated. The chip CHP comprises a back face FS1 and a front face FL1 connected to the electrical contacts PAD using a solder bead SLD1 embedded in an underfill UNDFLL material.

[0104] Figure 9 A step 102 of attaching a deformable thermally conductive film FLM on the back face FS1 and the side face EDG of the chip CHP using a glue GL is illustrated.

[0105] For example, the FLM film can be coated with glue or can be attached to a double-sided adhesive tape.

[0106] In particular, the film FLM can be pressed against the chip CHP by applying pressure on the film, so that the film deforms to cover the back face FS1 and the side face EDG of the chip CHP.

[0107] The step 102 of attaching the film FLM can be followed by a step of attaching a solder bead SLD2 on a face FL2 of the plate SUB opposite the mounting face FM to obtain the package BT illustrated in Figure 1

[0108] Figure 10 A step 103 of soldering the thermally conductive film FLM is illustrated as an alternative to the step 102 described above in relation to Figure 9

[0109] The soldering of the film FLM more particularly comprises soldering the film FLM on the back face FS1 and on the side face EDG of the chip CHP.

[0110] Moreover, the film FLM is soldered on the plate SUB in a manner to be connected to the additional electrical contacts PAD.

[0111] The step 103 can be followed by a step of attaching a solder bead SLD2 (not illustrated) on a face FL2 of the plate SUB opposite the mounting face FM to obtain the package BT illustrated in Figure 2

[0112] ​​​In particular, the soldering beads SLD2 and the additional electrical contacts PAD are coupled together through the interconnection network INTCNX of the board SUB, in order to form additional channels with the film FLM for dissipating heat under the package BT.

[0113] Figure 11 The step 104 of forming the opening FNT1 and of attaching the thermally conductive film FLM is illustrated as an alternative to the steps 102 and 103 described above with respect to Figure 9 and Figure 10 .

[0114] The thermally conductive film FLM can be the same as described above with respect to Figure 9 and can be for example coated with glue or attached to a double-sided adhesive tape.

[0115] The opening FNT1 passes through the thickness of the support board SUB up to the mounting face FM. The opening FNT1 is used to create a vacuum between the film FLM and the support board SUB, for example by vacuum lamination techniques known to the person skilled in the art, so that the film FLM covers the mounting face FM and seals the opening FNT1.

[0116] Vacuum lamination is a technique that makes it possible to attach the film FLM on the chip CHP in order to avoid the presence of air between the adhesive GL and the back face FS1 of the chip, thus improving the anchoring of the film FLM on the chip CHP.

[0117] The step 104 can be followed by a step of attaching soldering beads SLD2 (not shown) on the face FL2 of the board SUB opposite the mounting face FM, to obtain the package BT shown in Figure 3 .

[0118] Figure 12 The step 105 of attaching the film FLM on a portion of the back face FS1 of the chip CHP is illustrated.

[0119] The step 105 is preferably performed after a step of identifying hot spots (not shown) of the chip CHP and a step of manufacturing the film FLM. The step of identifying hot spots of the chip CHP can be performed by thermal simulation of the chip CHP during operation or by thermal sensors.

[0120] The step of manufacturing the film FLM makes it possible to design the film FLM and to give it a shape such that the film FLM is able to cover the hot spots of the chip CHP during the step 105 of attaching the film FLM. The attachment of the film FLM can be performed in a similar way as the attachment step 102 described with respect to Figure 9 .

[0121] Step 105 can be followed by a step of attaching a solder bead SLD2 (not shown) on the face FL2 of the board SUB opposite the mounting face FM and by a step of attaching a heat sink (not shown) on the film FLM and the board SUB to obtain Figure 4 the package BT shown in Fig. 1.

[0122] Figure 13 Fig. 6 illustrates a step 106 of chemical vapor deposition of the film FLM as an alternative to steps 102 and 105 described above with respect to Figs. 1 to 5. Figure 9 and Figure 12 Fig. 6 illustrates a step 106 of chemical vapor deposition of the film FLM as an alternative to steps 102 and 105 described above with respect to Figs. 1 to 5.

[0123] In particular, the chemical vapor deposition enables the formation of the film FLM on the back face FS1 and the side face EDG of the chip CHP, typically by sputtering.

[0124] Step 106 can also be performed by using a temporary mask MSK on the back face FS1 and the side face EDG of the chip CHP.

[0125] In this way, the film FLM can be formed only on the portions of the back face FS1 and the side face EDG of the chip CHP that are not covered by the mask MSK.

[0126] Step 106 can be followed by a step of removing the mask MSK, by a step of attaching a solder bead SLD2 (not shown) on the face FL2 of the board SUB opposite the mounting face FM and by a step of attaching a heat sink (not shown) on the film FLM and the board SUB.

Claims

1. An integrated circuit package, characterized by Comprising: a support plate having a mounting surface; an electronic chip having a back surface and a front surface, the front surface of the electronic chip mounted on and electrically connected to the mounting surface of the support plate; and a deformable thermally conductive film configured to cover and contact at least a portion of the back surface of the electronic chip. wherein the deformable thermally conductive film is soldered to at least a portion of the back surface of the electronic chip.

2. The package of claim 1, wherein, wherein the deformable thermally conductive film is attached to at least a portion of the back surface of the electronic chip using an adhesive.

3. The package of claim 1, wherein, wherein the support plate includes an opening through a thickness of the support plate up to the mounting surface, the deformable thermally conductive film further covering the mounting surface and sealing the opening.

4. The package of claim 3, wherein, further comprising a molded resin disposed on the mounting surface of the support plate to encapsulate a side surface of the electronic chip and leave the back surface of the electronic chip uncovered by the molded resin, the deformable thermally conductive film also configured to cover an upper surface of the molded resin.

5. The package of claim 1, wherein, wherein the electronic chip is configured to have a hot spot that releases heat during operation, the deformable thermally conductive film configured to cover the hot spot of the electronic chip.

6. The package of claim 1, wherein, wherein the deformable thermally conductive film has a thickness between 5 pm and 0.5 mm.

7. The package of claim 1, wherein, wherein the deformable thermally conductive film is a metal film.

8. The package of claim 1, wherein, wherein the deformable thermally conductive film further covers the mounting surface of the support plate and is connected to a thermally conductive element of the support plate.

9. The package of claim 1, wherein, wherein the deformable thermally conductive film has an elastic modulus between 10 -5 and 100-150 GPa.

10. The package of claim 1, wherein, further comprising a component mounted on the mounting surface of the support plate, wherein the deformable thermally conductive film further covers the mounting surface of the support plate and includes an additional opening, the component located at the additional opening.

11. The package of claim 1, wherein, wherein the deformable thermally conductive film further covers at least a portion of a side surface of the electronic chip, the side surface extending between the back surface and the front surface.

12. The package of claim 1, wherein, further comprising a heat sink mounted to the deformable thermally conductive film.

13. The package of claim 1, wherein, ​

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