Portable small device stacking mechanism

Abstract

The utility model provides a portable small -size equipment stacking mechanism belongs to electronic circuit technical field, include: mainboard, power module is connected on the mainboard, control module is connected on the mainboard, data processing module is clamped on the power module, interface module is clamped on the control module, the card board is equipped with a plurality, the card board is used for the data processing module and interface module and power module and control module between clamping solid. The utility model discloses through modularization design, clamping and plug -in connection mode and the cooperation of module independence, has realized the effect that the module is combined or replaced according to the demand, has reached the purpose of low -cost customization, and through the cooperation of standard connection socket, EEPROM chip storage configuration information and data comparison circuit, has realized the effect that hardware connection compatibility and software cooperation stability and data transmission accuracy, has reached the purpose of high compatibility.

Description

TECHNICAL FIELD

[0001] The utility model relates to electronic circuit technical field, especially a portable small -size equipment stacking mechanism. BACKGROUND

[0002] With the rapid development of science and technology, small -size equipment has shown extremely high application value in many fields. In the consumer electronics field, such as palm game machine, portable health monitoring appearance etc. and the node equipment in the microcontroller of industrial automation field, distributed sensor network, small -size equipment satisfies complex and varied application scene demand with its small and portable, functional variety characteristics. These devices usually need in extremely limited physical space realizes such as data acquisition, processing, transmission, and power management, man -machine interaction and so on multiple functions integration.

[0003] However, the customization process of the existing small -size equipment has significant defects. The traditional design method does not follow the modularization principle, and each functional unit of the device presents high coupling. This highly integrated design mode makes the device lack of scalability and flexibility. When the device needs to be customized according to the functional requirements of specific users, the whole device must be comprehensively redesigned and produced. This process involves complex engineering links, including but not limited to the re-planning of circuit topology, the adjustment of hardware physical layout, the redesign and coding of software architecture, etc. This traditional design mode leads to the sharp rise of the customization cost of the device, greatly limiting the ability of small -size equipment to meet the diversified market demand. SUMMARY

[0004] The technical problem to be solved by the utility model is to provide a portable small -size equipment stacking mechanism to solve the technical problems of high customization cost and poor device compatibility of the existing small -size equipment.

[0005] Technical scheme: To achieve the above object, the utility model discloses the following technical scheme: a portable small -size equipment stacking mechanism, include: mainboard, power module is connected on the mainboard, control module is connected on the mainboard, data processing module is clamped on the power module, interface module is clamped on the control module, the card board is equipped with a plurality, the card board is used for data processing module and interface module and power module and control module between clamping solid, card hook is set up on the card board, the card slot is opened on data processing module and interface module, the card slot is used for providing the clamping position of card hook The power module, control module, data processing module and interface module are equipped with the connecting socket in, and the connecting socket between the power module, control module, data processing module and interface module is connected through the connecting line plug -pull, wherein the mainboard should adopt the material with good electrical insulation performance and mechanical strength, for example FR-4 epoxy glass cloth laminated board. The connecting interface of power module and mainboard should meet specific electrical and mechanical standards, for example adopts standard gold finger slot connection, and the connecting point should be gold plated to improve the conductivity and oxidation resistance. The card board material can select high -strength engineering plastics, and the size tolerance of card hook and card slot should be controlled within ± 0.1mm to ensure the precision and stability of clamping. The pin number, spacing and definition of connecting socket should be standardized, and the plug -pull connecting line should have good flexibility and bending resistance, and the wire core material can select multi -strand copper wire, and the outer covering insulation wear -resisting material.

[0006] In further embodiments, the power module includes a power management chip and an EEPROM chip, the power management chip is used for managing and distributing the input power to meet the power demand of different modules, and the EEPROM chip is used for storing the related configuration information of the power module, wherein the power management chip should have overcurrent, overvoltage and undervoltage protection functions, and the protection threshold can be adjusted by software or hardware configuration. The storage capacity of the EEPROM chip should be not less than 1KB, and has at least 100,000 times of erasing and writing life, and the data storage period should be not less than 20 years. Its communication protocol should adopt I 2 C or SPI general standard for reliable data interaction with other circuits.

[0007] In a further embodiment, the VIN pin of the power management chip is connected with a power plug in the power module for external power supply, a capacitor is connected in series with the Vout pin of the power management chip, an inductor is connected in parallel at both ends of the capacitor, the negative pole of the capacitor is connected with a ground plug in the power module, the other end of the inductor is connected with an output interface in the power module, and the power module is further provided with SDA and SCL plugs corresponding to the SDA and SCL pins on the EEPROM chip. The SDA pin on the EEPROM chip is further connected with a connection plug in the power module. The power plug should have an anti-reverse connection function, which can be realized by adding a diode circuit or the like. The capacitance of the capacitor should be selected according to the power frequency and output current requirements, and the withstand voltage value should be not less than 1.5 times the input power voltage. The inductor can use a magnetic core material with high magnetic permeability and low loss. The SDA and SCL plugs should comply with the I 2 C bus standard, and the pin length and diameter should comply with the corresponding industry standard to ensure reliable plug-in connection and signal transmission.

[0008] In a further embodiment, the data processing module includes a data processing chip, an EEPROM chip and a comparison circuit. The data processing chip is used for operating, analyzing and converting the collected data. The EEPROM chip is used for storing the data processing algorithm, related configuration information and intermediate processing results of the data processing module. The comparison circuit is used for consistency comparison of data transmitted from different modules to ensure the accuracy of data transmission and processing between modules. The data processing chip should have sufficient processing capacity, and the supported data types should include but not limited to integer, floating point, character and the like. The data processing algorithm stored in the EEPROM chip should use encrypted storage method to prevent illegal reading and tampering. The encryption algorithm can use mature algorithms such as AES. The comparison circuit should be able to detect the change of a single data bit, and the comparison frequency should match the data transmission frequency to ensure real-time performance.

[0009] In a further embodiment, the Din pin and the Dout pin on the data processing chip are connected to the Din and Dout sockets in the data processing module, the GND pin on the data processing chip is connected to the ground socket in the data processing module, a pull-up resistor is connected between the Din pin and the ground socket, the VCC pin on the data processing chip is connected to the power socket in the data processing module, and the PB6 and PB7 pins on the data processing chip are connected to the SCL pin and the SDA pin on the EEPROM chip. The electrical characteristics of the Din and Dout sockets should meet the data transmission requirements of the chip, and the input / output level range, driving capability and other parameters should be matched with the chip. The resistance value of the pull-up resistor should be selected according to the input characteristics of the chip and the noise environment of the circuit. The power supply voltage fluctuation range of the VCC pin should be controlled within ±5%, and the power socket should have good power supply filtering function to reduce the influence of power supply noise on the chip. The connection between the PB6 and PB7 pins and the SCL and SDA pins should use short-distance wiring to reduce signal transmission delay and interference.

[0010] In a further embodiment, the control module includes a microcontroller and an EEPROM chip. The microcontroller is used to send power management instructions to the power module, schedule data processing tasks of the data processing module, and interact with the interface module to process communication control with external devices. The EEPROM chip is used to store control algorithms, device operating state parameters, and working mode configuration information of each module of the control module. The microcontroller should have high processing capability and sufficient storage capacity for storing programs and data. Its communication interface should include but not limited to UART, SPI, I 2 C, etc. to meet the communication needs of different modules. The control algorithms and configuration information stored in the EEPROM chip should have backup and recovery functions to prevent data loss, which can be achieved by regularly backing up to other storage media or using redundant storage.

[0011] In a further embodiment, the PB6 and PB7 pins on the microcontroller are connected to the SDA pin and SCL pin on the EEPROM chip, the PB6 and PB7 pins on the microcontroller are connected to the PB6 and PB7 sockets in the control module, the SDA pin is also connected to the connection socket in the control module; the VCC pin on the EEPROM chip is connected to the VCC pin on the microcontroller, the VCC pin on the microcontroller is connected to the power socket in the control module; the GND pin on the microcontroller is connected to the ground socket in the control module; the RST pin on the microcontroller is connected to the reset capacitor, and the other end of the reset capacitor is connected to the ground socket; the D_TX+, D_TX-, D_RX+, and D_RX- pins on the microcontroller are connected to the corresponding sockets in the control module; the XTAL1 and XTAL2 pins on the microcontroller are connected to the crystal oscillator, and the two ends of the crystal oscillator are connected to capacitors, which are connected to the ground socket; a resistor is connected in series to the GPIO pin on the microcontroller, and the other end of the resistor is connected to the socket corresponding to the GPIO pin in the control module, and a pull-up resistor is connected between the RST pin and the VCC pin on the microcontroller, wherein the output driving capability of the PB6 and PB7 pins should meet I 2 The output level of the C communication protocol should meet the input level specification of the EEPROM chip. The capacitance value of the reset capacitor should be selected according to the reset time requirement of the microcontroller, and the withstand voltage value should not be lower than the VCC voltage. The interface standard of the D_TX+, D_TX-, D_RX+, and D_RX- pins should meet the corresponding high-speed communication protocol (such as USB, Ethernet, etc.). The frequency of the crystal oscillator should be selected according to the working frequency requirement of the microcontroller, and the capacitance value of the load capacitor C1 should be matched according to the specification of the crystal oscillator, with an error of not more than ±5%. The resistance value of the resistor connected in series to the GPIO pin should be selected according to the driving capability of the GPIO pin and the load characteristics of the external circuit.

[0012] In a further embodiment, the interface module includes a USB interface chip and an EEPROM chip, the USB interface chip is used to realize the data transmission and connection function of the device and the external USB device, and the EEPROM chip is used to store the working mode and transmission rate of the USB interface, wherein the USB interface chip should meet the USB standard specification, and the supported USB version should at least include USB2.0 and USB3.0. The power supply voltage of the VCC pin should strictly meet the working voltage requirement of the USB interface chip, and the fluctuation range should be within ±5%. The working mode and transmission rate information stored in the EEPROM chip should be modified through a specific software tool or hardware configuration, and the modified data should have permanent saving capability, with a saving period of not less than 10 years.

[0013] In a further embodiment, the D+, D-, D_RX+, D_RX- pins on the USB interface chip are respectively connected with the corresponding sockets in the interface module; the VCC pin on the USB interface chip is connected with the power socket; the GND pin on the USB interface chip is connected with the ground socket; the PB6 and PB7 pins on the USB interface chip are respectively connected with the SCL pin and SDA pin on the EEPROM chip; the VCC pin on the EEPROM chip is connected with the power socket, the SCL and SDA pins are respectively connected with the corresponding pins on the USB interface chip, the GND pin on the EEPROM chip is connected with the ground socket, and a resistor is connected in series with each of the D+, D-, D_RX+, D_RX- pins on the USB interface chip, and a capacitor is connected between each of the D+, D-, D_RX+, D_RX- pins on the USB interface chip and the ground socket, wherein the resistance value of the resistor connected in series with the D+, D-, D_RX+, D_RX- pins should be selected according to the electrical characteristics of the USB interface chip and the impedance of the transmission line. The capacitance value of the capacitor connected between the pin and the ground socket should be selected according to the signal frequency and noise characteristics, and the withstand voltage should not be lower than the VCC voltage. The power supply filtering circuit of the EEPROM chip should be reasonably designed, and a filtering capacitor can be added between the VCC pin and the ground to reduce the influence of power supply noise on the chip.

[0014] In a further embodiment, the output sockets in the power module are respectively connected with the power sockets on the data processing module, the control module and the interface module, the SDA and SCL sockets in the power module are connected with the PB6 and PB7 sockets, the Din and Dout sockets in the data processing chip are connected with the sockets corresponding to the GPIO pins in the control module, the sockets corresponding to the D+, D-, D_RX+ and D_RX- pins in the control module are connected with the sockets corresponding to the D_TX+, D_TX-, D_RX+ and D_RX- pins in the control module, and the connection sockets in the power module, the control module and the interface module are respectively connected with the connection sockets in the comparison circuit to realize consistency check of the transmission data between the modules, wherein the voltage output accuracy of the output socket of the power module should be controlled within ±2%, and the output current should meet the maximum power requirement of all connected modules with a certain margin (such as 20%). The communication protocol of the SDA and SCL sockets and the PB6 and PB7 sockets should be unified, which can adopt the I 2 C protocol and comply with the corresponding communication rate and electrical specifications. The connection of the sockets corresponding to the D+, D-, D_RX+ and D_RX- pins and the D_TX+, D_TX-, D_RX+ and D_RX- pins in the control module should adopt high-speed and low-delay wiring mode, and the transmission line length should be as short as possible to reduce signal transmission delay and attenuation. The working frequency of the comparison circuit should match the data transmission frequency to ensure timely discovery and processing of data inconsistency problems.

[0015] Beneficial effects: 1. Through the cooperation of modular design, clamping and plug-in connection mode and module independence, the effect of flexible combination or replacement of modules according to requirements is realized, and the purpose of low-cost customization is achieved; the device adopts the architecture of the mainboard bearing each module, and the power supply module, the control module, the data processing module and the interface module are independent and connected through the clamping plate, the clamping hook, the clamping groove and the connecting socket and plug-in connection line; this design makes it only need to add or replace the corresponding module according to the specific functional requirements when customizing the device, for example, only need to change the data processing module to meet the new data processing requirements, avoiding the high cost caused by redesigning the entire device, greatly reducing the customization cost.

[0016] 2. Through the cooperation of standard connection socket, EEPROM chip storage configuration information and data comparison circuit, the effects of hardware connection compatibility, software cooperation stability and data transmission accuracy are realized, and the purpose of high compatibility is achieved; the connection sockets of each module are standardized, ensuring the compatibility of physical connection of different modules; the EEPROM chip stores the configuration information, algorithm, working mode, etc. of each module, which can make the module quickly adapt to the new environment when the module is replaced or combined, ensuring the compatibility of the software level; the comparison circuit compares the consistency of the data transmitted between each module, and through the corresponding connection of the connection socket of each module, the accuracy of the data in the transmission process is ensured, avoiding the compatibility problem caused by inconsistent data, thereby improving the compatibility of the device. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative labor.

[0018] Fig. 1 It is a structural schematic diagram of the present application.

[0019] Fig. 2 It is a circuit connection schematic diagram of the present application.

[0020] The reference signs in the figure are: 1, mainboard; 2, power module; 3, control module; 4, data processing module; 5, interface module; 6, clamping plate; 601, clamping hook; 7, clamping groove; 8, comparison circuit. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical scheme and advantages of the utility model clearer, the technical scheme in the utility model is clearly and completely described, obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by the person skilled in the art without creative labor belong to the protection scope of the utility model.

[0022] The portable small device stacking mechanism provided in the embodiments of the application solves the technical problems of high customization cost and poor device compatibility of the prior art small devices. In actual use, low-cost customization is achieved, and modules can be flexibly combined or replaced as needed; and the purpose of high compatibility is achieved.

[0023] In order to better understand the above technical scheme, the above technical scheme will be described in detail in combination with the drawings of the specification and specific embodiments.

[0024] With reference to Figs. 1-2 A portable small device stacking mechanism comprises a mainboard 1, a power module 2 connected to the mainboard 1, a control module 3 connected to the mainboard 1, a data processing module 4 clamped to the power module 2, an interface module 5 clamped to the control module 3, and a plurality of clamping plates 6 for clamping the data processing module 4 and the interface module 5 to the power module 2 and the control module 3. A clamping hook 601 is arranged on the clamping plate 6, and a clamping groove 7 is arranged on the data processing module 4 and the interface module 5. The clamping groove 7 provides a clamping position for the clamping hook 601. The power module 2, the control module 3, the data processing module 4 and the interface module 5 are each provided with a connection jack. The connection jacks in the power module 2, the control module 3, the data processing module 4 and the interface module 5 are connected by a plug-in connection line.

[0025] The above structure realizes the orderly connection of the modules on the mainboard 1 and the stable clamping between the data processing module 4 and the interface module 5 and the power module 2 and the control module 3. The plug-in connection line and the connection jack provide the possibility of flexible combination and communication between the modules, facilitating the assembly, disassembly and upgrading of the device.

[0026] The power module 2 comprises a power management chip and an EEPROM chip. The power management chip is used for managing and distributing the input power to meet the power requirements of different modules. The EEPROM chip is used for storing the related configuration information of the power module 2.

[0027] In the power module 2, the effective management and distribution of the input power are realized, the power demand of different modules is met, and the related configuration information of the power module 2 can be stored through the EEPROM chip, so that the power module 2 can be accurately configured and adjusted according to the stored information in different working scenarios.

[0028] The VIN pin of the power management chip is connected with the power socket in the power module 2 and is used for external power supply, a capacitor is connected in series on the Vout pin of the power management chip, an inductor is connected in parallel at both ends of the capacitor, the negative pole of the capacitor is connected with the ground socket in the power module 2, the other end of the inductor is connected with the output interface in the power module 2, and the SDA and SCL sockets corresponding to the SDA and SCL pins on the EEPROM chip are also arranged in the power module 2, and the SDA pin on the EEPROM chip is also connected with the connection socket in the power module 2.

[0029] In the circuit design of the power management chip, the external power supply is connected, the capacitor connected in series and the inductor connected in parallel on the Vout pin are designed to realize the filtering of the output power supply, the power quality is improved, and the communication connection between the EEPROM chip and the power module 2 is established to ensure the interaction of the configuration information.

[0030] The data processing module 4 includes a data processing chip, an EEPROM chip and a comparison circuit 8, the data processing chip is used for operating, analyzing and converting the collected data, the EEPROM chip is used for storing the data processing algorithm, related configuration information and intermediate processing result of the data processing module 4, and the comparison circuit 8 is used for comparing the consistency of the data transmitted by different modules to ensure the accuracy of the data transmission and processing between modules.

[0031] In the data processing module 4, the comprehensive processing of the collected data is realized, including operation, analysis and conversion, the EEPROM chip is used to store the data processing related information to realize the saving of the algorithm, configuration and intermediate result, and the comparison circuit 8 is used to realize the accuracy check of the data transmitted by each module to ensure the correctness of the data processing.

[0032] The Din pin and the Dout pin on the data processing chip are connected with the Din and Dout sockets in the data processing module 4, the GND pin on the data processing chip is connected with the ground socket in the data processing module 4, the pull-up resistor is connected between the Din pin and the ground socket, the VCC pin on the data processing chip is connected with the power socket in the data processing module 4, and the PB6 and PB7 pins on the data processing chip are connected with the SCL pin and the SDA pin on the EEPROM chip.

[0033] In the pin connection design of the data processing chip, the normal input and output of data are realized, the stability of the chip work is ensured through the ground, pull-up resistor and power connection, and the communication connection with the EEPROM chip is established to realize the information interaction between the data processing chip and the EEPROM chip.

[0034] The control module 3 comprises a microcontroller and an EEPROM chip, the microcontroller is used for sending power management instructions to the power module 2, scheduling data processing tasks of the data processing module 4, and interacting with the interface module 5 to process communication control with external devices, and the EEPROM chip is used for storing control algorithms, device running state parameters, working mode configuration information of each module of the control module 3.

[0035] In the control module 3, the coordinated control of the power module 2, the data processing module 4 and the interface module 5 is realized through the microcontroller, including power management instruction sending, data processing task scheduling and external communication control, and the EEPROM chip stores control related information, realizes the accurate configuration and operation of the control module 3 in different states.

[0036] The PB6 and PB7 pins on the microcontroller are connected with the SDA pin and the SCL pin on the EEPROM chip, the PB6 and PB7 pins on the microcontroller are connected with the PB6 and PB7 sockets in the control module 3, and the SDA pin is also connected with the connection socket in the control module 3; the VCC pin on the EEPROM chip is connected with the VCC pin on the microcontroller, the VCC pin on the microcontroller is connected with the power socket in the control module 3; the GND pin on the microcontroller is connected with the grounding socket in the control module 3; the RST pin on the microcontroller is connected with the reset capacitor, and the other end of the reset capacitor is connected with the grounding socket; the D_TX+, D_TX-, D_RX+ and D_RX- pins on the microcontroller are connected with the corresponding sockets in the control module 3; the XTAL1 and XTAL2 pins on the microcontroller are connected with the crystal oscillator, and the two ends of the crystal oscillator are connected with capacitors, and the capacitors are connected with the grounding socket; the GPIO pin on the microcontroller is connected with a resistor in series, and the other end of the resistor is connected with the socket corresponding to the GPIO pin in the control module 3, and the RST pin and the VCC pin on the microcontroller are connected with a pull-up resistor.

[0037] In the circuit connection of the control module 3, the communication connection of the microcontroller and the EEPROM chip is realized to ensure the interaction of control algorithms, running state parameters and other information, and the connection of the microcontroller and other circuit elements is completed, including the reset circuit, the crystal oscillator circuit, the GPIO interface circuit and the like, to ensure the stable work of the microcontroller and the interaction with other modules.

[0038] The interface module 5 comprises a USB interface chip and an EEPROM chip, the USB interface chip is used to realize the data transmission and connection function of the device and the external USB device, and the EEPROM chip is used to store the working mode and transmission rate of the USB interface.

[0039] In the interface module 5, the data transmission and connection function of the device and the external USB device are realized through the USB interface chip, and the working mode and transmission rate information of the USB interface are stored through the EEPROM chip, so that the USB interface chip can be correctly configured according to the stored information.

[0040] The D+, D-, D_RX+, and D_RX- pins on the USB interface chip are respectively connected to the corresponding sockets in the interface module 5; the VCC pin on the USB interface chip is connected to the power socket; the GND pin on the USB interface chip is connected to the ground socket; the PB6 and PB7 pins on the USB interface chip are connected to the SCL and SDA pins on the EEPROM chip; the VCC pin on the EEPROM chip is connected to the power socket, the SCL and SDA pins are respectively connected to the corresponding pins on the USB interface chip, and the GND pin on the EEPROM chip is connected to the ground socket; resistors are connected in series to the D+, D-, D_RX+, and D_RX- pins on the USB interface chip, and capacitors are connected between the D+, D-, D_RX+, and D_RX- pins on the USB interface chip and the ground socket.

[0041] In the circuit design of the interface module 5, the connection of the USB interface chip and the sockets in the interface module 5 is realized, the normal operation of the data transmission pins is ensured, the chip is powered and a stable reference potential is provided through the power supply and ground connection, the communication connection between the USB interface chip and the EEPROM chip is established, and the signal is optimized by connecting resistors in series to the data transmission pins and connecting capacitors.

[0042] The output sockets in the power module 2 are respectively connected to the power sockets on the data processing module 4, the control module 3, and the interface module 5; the SDA and SCL sockets in the power module 2 are connected to the PB6 and PB7 sockets; the Din and Dout sockets in the data processing chip are connected to the sockets corresponding to the GPIO pins in the control module 3; the sockets corresponding to the D+, D-, D_RX+, and D_RX- pins in the control module 3 are connected to the sockets corresponding to the D_TX+, D_TX-, D_RX+, and D_RX- pins in the control module 3; the connection sockets in the power module 2, the control module 3, and the interface module 5 are respectively connected to the connection sockets in the comparison circuit 8, so as to realize the consistency check of the transmission data between the modules.

[0043] The power module 2 realizes the power supply connection for other modules, establishes the communication link between the power module 2 and other modules, guarantees the interaction of power management information, and realizes the data transmission between the data processing module 4 and the control module 3, the forwarding processing of the internal data of the control module 3, and the consistency check of the transmission data between modules by the comparison circuit 8, thereby guaranteeing the accuracy of the data transmission and processing of the whole device.

[0044] In use, when the device is started, the external power supply is connected to the power module 2 through the VIN pin of the power management chip, the power management chip manages and distributes the input power, a capacitor is connected in series on the Vout pin of the power management chip, and the capacitor is connected in parallel across the inductor, and the stable power supply is output to the output interface of the power module 2 through the inductor; the output socket in the power module 2 supplies power to the power sockets on the data processing module 4, the control module 3 and the interface module 5, and the SDA and SCL sockets in the power module 2 are connected with the PB6 and PB7 sockets for communication; in the data processing module 4, the data processing chip is connected with the Din and Dout sockets in the data processing module 4 through the Din and Dout pins for data input and output, the GND pin is grounded, the VCC pin is connected with the power supply to ensure normal work, the pull-up resistor ensures the stability of the Din pin signal, the PB6 and PB7 pins communicate with the EEPROM chip, the EEPROM chip stores data processing algorithms, related configuration information and intermediate processing results, and the comparison circuit 8 compares the consistency of the data transmitted by each module; in the control module 3, the microcontroller is connected with the power supply through the VCC pin and grounded through the GND pin to ensure work, the RST pin is connected with the reset capacitor to realize reset, the XTAL1 and XTAL2 pins form a clock circuit with the crystal oscillator and the capacitor C1 to provide a clock signal, and the GPIO pin is connected with the corresponding socket through a resistor for input and output; the microcontroller communicates with the EEPROM chip through the PB6 and PB7 pins to obtain control algorithms, device running state parameters and module working mode configuration information, then sends power management instructions to the power module 2, schedules the data processing task of the data processing module 4, and processes the communication control with external devices by interacting with the interface module 5 through the D_TX+, D_TX-, D_RX+ and D_RX- pins; in the interface module 5, the VCC pin of the USB interface chip is connected with the power supply, the GND pin is grounded, the D+, D-, D_RX+ and D_RX- pins are connected with the corresponding sockets in the interface module 5 to realize data transmission with external USB devices, the PB6 and PB7 pins communicate with the EEPROM chip to obtain the working mode and transmission rate information of the USB interface, and resistors are connected in series on the D+, D-, D_RX+ and D_RX- pins, and a capacitor is connected between the resistors and the ground socket to optimize the signal; in the whole process, the Din and Dout sockets in the data processing chip are connected with the sockets corresponding to the GPIO pins in the control module 3 to realize data transmission, the sockets corresponding to the D+, D-, D_RX+ and D_RX- pins in the control module 3 are connected with the sockets corresponding to the D_TX+, D_TX-, D_RX+ and D_RX- pins in the control module 3 to realize data forwarding processing in the control module 3, and the connection sockets in the power module 2, the control module 3 and the interface module 5 are connected with the connection sockets in the comparison circuit 8 to realize consistency check on the transmission data between the modules.

[0045] The figures expressed in the drawings are example figures, and the purpose is only to more intuitively show the key structure and connection relationship of the portable small equipment stacking mechanism; in actual application, the appearance and size of the device can be adjusted and optimized according to specific needs.

[0046] The utility model covers any alternative, modification, equivalent method and scheme made on the essence and range of the utility model. In order to make the public have the thorough understanding of the utility model, the specific details are explained in the above preferred embodiment of the utility model, and the utility model can also be completely understood without the description of these details for the person skilled in the art. In addition, in order to avoid unnecessary confusion to the essence of the utility model, well-known methods, processes, flows, elements and circuits are not described in detail.

[0047] The above is only the preferred embodiment of the utility model, and it should be pointed out that for ordinary skilled person in the art, on the premise of not departing from the principle of the utility model, a number of improvements and refinements can also be made, and these improvements and refinements should also be regarded as the protection range of the utility model.

Claims

1. A portable small device stacking mechanism characterized by comprising: It includes: The main board (1); Power module (2) connected to the main board (1); Control module (3) connected to the main board (1); Data processing module (4) clamped on the power module (2); Interface module (5) clamped on the control module (3); The card plate (6) is provided with a plurality of card plates (6), which is used for data processing module (4) and interface module (5) and power module (2) and control module (3) between the card solid; Clamp (601) is arranged on the card plate (6); The clamping groove (7) is arranged on the data processing module (4) and the interface module (5), and the clamping groove (7) is used for providing the clamping position for the clamping hook (601) The power module (2), the control module (3), the data processing module (4) and the interface module (5) are provided with connecting sockets, and the connecting sockets in the power module (2), the control module (3), the data processing module (4) and the interface module (5) are connected through the connecting line.

2. A portable small device stacking mechanism according to claim 1, characterized by: The power module (2) includes a power management chip and an EEPROM chip, the power management chip is used for managing and distributing the input power to meet the power demand of different modules, and the EEPROM chip is used for storing the related configuration information of the power module (2).

3. A portable small device stacking mechanism according to claim 2, characterized by: The VIN pin of the power management chip is connected with the power socket in the power module (2), which is used for external power supply, the Vout pin of the power management chip is connected with the capacitor, the capacitor is connected with the inductor in parallel, the negative electrode of the capacitor is connected with the ground socket in the power module (2), the other end of the inductor is connected with the output interface in the power module (2), and the power module (2) is also provided with SDA and SCL sockets corresponding to the SDA and SCL pins on the EEPROM chip, and the SDA pin on the EEPROM chip is also connected with the connecting socket in the power module (2).

4. The portable small device stacking mechanism according to claim 1, characterized by: The data processing module (4) includes a data processing chip, an EEPROM chip and a comparison circuit (8), the data processing chip is used for operating, analyzing and converting the collected data, the EEPROM chip is used for storing the data processing algorithm, the related configuration information and the intermediate processing result of the data processing module (4), and the comparison circuit (8) is used for comparing the consistency of the data transmitted by different modules, so as to ensure the accuracy of data transmission and processing among modules.

5. A portable small device stacking mechanism according to claim 4, characterized by: The Din pin and the Dout pin on the data processing chip are connected with the Din and Dout sockets in the data processing module (4) correspondingly, the GND pin on the data processing chip is connected with the ground socket in the data processing module (4), the Din pin is connected with the pull-up resistor between the ground socket, the VCC pin on the data processing chip is connected with the power socket in the data processing module (4), and the PB6 and PB7 pins on the data processing chip are connected with the SCL pin and the SDA pin on the EEPROM chip correspondingly.

6. The portable small device stacking mechanism of claim 1, wherein: The control module (3) comprises a microcontroller and an EEPROM chip, the microcontroller is used for sending power management instructions to the power module (2), scheduling data processing tasks of the data processing module (4), and interacting with the interface module (5) to process communication control with external equipment, and the EEPROM chip is used for storing control algorithms, equipment running state parameters, and working mode configuration information of each module of the control module (3).

7. A portable small device stacking mechanism according to claim 6, characterized by: The PB6 and PB7 pins on the microcontroller are connected to the SDA pin and the SCL pin on the EEPROM chip in correspondence, the PB6 and PB7 pins on the microcontroller are connected to the PB6 and PB7 sockets in the control module (3), and the SDA pin is also connected to the connecting socket in the control module (3); the VCC pin on the EEPROM chip is connected to the VCC pin on the microcontroller, the VCC pin on the microcontroller is connected to the power socket in the control module (3), the GND pin on the microcontroller is connected to the grounding socket in the control module (3), the RST pin on the microcontroller is connected to a reset capacitor, and the other end of the reset capacitor is connected to the grounding socket; the D_TX+, D_TX-, D_RX+ and D_RX- pins on the microcontroller are connected to the corresponding sockets in the control module (3); the XTAL1 and XTAL2 pins on the microcontroller are connected to a crystal oscillator, and the two ends of the crystal oscillator are connected to capacitors, and the capacitors are connected to the grounding socket; a resistor is connected in series on the GPIO pin on the microcontroller, and the other end of the resistor is connected to the socket corresponding to the GPIO pin in the control module (3), and a pull-up resistor is connected between the RST pin and the VCC pin on the microcontroller.

8. The portable small device stacking mechanism of claim 1, wherein: The interface module (5) comprises a USB interface chip and an EEPROM chip, the USB interface chip is used for realizing data transmission and connection functions of the equipment and external USB equipment, and the EEPROM chip is used for storing working modes and transmission rates of the USB interface.

9. A portable small device stacking mechanism according to claim 8, characterized by: The D+, D-, D_RX+ and D_RX- pins on the USB interface chip are connected to the corresponding sockets in the interface module (5) respectively; the VCC pin on the USB interface chip is connected to the power socket; the GND pin on the USB interface chip is connected to the grounding socket; the PB6 and PB7 pins on the USB interface chip are connected to the SCL pin and the SDA pin on the EEPROM chip in correspondence; the VCC pin on the EEPROM chip is connected to the power socket, the SCL and SDA pins are connected to the corresponding pins of the USB interface chip respectively, the GND pin of the EEPROM chip is connected to the grounding socket, resistors are connected in series on the D+, D-, D_RX+ and D_RX- pins on the USB interface chip, and capacitors are connected between the D+, D-, D_RX+ and D_RX- pins on the USB interface chip and the grounding socket.

10. The portable small device stacking mechanism of claim 4, wherein: The output socket in the power module (2) is connected with the power socket on the data processing module (4), the control module (3) and the interface module (5) respectively, the SDA, SCL socket in the power module (2) is connected with the PB6, PB7 socket, the Din, Dout socket in the data processing chip is connected with the socket corresponding to the GPIO pin in the control module (3), the socket corresponding to the D+, D-, D_RX+, D_RX- pin in the control module (3) is connected with the socket corresponding to the D_TX+, D_TX-, D_RX+, D_RX- pin in the control module (3), the connecting socket in the power module (2), the control module (3) and the interface module (5) is connected with the connecting socket in the comparison circuit (8) correspondingly, so as to realize the consistency check on the transmission data between the modules.

Images