Power supply control circuit

By designing a power control circuit, and utilizing a first switching circuit and a second isolation circuit to disconnect the electrical connection of the analog front-end detection circuit when the power is turned off, the problem of excessive power consumption of the analog front-end detection circuit is solved, and low-power operation of the battery management system is achieved.

CN223613089UActive Publication Date: 2025-11-28HUNAN MEGMEET ELECTRICAL TECH CO LTD
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Patent Information

Application Number
CN202520277615.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-20
Publication Date
2025-11-28
Estimated Expiration
2035-02-20

AI Technical Summary

Technical Problem

The analog front-end detection circuit consumes too much power in sleep mode, leading to over-discharge of the battery and excessive static power consumption of the battery management system.

Method used

Design a power control circuit, including a first switching circuit and a second isolation circuit. The circuit uses a control signal to disconnect or connect the power supply when the power is turned on and off, preventing the analog front-end detection circuit from supplying power to the isolation circuit and reducing power consumption.

Benefits of technology

It effectively reduces the static power consumption of the battery management system, prevents battery over-discharge, and reduces resource waste.

✦ Generated by Eureka AI based on patent content.

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    Figure CN223613089U_ABST
Patent Text Reader

Abstract

The utility model relates to a power supply control circuit, comprising a first switch circuit and a second isolation circuit, the first switch circuit and the power supply output end of an analog front end detection circuit are electrically connected to a first node; the high-voltage power supply ends and the high-voltage enabling ends of the first switching circuit and the first isolating circuit are jointly and electrically connected to a second node, the control end of the first switching circuit is electrically connected with the first end of the second isolating circuit, and the second end of the second isolating circuit is grounded. The third end of the second isolation circuit is electrically connected with the first power supply, the low-voltage power supply end of the first isolation circuit and the power supply end of the controller. The fourth end of the second isolation circuit is electrically connected with the controller. When the first power supply is powered off, the analog front-end detection circuit enters a dormant state, the first switching circuit disconnects the electrical connection between the first node and the second node, the analog front-end detection circuit does not supply power to the high-voltage side of the first isolation circuit any more, and the static power consumption is reduced.
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Description

TECHNICAL FIELD

[0001] The utility model relates to the field of battery management system especially relates to a power control circuit. BACKGROUND

[0002] The analog front-end detection circuit in the battery management system is powered by the battery pack, which is mainly used for collecting and monitoring the parameters of the battery pack to protect the battery pack from abnormality. When the analog front-end detection circuit is in the sleep mode, if the power consumption of the analog front-end detection circuit is too large, it may cause the battery to be over-discharged, and the static power consumption of the entire battery management system is too large. SUMMARY

[0003] The utility model embodiment aims at providing a kind of power control circuit, it can reduce the static power consumption of battery management system, prevent battery over-discharge.

[0004] To solve the above technical problems, the utility model embodiment provides the following technical solutions:

[0005] In the first aspect, the utility model embodiment provides a kind of power control circuit, applied to battery management system, the battery management system includes analog front-end detection circuit, first isolation circuit and controller, wherein the analog front-end detection circuit is communicated with the controller through the first isolation circuit, and the power control circuit includes: first switching circuit and second isolation circuit;

[0006] The power output end of the first switching circuit and the analog front-end detection circuit is electrically connected to first node, the high-voltage power supply end of the first switching circuit, the high-voltage enable end of the first isolation circuit and the high-voltage enable end of the first isolation circuit are electrically connected to second node, the control end of the first switching circuit and the first end of the second isolation circuit are electrically connected, the second end of the second isolation circuit is grounded, the third end of the second isolation circuit and first power supply are electrically connected, the fourth end of the second isolation circuit and the controller are electrically connected, and the first power supply is also electrically connected with the low-voltage power supply end of the first isolation circuit, the low-voltage enable end of the first isolation circuit and the power supply end of the controller respectively;

[0007] The controller is used to output control signal when the first power supply is powered on, so that the second isolation circuit outputs the on signal to the first switching circuit, and the first switching circuit is used to respond to the input of the on signal and connect the electrical connection between the first node and the second node;

[0008] The second isolation circuit is also used to output the off signal to the first switching circuit when the first power supply is powered off, and the first switching circuit is also used to respond to the input of the off signal and disconnect the electrical connection between the first node and the second node.

[0009] In some embodiments, the first switch circuit comprises a first MOS transistor and a first resistor;

[0010] The source of the first MOS transistor is connected to the first node and one end of the first resistor respectively, the gate of the first MOS transistor is electrically connected to the other end of the first resistor and the first end of the second isolation circuit respectively, and the drain of the first MOS transistor is electrically connected to the second node.

[0011] In some embodiments, the second isolation circuit comprises an optocoupler, a second resistor and a third resistor;

[0012] The collector of the triode of the optocoupler is electrically connected to the control end of the first switch circuit, the emitter of the triode of the optocoupler is grounded, the anode of the diode of the optocoupler is connected to the first power supply and one end of the second resistor respectively, the cathode of the diode of the optocoupler is connected to the other end of the second resistor and one end of the third resistor respectively, and the other end of the third resistor is electrically connected to the controller.

[0013] In some embodiments, the power supply control circuit further comprises a second switch circuit and a first pull-up circuit;

[0014] The control end of the second switch circuit is electrically connected to the second node, the first end of the second switch circuit is electrically connected to the first end of the first pull-up circuit and the receiving end of the analog front-end detection circuit respectively, the second end of the second switch circuit is electrically connected to the output end of the first isolation circuit, and the second end of the first pull-up circuit is electrically connected to the first node.

[0015] The second switch circuit is configured to, in response to the second node being powered on, connect the receiving end of the analog front-end detection circuit and the output end of the first isolation circuit.

[0016] The second switch circuit is further configured to, in response to the second node being powered off, disconnect the receiving end of the analog front-end detection circuit and the output end of the first isolation circuit, so that the first pull-up circuit pulls up the potential of the receiving end of the analog front-end detection circuit to the potential of the first node.

[0017] In some embodiments, the second switch circuit comprises a second MOS transistor and a fourth resistor;

[0018] The gate of the second MOS transistor is electrically connected to one end of the fourth resistor at the second node, the source of the second MOS transistor is electrically connected to the other end of the fourth resistor at the output of the first isolation circuit, and the drain of the second MOS transistor is electrically connected to the first end of the first pull-up circuit and the receiving end of the analog front-end detection circuit, respectively.

[0019] In some embodiments, the first pull-up circuit includes a fifth resistor, one end of the fifth resistor is electrically connected to the first node, and the other end of the fifth resistor is electrically connected to the first end of the second switch circuit and the receiving end of the analog front-end detection circuit, respectively.

[0020] In some embodiments, the power supply control circuit further includes a unidirectional conduction circuit and a second pull-up circuit.

[0021] One end of the unidirectional conduction circuit is electrically connected to the sending end of the analog front-end detection circuit, the other end of the unidirectional conduction circuit is electrically connected to the receiving end of the first isolation circuit and one end of the second pull-up circuit, respectively, and the other end of the second pull-up circuit is electrically connected to the second node.

[0022] The unidirectional conduction circuit is configured to send a low-level signal to the receiving end of the first isolation circuit in response to the sending end of the analog front-end detection circuit sending a low-level signal, and to be in a cut-off state in response to the sending end of the analog front-end detection circuit sending a high-level signal, so that the second pull-up circuit pulls up the potential of the receiving end of the first isolation circuit to the potential of the second node.

[0023] In some embodiments, the unidirectional conduction circuit includes a diode and a sixth resistor.

[0024] One end of the sixth resistor is electrically connected to the sending end of the analog front-end detection circuit, the other end of the sixth resistor is connected to the cathode of the diode, and the anode of the diode is electrically connected to the receiving end of the first isolation circuit and one end of the second pull-up circuit, respectively.

[0025] In some embodiments, the second pull-up circuit includes a seventh resistor, one end of the seventh resistor is electrically connected to the input end of the first isolation circuit and the unidirectional conduction circuit, respectively, and the other end of the seventh resistor is electrically connected to the second node.

[0026] In various embodiments of the utility model, this power control circuit includes first switch circuit and second isolation circuit, first switch circuit and the power output end of analog front end detection circuit are electric connection in first node, the high voltage power supply end of first switch circuit, first isolation circuit and the high voltage enable end of first isolation circuit are electric connection in second node, the control end of first switch circuit and the first end of second isolation circuit are electrically connected, the second end of second isolation circuit is grounded, the third end of second isolation circuit and first power supply are electrically connected, the fourth end of second isolation circuit and controller are electrically connected, first power supply is electrically connected with the low voltage power supply end of first isolation circuit and the power supply end of controller respectively.

[0027] When the first power supply is powered on, the controller outputs a control signal, so that the second isolation circuit outputs a conductive signal to the first switch circuit, and then the first switch circuit connects the electrical connection between the first node and the second node, the analog front end detection circuit supplies power to the high voltage power supply end of the first isolation circuit, so that the first isolation circuit works normally, and the analog front end detection circuit normally communicates between the first isolation circuit and the controller. When the first power supply is powered off, the analog front end detection circuit enters sleep, then the second isolation circuit outputs a stop signal to the first switch circuit, so that the first switch circuit disconnects the electrical connection between the first node and the second node, the analog front end detection circuit no longer supplies power to the high voltage side of the first isolation circuit, reduces the power consumption of the analog front end detection circuit, and then reduces the static power consumption of the whole battery management system, and prevents the battery from over discharging. BRIEF DESCRIPTION OF DRAWINGS

[0028] One or more embodiments are exemplified by the pictures in the drawings corresponding thereto, which do not constitute a limitation on the embodiments, and elements with the same reference numerals in the drawings represent similar elements, unless otherwise specified, and the drawings do not constitute a proportional limit.

[0029] Figure 1 is a structural schematic diagram of one of the battery management systems provided by the embodiments of the utility model;

[0030] Figure 2 is a structural schematic diagram of one of the power control circuits provided by the embodiments of the utility model;

[0031] Figure 3 is a circuit structure schematic diagram of one of the power control circuits provided by the embodiments of the utility model. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical scheme and advantages of the utility model more clear and obvious, the utility model is further described in detail below by combining with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the utility model, and are not used to limit the utility model.

[0033] Referring to Figure 1 , Figure 1 The structural diagram of the battery management system is provided by the embodiment of the utility model, the battery management system 100 includes analog front end detection circuit 10, first isolation circuit 20 and controller 30, wherein, analog front end detection circuit 10 is communicated with controller 30 through first isolation circuit 20.

[0034] Analog front end detection circuit 10 can also be called analog front end (Ana l og Front End, AFE for short), which is an integrated circuit.Analog front end detection circuit 10 is powered by battery pack, and analog front end detection circuit 10 generally monitors the voltage, current and temperature and other key parameters of battery pack in real time through the built-in acquisition module.The data collected are processed by specific algorithm to calculate the state of charge (SOC) of battery, state of health (SOH) and other important information.If the capacity difference between each cell in the battery pack is detected, analog front end detection circuit 10 will start the equalization module to adjust the capacity of each cell.The processed data are transmitted to the main control unit of the system or other monitoring system according to the set communication protocol through the communication module.

[0035] Controller 30 is the main control unit of battery management system 100, which receives the data sent by analog front end detection circuit 10 to monitor the voltage, current and temperature of battery pack.Meanwhile, controller 30 can also send data or control instructions to analog front end detection circuit 10, for example, when detecting that the battery appears overcharge, overdischarge or overheat and other abnormal states, controller 30 sends the corresponding control instructions to analog front end detection circuit 10 to protect the battery pack from abnormality.

[0036] Analog front end detection circuit 10 is powered by battery pack, which is high voltage side.Controller 30 is powered by external power supply, for example, the external power supply is converted from alternating current to direct current, and then is converted from high voltage to low voltage to obtain first power supply, the voltage of first power supply is 5V or 3.3V, and first power supply supplies power to controller 30 to make controller 30 work normally.5V or 3.3V power supply is low voltage, so controller 30 is low voltage side.Therefore, in order to enable normal communication between analog front end detection circuit 10 and controller 30, first isolation circuit 20 needs to be arranged between analog front end detection circuit 10 and controller 30, first isolation circuit 20 electrically isolates analog front end detection circuit 10 and controller 30, and completes the data intercommunication function.

[0037] The first isolation circuit 20 includes a high-voltage power supply terminal, a low-voltage power supply terminal, a high-voltage enable terminal, and a low-voltage enable terminal. In related technologies, the high-voltage power supply terminal and the high-voltage enable terminal are electrically connected to the power output terminal of the analog front-end detection circuit 10. The battery pack supplies power to the analog front-end detection circuit 10, which then supplies power to the high-voltage power supply terminal and pulls up the high-voltage enable terminal. The low-voltage power supply terminal, the low-voltage enable terminal, and the power supply terminal of the controller 30 are all connected to a first power source, which supplies power to them. The first isolation circuit 20 will only function normally and complete the data transmission function when all four terminals are powered normally.

[0038] When the primary power supply is off or the analog front-end detection circuit 10 is in a dormant state, for example, when the battery management system 100 is packaged on a circuit board but not in use, there is no external power supply providing the primary power, and the analog front-end detection circuit 10 does not need to exchange data with the controller 30, then the analog front-end detection circuit 10 is in a dormant state and the primary power supply is off. If the analog front-end detection circuit 10 continues to supply power to the high-voltage side of the first isolation circuit, it will cause the battery pack to continuously discharge, which may lead to over-discharge of the battery, resulting in excessive static power consumption of the entire battery management system 100 and wasted resources.

[0039] Based on the above issues, such as Figure 1 As shown, this embodiment of the present invention provides a power control circuit. The power control circuit 40 is electrically connected to the high-voltage power supply terminal, the high-voltage enable terminal, and the power output terminal of the analog front-end detection circuit 10. When the first power supply is turned off or the analog front-end detection circuit 10 is in a dormant period, the power control circuit 40 disconnects the electrical connection between the high-voltage power supply terminal and the power output terminal, and also disconnects the electrical connection between the high-voltage enable terminal and the power output terminal, so that the analog front-end detection circuit 10 no longer supplies power to the high-voltage side of the first isolation circuit 20, preventing the battery pack from continuously discharging and reducing the static power consumption of the system.

[0040] Please continue reading. Figure 1 The power control circuit 40 includes a first switching circuit 41 and a second isolation circuit 42. The first switching circuit 41 and the power output terminal of the analog front-end detection circuit 10 are electrically connected to the first node a. The first switching circuit 41, the high-voltage power supply terminal of the first isolation circuit 20, and the high-voltage enable terminal of the first isolation circuit 20 are all electrically connected to the second node b. The control terminal of the first switching circuit 41 is electrically connected to the first terminal of the second isolation circuit 42. The second terminal of the second isolation circuit 42 is grounded. The third terminal of the second isolation circuit 42 is electrically connected to the first power supply. The fourth terminal of the second isolation circuit 42 is electrically connected to the controller 30. The first power supply is also electrically connected to the low-voltage power supply terminal of the first isolation circuit 20, the low-voltage enable terminal of the first isolation circuit 20, and the power supply terminal of the controller 30.

[0041] When the first power supply is powered on, the controller 30 outputs a control signal, so that the second isolation circuit 42 outputs a conduction signal to the first switch circuit 41, the first switch circuit 41 is in a conduction state, and then the first switch circuit 41 connects the electrical connection between the first node a and the second node b, the analog front-end detection circuit 10 supplies power to the high-voltage side of the first isolation circuit 20, so that the first isolation circuit 20 normally works, and the analog front-end detection circuit 10 normally communicates between the first isolation circuit 20 and the controller 30.

[0042] When the first power supply is powered off, or the analog front-end detection circuit 10 enters sleep, the controller 30 can no longer output a control signal to the second isolation circuit 42, so that the second isolation circuit 42 outputs a cut-off signal to the first switch circuit 41, the first switch circuit 41 is in a cut-off state, and then the first switch circuit 41 disconnects the electrical connection between the first node a and the second node b, and the analog front-end detection circuit 10 no longer supplies power to the high-voltage side of the first isolation circuit 20.

[0043] Since the first switch circuit 41 is electrically connected with the analog front-end detection circuit 10 and the high-voltage side of the first isolation circuit 20, and the controller 30 is a low-voltage side, the first switch circuit 41 cannot directly obtain the control signal sent by the controller 30, in the embodiment, the second isolation circuit 42 is used to isolate the first switch circuit 41 and the controller 30, and realize signal transmission.

[0044] Therefore, when the first power supply is powered off or the analog front-end detection circuit 10 is in a sleep state, the power supply control circuit 40 disconnects the electrical connection between the power output end of the analog front-end detection circuit 10 and the second node b, so that the analog front-end detection circuit 10 no longer supplies power to the high-voltage side of the first isolation circuit 20, reduces the power consumption of the analog front-end detection circuit 10, and then reduces the static power consumption of the whole battery management system 100, and prevents the battery from over-discharging.

[0045] When the first power supply is powered off, the low-voltage power supply end of the first isolation circuit 20 has no power supply, and the first isolation circuit 20 is also in a powered-off state, and when the first isolation circuit 20 is in a powered-off state, the output end of the first isolation circuit 20 is in a low-level state by default, and if the output end of the first isolation circuit 20 is directly electrically connected with the receiving end of the analog front-end detection circuit 10, the analog front-end detection circuit 10 will be reset.

[0046] Based on the above problems, the embodiment of the utility model provides a kind of power supply control circuit 40, it further include second switch circuit 43 and first pull-up circuit 44, the power supply control circuit 40 when the first power supply is powered off, the receiving end potential of analog front-end detection circuit 10 is pulled up, so that analog front-end detection circuit 10 is not reset during the first isolation circuit 20 powered-off period.

[0047] Specifically, refer to Figure 2 , Figure 2 is a structure diagram of the power supply control circuit 40, as Figure 2 shown, the power supply control circuit 40 further includes a second switch circuit 43 and a first pull-up circuit 44, wherein the control end of the second switch circuit 43 is electrically connected with the second node b point, the first end of the second switch circuit 43 is electrically connected with the first end of the first pull-up circuit 44 and the receiving end of the analog front-end detection circuit 10 respectively, the second end of the second switch circuit 43 is electrically connected with the output end of the first isolation circuit 20, and the second end of the first pull-up circuit 44 is electrically connected with the first node a point.

[0048] When the first power supply is powered on, the first switch circuit 41 connects the electrical connection between the first node a point and the second node b point, the second node b point is powered on, and the analog front-end detection circuit 10 supplies power to the high-voltage side of the first isolation circuit 20. Then the second switch circuit 43 connects the electrical connection between the receiving end of the analog front-end detection circuit 10 and the output end of the first isolation circuit 20, and the first isolation circuit 20 transmits data to the analog front-end detection circuit 10.

[0049] When the first power supply is powered off, the first switch circuit 41 disconnects the electrical connection between the first node a point and the second node b point, the second node b point is powered off, and the analog front-end detection circuit 10 no longer supplies power to the high-voltage side of the first isolation circuit 20. Then the second switch circuit 43 disconnects the electrical connection between the receiving end of the analog front-end detection circuit 10 and the output end of the first isolation circuit 20, and the first pull-up circuit 44 pulls up the potential of the receiving end of the analog front-end detection circuit 10 to the potential of the first node a point, so that the potential of the receiving end of the analog front-end detection circuit 10 is in a high level state, and the analog front-end detection circuit 10 cannot be reset.

[0050] In some embodiments, when the analog front-end detection circuit 10 does not communicate data, the sending end of the analog front-end detection circuit 10 is in a default high level. If the sending end of the analog front-end detection circuit 10 is directly connected with the receiving end of the first isolation circuit 20, the sending end of the analog front-end detection circuit 10 is in a default high level during the sleep period of the analog front-end detection circuit 10, and still sends a high level to the receiving end of the first isolation circuit 20, increasing static power consumption.

[0051] Based on the above problems, the utility model embodiment provides a kind of power control circuit 40, it further include unidirectional conducting circuit 45 and second pull-up circuit 46, in normal power-on state, the sending end of analog front-end detection circuit 10 passes through unidirectional conducting circuit 45 and second pull-up circuit 46 and the receiving end of first isolation circuit 20 normal communication, in power-off state, or in analog front-end detection circuit 10 hibernate state, the loop between the sending end of analog front-end detection circuit 10 and the receiving end of first isolation circuit 20 is cut off by unidirectional conducting circuit 45, reduce static power consumption.

[0052] Specifically, please continue to refer to Figure 2 , power control circuit 40 further include unidirectional conducting circuit 45 and second pull-up circuit 46. One end of unidirectional conducting circuit 45 is electrically connected with the sending end of analog front-end detection circuit 10, the other end of unidirectional conducting circuit 45 is electrically connected with the receiving end of first isolation circuit 20 and one end of second pull-up circuit 46 respectively, the other end of second pull-up circuit 46 is electrically connected to second node b point.

[0053] When the first power is powered on, if the sending end of analog front-end detection circuit 10 sends low level signal, then unidirectional conducting circuit 45 sends low level signal to the receiving end of first isolation circuit 20, so that first isolation circuit 20 receives low level signal. If the sending end of analog front-end detection circuit 10 sends high level signal, then unidirectional conducting circuit 45 is in cut-off state, and the high level signal is cut off, and second pull-up circuit 46 pulls up the potential of the receiving end of first isolation circuit 20 to the potential of second node b point, and the potential of second node b point is the potential of first power, which is high level, that is, first isolation circuit 20 receives high level signal.

[0054] When the first power is powered off, the sending end of analog front-end detection circuit 10 is high level by default, then unidirectional conducting circuit 45 is in cut-off state, and the high level signal is cut off, and second pull-up circuit 46 pulls up the potential of the receiving end of first isolation circuit 20 to the potential of second node b point, and the potential of second node b point is the potential of first power, and at this time, the first power is in power-off state, so the potential of second node b point is low level, that is, the potential of the receiving end of first isolation circuit 20 is low level.

[0055] Therefore, when the first power is powered off or analog front-end detection circuit 10 is in hibernate state, unidirectional conducting circuit 45 cuts off the sending end loop of analog front-end detection circuit 10, to further reduce static power consumption.

[0056] Please refer to Figure 3 , Figure 3It is the circuit structure schematic drawing of the power control circuit provided by the embodiment of the utility model. In the embodiment, the analog front end detection circuit 10 includes AFE chip, the first isolation circuit 20 includes isolation chip U1, peripheral filter capacitor and peripheral filter resistance, the controller 30 includes MCU chip.

[0057] The specific model of AFE chip, isolation chip U1 and MCU chip can be set according to needs, in the embodiment, AFE chip is taken as an example with the BQ79616 series chip of TI, MCU chip is taken as an example with the STM32G0B1CBT6 of ST. The first node a point is the power output pin of AFE chip, the power output pin of AFE chip outputs voltage signal CVDD, the second node b point is the common connection point of the high voltage power supply end pin of isolation chip U1 and the high voltage enable pin of isolation chip U1, that is, the common connection point of 1 pin and 7 pin, the voltage signal at the second node b point is voltage signal CVDD_1.

[0058] The first switch circuit 41 includes the first MOS tube Q1 and the first resistance R1. The source of the first MOS tube Q1 is connected with the first node a point and one end of the first resistance R1 respectively, the gate of the first MOS tube Q1 is electrically connected with the other end of the first resistance R1 and the first end of the second isolation circuit 42 respectively, and the drain of the first MOS tube Q1 is electrically connected with the second node b point. In the embodiment, the first MOS tube Q1 is PMOS tube.

[0059] The second isolation circuit 42 includes the photoelectric coupler P1, the second resistance R2 and the third resistance R3. The collector of the triode of the photoelectric coupler P1 is electrically connected with the control end of the first switch circuit 41, specifically, the collector of the triode of the photoelectric coupler P1 is connected with the gate of the first MOS tube Q1, the emitter of the triode of the photoelectric coupler P1 is grounded, the anode of the diode of the photoelectric coupler P1 is connected with the first power supply VCC and one end of the second resistance R2 respectively, the cathode of the diode of the photoelectric coupler P1 is connected with the other end of the second resistance R2 and one end of the third resistance R3 respectively, and the other end of the third resistance R3 is electrically connected with the controller 30.

[0060] The second switch circuit 43 comprises a second MOS tube Q2 and a fourth resistor R4. The gate of the second MOS tube Q2 and one end of the fourth resistor R4 are electrically connected to the second node b point, the source of the second MOS tube Q2 and the other end of the fourth resistor R4 are electrically connected to the output end of the first isolation circuit 20, and the drain of the second MOS tube Q2 is electrically connected to the first end of the first pull-up circuit 44 and the receiving end of the analog front-end detection circuit 10 respectively. Specifically, the source of the second MOS tube Q2 and the other end of the fourth resistor R4 are connected to the output pin, i.e., the 6 pin, of the isolation chip U1, and the drain of the second MOS tube Q2 is connected to the first end of the first pull-up circuit 44 and the receiving pin of the AFE chip respectively. In the embodiment, the second MOS tube Q2 is an NMOS tube.

[0061] The first pull-up circuit 44 comprises a fifth resistor R5, one end of the fifth resistor R5 is electrically connected to the first node a point, and the other end of the fifth resistor R5 is electrically connected to the first end of the second switch circuit 43 and the receiving end of the analog front-end detection circuit 10 respectively. Specifically, the other end of the fifth resistor R5 is connected to the drain of the second MOS tube Q2 and the receiving pin of the AFE chip respectively.

[0062] In some embodiments, a current limiting resistor is connected in series between the drain of the second MOS tube Q2 and the receiving pin of the AFE chip to play a current limiting role.

[0063] The unidirectional conduction circuit 45 comprises a diode D1 and a sixth resistor R6, and the second pull-up circuit 46 comprises a seventh resistor R7. One end of the sixth resistor R6 is electrically connected to the sending end of the analog front-end detection circuit 10, the other end of the sixth resistor R6 is connected to the cathode of the diode D1, the anode of the diode D1 is connected to one end of the seventh resistor R7 and the receiving pin of the isolation chip U1, and the receiving pin of the isolation chip U1 is the 3 pin.

[0064] In the normal power-on state, the AFE chip outputs a 5V power supply at the first node a point, i.e., the voltage of the voltage signal CVDD is 5V, the low-voltage power supply end of the isolation chip U1 and the power supply end of the MCU chip are all powered by the first power supply VCC, the voltage of the first power supply VCC is 3.3V, and the first power supply VCC is provided by an external power supply.

[0065] In the normal power-on state, the MCU chip outputs a control signal through the BQ.ON pin, and the control signal is at a low level. The optocoupler P1 is turned on, and the gate of the first MOS tube Q1 is turned on to the 3 pin of the optocoupler P1 through the 4 pin of the optocoupler P1. The 3 pin of the optocoupler P1 is connected to the PGND. The optocoupler P1 sends a low-level conduction signal to the first MOS tube Q1. Therefore, Vgs of the first MOS tube Q1 is less than Vth, which meets the conduction condition. The first MOS tube Q1 is turned on, the electrical connection between the first node a and the second node b is turned on, the 5V power supply output by the AFE chip supplies power to the high-voltage supply end of the isolation chip U1, and the high-voltage enable pin of the isolation chip U1 is pulled up, so that the isolation chip U1 can work normally.

[0066] When the transmitting pin of the AFE chip outputs a low-level signal, the diode D1 is turned on, the second power supply flows back to the transmitting pin of the AFE chip through the seventh resistor R7, the diode D1 and the sixth resistor R6, the high-voltage side receiving pin (3 pin) of the isolation chip U1 is at a low level, and then the isolation chip U1 outputs to the receiving end of the MCU chip through the low-voltage side output pin (14 pin) of the isolation chip U1, to complete the signal transmission.

[0067] When the transmitting pin of the AFE chip outputs a high-level signal, the diode D1 is cut off, the high-voltage side receiving pin (3 pin) of the isolation chip U1 is pulled up to a high level by the second power supply, and then the isolation chip U1 outputs to the receiving end of the MCU chip through the low-voltage side output pin (14 pin) of the isolation chip U1, to complete the signal transmission.

[0068] When the transmitting pin of the MCU chip outputs a low-level signal, the low-voltage side receiving pin (11 pin) of the isolation chip U1 receives the low-level signal, and then the isolation chip U1 outputs to the source of the second MOS tube Q2 through the high-voltage side output pin (6 pin) of the isolation chip U1. Vgs of the second MOS tube Q2 is greater than Vth, which meets the conduction condition. The second MOS tube Q2 is turned on, the low-level signal flows to the receiving pin of the AFE chip through the second MOS tube Q2 and the RC filter, and the signal transmission is completed.

[0069] When the transmitting pin of the MCU chip outputs a high-level signal, the low-voltage side receiving pin (11 pin) of the isolation chip U1 receives the low-level signal, and then the isolation chip U1 outputs to the source of the second MOS tube Q2 through the high-voltage side output pin (6 pin) of the isolation chip U1. Vgs of the second MOS tube Q2 is less than Vth, which does not meet the conduction condition. The second MOS tube Q2 is cut off, and the 5V power supply provided by the AFE chip pulls up the receiving pin of the AFE chip to a high level through the fifth resistor R5, and the signal transmission is completed.

[0070] When the first power supply VCC is powered off, the 3.3V power supply is disconnected, and the low-voltage power supply end of the isolation chip U1 has no power supply, the MCU chip does not work, the optocoupler P1 is disconnected, the optocoupler P1 outputs a high-level cutoff signal to the first MOS tube, the first MOS tube Q1 is turned off, the first node a point is disconnected with the second node b point, and the AFE chip no longer supplies power to the high-voltage side of the isolation chip U1, thereby avoiding continuous power consumption of the battery and reducing static power consumption.

[0071] At the same time, the second node b point is powered off, and the second MOS tube Q2 is turned off, thereby avoiding the low level output by the high-voltage side output pin of the isolation chip U1 from acting on the receiving pin of the AFE chip, and further avoiding the reset of the AFE chip.

[0072] In addition, the sending pin of the AFE chip is at a high level by default when no data communication is performed, and the diode D1 is used to block the high level of the sending pin of the AFE chip from being transmitted to the isolation chip U1, thereby further reducing static power consumption.

[0073] In summary, when the first power supply is powered off, the analog front-end detection circuit enters sleep, the first switch circuit disconnects the electrical connection between the first node and the second node, the analog front-end detection circuit no longer supplies power to the high-voltage side of the first isolation circuit, thereby reducing the power consumption of the analog front-end detection circuit, further reducing the static power consumption of the entire battery management system, and preventing over-discharge of the battery.

[0074] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes of different aspects of the present application as described above, which are not provided in detail for the sake of simplicity; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A power control circuit, characterized by comprising: The application is applied to a battery management system, the battery management system comprises an analog front-end detection circuit, a first isolation circuit and a controller, wherein the analog front-end detection circuit is connected with the controller through the first isolation circuit, and the power supply control circuit comprises a first switch circuit and a second isolation circuit. The power output end of the first switch circuit and the analog front-end detection circuit is connected with a first node, the first switch circuit, the high-voltage power supply end of the first isolation circuit and the high-voltage enable end of the first isolation circuit are commonly connected with a second node, the control end of the first switch circuit and the first end of the second isolation circuit are electrically connected, the second end of the second isolation circuit is grounded, the third end of the second isolation circuit is electrically connected with a first power supply, the fourth end of the second isolation circuit is electrically connected with the controller, and the first power supply is also electrically connected with the low-voltage power supply end of the first isolation circuit, the low-voltage enable end of the first isolation circuit and the power supply end of the controller. The controller is used for outputting a control signal when the first power supply is powered on, so that the second isolation circuit outputs a conduction signal to the first switch circuit, and the first switch circuit is used for turning on the electrical connection between the first node and the second node in response to the input of the conduction signal. The second isolation circuit is also used for outputting a cut-off signal to the first switch circuit when the first power supply is powered off, and the first switch circuit is also used for turning off the electrical connection between the first node and the second node in response to the input of the cut-off signal.

2. The power control circuit of claim 1, wherein, The first switch circuit comprises a first MOS tube and a first resistor. The source of the first MOS tube is connected with the first node and one end of the first resistor, the gate of the first MOS tube is electrically connected with the other end of the first resistor and the first end of the second isolation circuit, and the drain of the first MOS tube is electrically connected with the second node.

3. The power control circuit of claim 1, wherein, The second isolation circuit comprises an optical coupler, a second resistor and a third resistor. The collector of the triode of the optical coupler is electrically connected with the control end of the first switch circuit, the emitter of the triode of the optical coupler is grounded, the anode of the diode of the optical coupler is connected with the first power supply and one end of the second resistor, the cathode of the diode of the optical coupler is connected with the other end of the second resistor and one end of the third resistor, and the other end of the third resistor is electrically connected with the controller.

4. The power control circuit of claim 1, wherein, The power supply control circuit further comprises a second switch circuit and a first pull-up circuit. The control end of the second switch circuit is electrically connected with the second node, the first end of the second switch circuit is electrically connected with the first end of the first pull-up circuit and the receiving end of the analog front-end detection circuit, the second end of the second switch circuit is electrically connected with the output end of the first isolation circuit, and the second end of the first pull-up circuit is electrically connected with the first node. The second switch circuit is used for turning on the electrical connection between the receiving end of the analog front-end detection circuit and the output end of the first isolation circuit in response to the power-on of the second node. The second switch circuit is also configured to disconnect the electrical connection between the receiving end of the analog front-end detection circuit and the output end of the first isolation circuit in response to the second node being powered off, so that the first pull-up circuit pulls up the potential of the receiving end of the analog front-end detection circuit to the potential of the first node.

5. The power control circuit of claim 4, wherein, The second switch circuit comprises a second MOS transistor and a fourth resistor. The gate of the second MOS transistor and one end of the fourth resistor are electrically connected to the second node, the source of the second MOS transistor and the other end of the fourth resistor are electrically connected to the output end of the first isolation circuit, and the drain of the second MOS transistor is electrically connected to the first end of the first pull-up circuit and the receiving end of the analog front-end detection circuit, respectively.

6. The power control circuit of claim 4, wherein, The first pull-up circuit comprises a fifth resistor, one end of the fifth resistor is electrically connected to the first node, and the other end of the fifth resistor is electrically connected to the first end of the second switch circuit and the receiving end of the analog front-end detection circuit, respectively.

7. The power control circuit of claim 4, wherein, The power supply control circuit further comprises a unidirectional conduction circuit and a second pull-up circuit. One end of the unidirectional conduction circuit is electrically connected to the sending end of the analog front-end detection circuit, the other end of the unidirectional conduction circuit is electrically connected to the receiving end of the first isolation circuit and one end of the second pull-up circuit, respectively, and the other end of the second pull-up circuit is electrically connected to the second node. The unidirectional conduction circuit is configured to send a low-level signal to the receiving end of the first isolation circuit in response to the sending end of the analog front-end detection circuit sending a low-level signal, and is in a cut-off state in response to the sending end of the analog front-end detection circuit sending a high-level signal, so that the second pull-up circuit pulls up the potential of the receiving end of the first isolation circuit to the potential of the second node.

8. The power control circuit of claim 7, wherein, The unidirectional conduction circuit comprises a diode and a sixth resistor. One end of the sixth resistor is electrically connected to the sending end of the analog front-end detection circuit, the other end of the sixth resistor is connected to the cathode of the diode, and the anode of the diode is electrically connected to the receiving end of the first isolation circuit and one end of the second pull-up circuit, respectively.

9. The power control circuit of claim 7, wherein, The second pull-up circuit comprises a seventh resistor, one end of the seventh resistor is electrically connected to the input end of the first isolation circuit and the unidirectional conduction circuit, respectively, and the other end of the seventh resistor is electrically connected to the second node.