Control signal delay power-off circuit
The control signal delayed power-on circuit constructed using passive components solves the problems of complex traditional circuit structure and poor environmental adaptability, and achieves circuit simplification and improved expandability.
Patent Information
- Application Number
- CN202423098329.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2026-01-13
- Estimated Expiration
- 2034-12-16
AI Technical Summary
Traditional digital control signals have a complex circuit structure with delayed power-on, poor replication and expansion capabilities, and active integrated devices are easily affected by ambient temperature and operating conditions.
The passive device circuit, consisting of a unidirectional limiting unit, an energy storage unit, a cooperative discharge unit, and a voltage control unit, achieves signal delay by controlling the charging and discharging time of the energy storage unit, requiring only a first control signal and a power signal.
It simplifies the circuit structure, reduces the need for active integrated devices, improves the circuit's ability to be replicated and expanded, and adapts to a wider range of ambient temperatures and operating conditions.
Smart Images
Figure CN223798213U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic circuit technology, and in particular to a control signal delayed power-off circuit. Background Technology
[0002] With the development of electronic circuit technology, digital control signal delayed power-off circuits have emerged. Traditional digital control signal delayed power-off circuits are usually composed of active integrated circuits such as timers, frequency dividers, and flip-flops.
[0003] In traditional digital control signal delayed power-down circuits, a timer generates a timing base pulse, which is divided by an internal frequency divider to output a timing base signal. This signal is then further divided by an external frequency divider to obtain the required timing control trigger signal. The output is typically a converter or other integrated circuit. Due to the complexity of traditional digital control signal delayed power-down circuits, they have poor replication and expansion capabilities, and the active integrated devices have a fixed temperature operating range, making them susceptible to environmental temperature and operating conditions. Utility Model Content
[0004] Therefore, it is necessary to provide a control signal delay power-down circuit with a simple structure and reduced active integrated devices to address the above-mentioned technical problems.
[0005] A control signal delayed power-off circuit includes a unidirectional limiting unit, an energy storage unit, a cooperative discharge unit, and a voltage control unit; wherein,
[0006] The forward conduction terminal of the unidirectional limiting unit is configured to receive a first control signal, and the reverse cut-off terminal of the unidirectional limiting unit is connected to the first terminal of the energy storage unit.
[0007] The second end of the energy storage unit is connected to the first end of the cooperative discharge unit;
[0008] The second terminal of the cooperative discharge unit is configured to receive a power signal, and the third terminal of the cooperative discharge unit is connected to the input terminal of the voltage control unit.
[0009] The output of the voltage control unit is configured to output a second control signal; wherein,
[0010] When the first control signal is received, the energy storage unit charges, causing the cooperative discharge unit to conduct and control the voltage control unit to turn on, and the voltage control unit outputs the second control signal; when the first control signal is disconnected, after the energy storage unit discharges for a preset delay time, the cooperative discharge unit is de-conducted and the voltage control unit is turned off, and the second control signal output by the voltage control unit is powered off.
[0011] In some embodiments, the unidirectional limiting unit includes a diode, the anode of which is configured to receive a first control signal, and the cathode of which is connected to a first terminal of the energy storage unit.
[0012] In some embodiments, the energy storage unit includes a capacitor unit and a first resistor; wherein,
[0013] The first terminal of the capacitor unit is connected to the reverse cutoff terminal of the unidirectional limiting unit and the first terminal of the first resistor; the second terminal of the capacitor unit is grounded; and
[0014] The second end of the first resistor is connected to the first end of the cooperative discharge unit.
[0015] In some embodiments, the cooperative discharge unit includes a transistor, a second resistor, and a third resistor; wherein...
[0016] The base B of the transistor is connected to the second terminal of the energy storage unit, the collector C of the transistor is connected to the first terminal of the second resistor, and the emitter E of the transistor is connected to the first terminal of the third resistor and the input terminal of the voltage control unit.
[0017] The second end of the second resistor is configured to receive a power signal, and the second end of the third resistor is connected to the ground of the energy storage unit.
[0018] In some embodiments, the voltage control unit includes a field-effect transistor, a fourth resistor, a fifth resistor, and a sixth resistor; wherein,
[0019] The gate G of the field-effect transistor is connected to the first terminal of the fourth resistor, the drain D of the field-effect transistor is connected to the first terminal of the fifth resistor, and the source S of the field-effect transistor is connected to the first terminal of the sixth resistor and configured to output a second control signal.
[0020] The second end of the fourth resistor is connected to the first end of the third resistor and the emitter E of the transistor; the second end of the fifth resistor is connected to the second end of the second resistor; and the sixth resistor is grounded.
[0021] In some embodiments, the resistance values of the second, third, fifth, and sixth resistors are adjustable so that the voltage at the first terminal of the third resistor satisfies the turn-on voltage of the field-effect transistor.
[0022] In some embodiments, the capacitor unit includes one or more capacitors.
[0023] In some embodiments, the length of the delay time is controlled by adjusting the capacitance value of the capacitor cell and / or the resistance value of the first resistor.
[0024] In some embodiments, the voltage value of the second control signal is controlled by adjusting the resistance value of the sixth resistor.
[0025] In some embodiments, the circuit further includes a back-end working circuit, which is connected to a second control signal, the voltage value of which is equal to the working threshold voltage of the working circuit.
[0026] The aforementioned control signal delayed power-down circuit only needs to provide a first control signal and a power signal for the cooperative discharge unit. The functions of each unit that makes up the control signal delayed power-down circuit can be built using passive devices. Therefore, the circuit structure is simplified, the number of demanding active integrated devices is reduced, and the circuit can be repeated on a small-scale single printed circuit board. Furthermore, different delay time requirements can be achieved by combining energy storage units with different RC combinations, thereby improving the replication and expansion capabilities and meeting a wider range of ambient temperature and operating conditions. Attached Figure Description
[0027] Figure 1 This is a schematic diagram of the control signal delayed power-down circuit in some embodiments;
[0028] Figure 2 This is a schematic diagram of the control signal delay power-down circuit in some other embodiments;
[0029] Figure 3 This is a schematic diagram illustrating the delay relationship between the first control signal and the second control signal in some embodiments. Detailed Implementation
[0030] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0031] In some embodiments, reference Figure 1 As shown, Figure 1 The diagram illustrates the structure of a control signal delayed power-off circuit in some embodiments. One embodiment of this application's control signal delayed power-off circuit includes a unidirectional limiting unit 100, an energy storage unit 200, a cooperative discharge unit 300, and a voltage control unit 400; wherein,
[0032] The forward conduction terminal of the one-way limiting unit 100 is configured to receive a first control signal, and the reverse cut-off terminal of the one-way limiting unit 100 is connected to the first terminal of the energy storage unit 200.
[0033] The second end of the energy storage unit 200 is connected to the first end of the cooperative discharge unit 300;
[0034] The second terminal of the cooperative discharge unit 300 is configured to receive a power signal, and the third terminal of the cooperative discharge unit 300 is connected to the input terminal of the voltage control unit 400.
[0035] The output of the voltage control unit 400 is configured to output a second control signal; wherein,
[0036] When the first control signal is received, the energy storage unit 200 is charged, which causes the cooperative discharge unit 300 to be turned on and controls the voltage control unit 400 to be turned on. The voltage control unit 400 outputs the second control signal. When the first control signal is turned off, after the energy storage unit 200 discharges for a preset delay time, the cooperative discharge unit 300 is turned off and controls the voltage control unit 400 to be turned off. The second control signal output by the voltage control unit 400 is powered off.
[0037] More specifically, when the first control signal is received, the first control signal is restricted by the unidirectional limiting unit 100, preventing current backflow and charging the energy storage unit 200. After the energy storage unit 200 is charged and stored, the current passes through the cooperative discharge unit 300 and forms a cooperative discharge path with the reference ground plane. At this time, the cooperative discharge unit 300 is turned on. After the cooperative discharge unit 300 is turned on, it can provide the voltage control unit 400 with an opening voltage that meets the opening conditions, thereby enabling the voltage control unit 400 to turn on and output the second control signal. When the input first control signal is present normally and the opening voltage provided to the voltage control unit 400 is greater than the first control signal, the second control signal is generated. When the required threshold voltage is reached, the voltage control unit 400 continuously outputs the second control signal. When the input first control signal is disconnected, the energy storage unit 200 continuously discharges in coordination with the cooperative discharge unit 300. After a preset discharge time, which is a preset delayed power-down time, the energy storage unit 200 can be adjusted to achieve the desired power-up time. This prevents the voltage control unit 400 from receiving the required power-up voltage. In other words, when the provided power-up voltage fails to reach the threshold voltage required by the voltage control unit 400, the voltage control unit 400 shuts down and stops outputting the effective second control signal. The delayed power-down function of the second control signal is then completed.
[0038] The aforementioned control signal delay power-down circuit only needs to provide a first control signal and a power signal to the cooperative discharge unit 300. The functions of each unit constituting the control signal delay power-down circuit can be built using passive devices. Therefore, the circuit structure is simplified, the number of demanding active integrated devices is reduced, and the circuit can be repeated on a small-scale single printed circuit board. Furthermore, different delay time requirements can be achieved by combining energy storage units with different resistor-capacitor combinations, thereby improving the replication and expansion capabilities and meeting a wider range of ambient temperature and operating conditions.
[0039] In some embodiments, reference Figure 2 As shown, Figure 2 The diagram shows a schematic of the control signal delay power-down circuit in some other embodiments.
[0040] The unidirectional limiting unit 100 may include a diode, the anode of which is configured to receive a first control signal, and the cathode of which is connected to a first terminal of the energy storage unit 200. In this embodiment, a diode can be used for unidirectional current limiting because it has unidirectional conductivity and a simpler structure. In other embodiments, other components or circuits with unidirectional conductivity can also be used.
[0041] In some embodiments, the energy storage unit 200 may include a capacitor unit 2001 and a first resistor R1; wherein, the first end of the capacitor unit 2001 is connected to the reverse cutoff end of the unidirectional limiting unit 100 and the first end of the first resistor R1, and the second end of the capacitor unit 2001 is grounded to GND; and the second end of the first resistor R1 is connected to the first end of the cooperative discharge unit 300.
[0042] For example, capacitor unit 2001 may include one or more capacitors. In the case of multiple capacitors, the individual capacitors may be spaced apart, for example, by means of... Figure 2 The parallel connection method shown can be adjusted according to actual needs, including the selection of the number and type of capacitors and the connection method.
[0043] In this embodiment, the preset delay time can be determined through the above design of capacitors and resistors. For example, the discharge time of capacitor unit 2001 and first resistor R1 in energy storage unit 200 can be calculated by the following formula: discharge time = RC, where R represents the resistance value of first resistor R1 and C represents the capacitance value of capacitor unit 2001.
[0044] In practical applications, the value of R can be changed by adjusting the number, connection method, or resistance value of the first resistor R1, and the value of C can be changed by adjusting the number, connection method, or capacitance value of the capacitors in the capacitor unit 2001, thereby adjusting the discharge time. Since the discharge time of the energy storage unit 200 corresponds to the signal delay time, the signal delay time that meets the preset requirements can be obtained simply and flexibly by adjusting the discharge time of the energy storage unit 200.
[0045] In some embodiments, the cooperative discharge unit 300 includes a transistor Q3, a second resistor R2, and a third resistor R3; wherein the base B of the transistor Q3 is connected to the second terminal of the energy storage unit 200, the collector C of the transistor Q3 is connected to the first terminal of the second resistor R2, and the emitter E of the transistor Q3 is connected to the first terminal of the third resistor R3 and the input terminal of the voltage control unit 400; the second terminal of the second resistor R2 is configured to receive a power signal, and the second terminal of the third resistor R3 is grounded to GND.
[0046] In some embodiments, the voltage control unit 400 includes a field-effect transistor D5, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6; wherein the gate G of the field-effect transistor D5 is connected to the first terminal of the fourth resistor R4, the drain D of the field-effect transistor is connected to the first terminal of the fifth resistor R5, the source S of the field-effect transistor D5 is connected to the first terminal of the sixth resistor R6 and is configured to output a second control signal; the second terminal of the fourth resistor R4 is connected to the first terminal of the third resistor R3, the second terminal of the fifth resistor R5 is connected to the second terminal of the second resistor R2, and the second terminal of the sixth resistor R6 is grounded to GND.
[0047] Field-effect transistors (FETs) come in various types, primarily including two categories: junction field-effect transistors (JFETs) and metal-oxide-semiconductor field-effect transistors (MOSFETs). In this embodiment, a metal-oxide-semiconductor field-effect transistor, abbreviated as MOS transistor, can be used. In other embodiments, other types of FETs can be selected as needed, such as… Figure 2 The example shown illustrates the connection relationship between components using N-MOS as an example. In practical applications, the connection relationship can be adjusted appropriately depending on the type of field-effect transistor selected.
[0048] In this embodiment, reference continues to be made to Figure 2 As shown, in practical applications:
[0049] The first control signal in the diagram is the signal that needs to be delayed. The first control signal is unidirectionally limited by diode D10. C1 to C4 are energy storage capacitors. When the control circuit of the first control signal is working normally, i.e., when the first control signal is normally connected, the first control signal current charges capacitors C1 to C4 in the energy storage unit 200. Simultaneously, current flows through the BE junction of transistor Q3 to conduct the CE junction of transistor Q3. After transistor Q3 enters the conducting state, the power supply signal provides power to the output second control signal. This power supply signal forms a current path through the second resistor R2, transistor Q3, and the third resistor R3. The turn-on voltage V is obtained by voltage division across the third resistor R3. G The turn-on voltage V G The threshold voltage of the gate G of the field-effect transistor D5 can be achieved through resistor design. Therefore, the field-effect transistor D5 is turned on, and the power supply signal, the fifth resistor R5, the field-effect transistor D5 and the sixth resistor R6 form a current path. The ideal voltage of the second control signal required can be obtained by designing the voltage divider of the sixth resistor R6, thereby obtaining the delayed second control signal that can be used directly by the subsequent working circuit or used in conjunction with other circuits.
[0050] In some embodiments, the resistance values of the second resistor R2, the third resistor R3, the fifth resistor R5, and the sixth resistor R6 are adjustable so that the voltage at the first terminal of the third resistor R3 satisfies the turn-on voltage of the field-effect transistor D5.
[0051] In this embodiment, by adjusting the resistance values of the second resistor R2, the third resistor R3, the fifth resistor R5, and the sixth resistor R6, the voltage at the first terminal of the third resistor R3 reaches the turn-on voltage V of the field-effect transistor D5 after the transistor Q3 of the cooperative discharge unit 300 is turned on. G Because, the turn-on voltage V G It is based on the V of the field-effect transistor D5. GS Yes, the values of the fifth resistor R5 and the sixth resistor R6 will affect the V of the field-effect transistor D5. S Therefore, by comprehensively considering and adjusting the resistance values of the second resistor R2, the third resistor R3, the fifth resistor R5, and the sixth resistor R6, the turn-on voltage V can be increased. G Accuracy of settings.
[0052] In some embodiments, the voltage value of the second control signal is controlled by adjusting the resistance value of the sixth resistor R6. In this embodiment, the voltage value of the second control signal output from the first terminal of the sixth resistor R6 can be accurately controlled by adjusting the resistance value of the sixth resistor R6 according to the different voltage requirements of the subsequent connected working circuit, thereby flexibly meeting different application scenarios.
[0053] Below, for reference Figure 3 As shown, Figure 3 The diagram shows the delay relationship between the first control signal and the second control signal in some embodiments.
[0054] from Figure 3 As can be seen, after the first control signal is disconnected, the energy storage unit 200 discharges through the cooperative discharge unit 300, and the voltage continuously decreases. The actual current also decreases as the energy weakens. After the first control signal has been disconnected for a period of time, the second control signal begins to decrease. Since the second control signal is a voltage signal, the back-end operating circuit can be a digital circuit, such as a digital circuit with an operating threshold voltage. When the second control signal is lower than the operating threshold voltage of the back-end operating circuit, the second control signal fails.
[0055] In practical applications, the voltage value of the second control signal can be designed to be equal to the working threshold voltage of the working circuit. Therefore, when the second control signal just begins to drop (power off), it cannot reach the working threshold voltage of the back-end working circuit, and the second control signal fails. In this way, the delay time can be calculated more accurately. That is, the time interval between the failure of the two signals can be used as the signal delay time.
[0056] Furthermore, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the characters in this article generally indicate that the preceding and following related objects have an "or" relationship.
[0057] The above embodiments merely illustrate several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A circuit for controlling signal delay power down, the circuit comprising a unidirectional limiting unit, an energy storage unit, a cooperative discharge unit and a voltage control unit; wherein, a forward conducting end of the unidirectional limiting unit is configured to access a first control signal, a reverse blocking end of the unidirectional limiting unit is connected to a first end of the energy storage unit; a second end of the energy storage unit is connected to a first end of the cooperative discharge unit; a second end of the cooperative discharge unit is configured to access a power supply signal, a third end of the cooperative discharge unit is connected to an input end of the voltage control unit; an output end of the voltage control unit is configured to output a second control signal; wherein, when the first control signal is accessed, the energy storage unit is charged, so that the cooperative discharge unit is turned on to control the voltage control unit to turn on, and the voltage control unit outputs the second control signal; when the first control signal is disconnected, the energy storage unit is discharged after a preset delay time, so that the cooperative discharge unit is not turned on to control the voltage control unit to turn off, and the second control signal output by the voltage control unit is powered down.
2. The circuit of claim 1, wherein, The unidirectional limiting unit comprises a diode, a positive electrode of the diode is configured to access the first control signal, and a negative electrode of the diode is connected to the first end of the energy storage unit.
3. The circuit of claim 1, wherein, The energy storage unit comprises a capacitor unit and a first resistor; wherein, a first end of the capacitor unit is connected to the reverse blocking end of the unidirectional limiting unit and a first end of the first resistor, and a second end of the capacitor unit is grounded; a second end of the first resistor is connected to the first end of the cooperative discharge unit.
4. The circuit of claim 1, wherein, The cooperative discharge unit comprises a triode, a second resistor and a third resistor; wherein, a base B of the triode is connected to the second end of the energy storage unit, a collector C of the triode is connected to a first end of the second resistor, an emitter E of the triode is connected to a first end of the third resistor and the input end of the voltage control unit; a second end of the second resistor is configured to access the power supply signal, and a second end of the third resistor is connected to the ground of the energy storage unit.
5. The circuit of claim 4, wherein, The voltage control unit comprises a field effect transistor, a fourth resistor, a fifth resistor and a sixth resistor; wherein, a gate G of the field effect transistor is connected to a first end of the fourth resistor, a drain D of the field effect transistor is connected to a first end of the fifth resistor, and a source S of the field effect transistor is connected to a first end of the sixth resistor and configured to output the second control signal; a second end of the fourth resistor is connected to the first end of the third resistor and the emitter E of the triode, a second end of the fifth resistor is connected to the second end of the second resistor, and the sixth resistor is grounded.
6. The circuit of claim 5, wherein, The resistance values of the second resistor, the third resistor, the fifth resistor and the sixth resistor can be adjusted so that the voltage at the first end of the third resistor meets the turn-on voltage of the field effect transistor.
7. The circuit of claim 3, wherein, The capacitor unit comprises one or more capacitors.
8. The circuit of claim 3, wherein, The capacitance value of the capacitor unit and / or the resistance value of the first resistor are adjusted to control the length of the delay time.
9. The circuit of claim 5, wherein, The voltage value of the second control signal is controlled by adjusting the resistance value of the sixth resistor.
10. The circuit of claim 1, wherein, The circuit further comprises a back-end working circuit connected to the second control signal, and the voltage value of the second control signal is equal to the working threshold voltage of the working circuit.