Low-power-consumption intelligent lock driving circuit

Abstract

The utility model relates to the technical field of low-power-consumption circuits, in particular to a low-power-consumption intelligent lock drive circuit which comprises a power supply circuit and an MCU control circuit which are electrically connected, the MCU control circuit is connected with an upper computer through a communication circuit, and the MCU control circuit is in communication connection with a motor drive circuit and a Hall induction circuit set. The Hall sensing circuit group comprises a first stroke sensing Hall unit, a second stroke sensing Hall unit, a first rotating speed sensing Hall unit and a second rotating speed sensing Hall unit, a voltage reduction ICU1 is arranged on the power supply circuit, and a 3.3 V output end is electrically connected with the Hall sensing circuit group and the communication circuit. According to the utility model, the circuit structure is simple, the use is safe, the current flowing through the driving motor circuit is effectively adjusted, the output current is enabled to more accord with the operation of each part, the purpose of reducing power consumption is achieved, the setting of Hall dual backup is added, and the reliability is further improved.

Description

Technical Field

[0001] This utility model relates to a driving circuit, and more particularly to a low-power smart lock driving circuit, belonging to the field of low-power circuit technology. Background Technology

[0002] With the rapid development of the sharing economy, the demand for new smart locks for shared bicycles and shared electric bikes is increasing. Smart locks have the characteristics of strong braking force, fast response speed, low heat attenuation, and light weight. They are currently the fastest-growing new generation of smart electronic lock devices and are widely used in mountain bikes, electric bikes, and shared bicycles.

[0003] However, the status detection of the lock opening and closing in existing smart locks is relatively complex and consumes a lot of power, making it difficult to use for a long time.

[0004] Therefore, it is urgent to improve the low-power smart lock drive circuit to solve the above-mentioned problems. Utility Model Content

[0005] The purpose of this invention is to provide a low-power intelligent lock drive circuit. The circuit structure is simple, safe to use, and effectively regulates the current flowing through the drive motor circuit, making the output current more consistent with the operation of each component, thereby reducing power consumption. In addition, the addition of Hall effect dual backup further improves reliability.

[0006] To achieve the above objectives, the main technical solutions adopted by this utility model include:

[0007] A low-power smart lock drive circuit includes an electrically connected power supply circuit and an MCU control circuit. The MCU control circuit is connected to a host computer via a communication circuit. A motor drive circuit and a Hall effect sensor circuit group are also connected to the MCU control circuit via communication.

[0008] The Hall sensor circuit group includes a first stroke sensing Hall unit, a second stroke sensing Hall unit, a first speed sensing Hall unit, and a second speed sensing Hall unit. The first stroke sensing Hall unit is provided with a stroke sensing Hall chip U3, the second stroke sensing Hall unit is provided with a stroke sensing Hall chip U4, the first speed sensing Hall unit is provided with a speed sensing Hall chip U6, and the second speed sensing Hall unit is provided with a speed sensing Hall chip U7.

[0009] The power supply circuit is equipped with a step-down ICU1, and filter capacitors C2, C3, C4 and C5 are connected to the step-down ICU1. An inductor L1 is electrically connected between the filter capacitors C2 and C3, and the output terminal of the power supply circuit is connected to a 3.3V output terminal. The 3.3V output terminal is electrically connected to the Hall sensor circuit group and the communication circuit.

[0010] Preferably, the MCU control circuit is equipped with a chip U5, and the power supply circuit is electrically connected to the pins SWDIO and SWCLK of the chip U5 through chip programming.

[0011] Preferably, the travel sensing Hall chip U3 is provided with a capacitor C9, a resistor R2 and a capacitor C12, and the resistor R2 and the capacitor C12 are electrically connected to the pin PA7 of the chip U5.

[0012] Preferably, the travel sensing Hall chip U4 is provided with a capacitor C10, a resistor R3 and a capacitor C13, and the resistor R3 and the capacitor C13 are electrically connected to the pin PA6 of the chip U5.

[0013] Preferably, the speed sensing Hall chip U6 is provided with a capacitor C17, a resistor R5 and a capacitor C19, and the resistor R5 and the capacitor C19 are electrically connected to the pin PA4 of the chip U5.

[0014] Preferably, the speed sensing Hall chip U7 is provided with a capacitor C18, a resistor R6 and a capacitor C20, and the resistor R6 and the capacitor C20 are electrically connected to the PA3 pin of the chip U5.

[0015] Preferably, the motor drive circuit is provided with a drive chip U2, and the drive chip U2 has a port J1 electrically connected to its pins 1 and 6. The drive chip U2 has a pin INA electrically connected to the chip U5's pin PA10, and the drive chip U2 has a pin IN electrically connected to the chip U5's pin PA9.

[0016] Preferably, the communication circuit is provided with a chip U8, pin 1 of the chip U8 is electrically connected to pin PA0 of the chip U5, pins 2 and 3 of the chip U8 are electrically connected to pin PA1 of the chip U5, and pin 4 of the chip U8 is electrically connected to pin PA2 of the chip U5.

[0017] The pins 7 and 6 of the chip U8 are grounded via an electrostatic discharge diode D2.

[0018] This utility model has at least the following beneficial effects:

[0019] 1. The circuit structure is simple and safe to use. It effectively regulates the current flowing through the drive motor circuit, making the output current more consistent with the operation of each component, thereby reducing power consumption. In addition, the addition of Hall effect dual backup further improves reliability.

[0020] 2. The Hall sensor circuit group includes travel sensing Hall sensors U3 and U4 and speed sensing Hall sensors U6 and U7. The speed sensing Hall sensors are dual-backup. As long as one Hall sensor is detected, the MCU control circuit will work to avoid failure caused by the failure of a single device. The motor drive circuit has overcurrent protection, undervoltage protection and overheat protection functions. When the motor stalls, it will cut off the output to reduce power consumption.

[0021] 3. In the working mode, the software design works in conjunction with the normal operation of the CPU and other on-chip resources to reduce the system clock frequency and disable the clocks of unused bus peripherals to further reduce operating power consumption. When the system determines that it does not need to continue to maintain the working state, it enters deep sleep mode, disables the system main clock and other peripherals, and retains only the wake-up interface to achieve the goal of minimum power consumption. Attached Figure Description

[0022] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0023] Figure 1 This is the circuit schematic diagram of this utility model;

[0024] Figure 2 This is a circuit diagram of the MCU control circuit of this utility model;

[0025] Figure 3 This is a circuit diagram of the Hall effect sensing circuit group of this utility model;

[0026] Figure 4 This is the communication circuit diagram of this utility model;

[0027] Figure 5 This is the power supply circuit diagram for this utility model;

[0028] Figure 6 This is the motor drive circuit diagram of this utility model.

[0029] In the diagram, 1 is the power supply circuit; 2 is the MCU control circuit; 3 is the motor drive circuit; 4 is the Hall sensor circuit group; 401 is the first stroke sensing Hall unit; 402 is the second stroke sensing Hall unit; 403 is the first speed sensing Hall unit; 404 is the second speed sensing Hall unit; and 5 is the communication circuit. Detailed Implementation

[0030] The following will describe in detail the implementation of this application with reference to the accompanying drawings and embodiments, so that the implementation process of how this application uses technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.

[0031] like Figures 1-6 As shown, the low-power smart lock drive circuit provided in this embodiment includes a power supply circuit 1 and an MCU control circuit 2 electrically connected. The MCU control circuit 2 is connected to a host computer via a communication circuit 5. The MCU control circuit 2 is also connected to a motor drive circuit 3 and a Hall sensor circuit group 4. The MCU control circuit 2 is equipped with a chip U5. The power supply circuit 1 is electrically connected to the pins SWDIO and SWCLK of the chip U5 through chip programming. The MCU control circuit 2 receives information from the host computer or uploads status information to the host computer through the communication circuit 5. It controls the motor drive circuit 3 through the interface to adjust the motor stroke. The MCU control circuit 2 is connected to the Hall sensor circuit group 4 to monitor the motor stroke status through Hall sensors. The MCU control circuit 2 has a standby mode and a sleep mode. Based on the characteristics of the MCU and the application conditions, the power consumption is further reduced through the following methods.

[0032] When the PU is running, reduce the system clock.

[0033] While the CPU is running, disable the unused peripheral clocks on the AHB and APB buses;

[0034] When the CPU is not running, the MCU enters a deep sleep mode.

[0035] The circuit structure is simple, safe to use, and effectively regulates the current flowing through the drive motor circuit, making the output current more consistent with the operation of each component. In addition, the addition of Hall effect dual backup further improves reliability.

[0036] The Hall effect sensor circuit group 4 includes a first stroke sensing Hall unit 401, a second stroke sensing Hall unit 402, a first speed sensing Hall unit 403, and a second speed sensing Hall unit 404. The first stroke sensing Hall unit 401 has a stroke sensing Hall chip U3, which includes a capacitor C9, a resistor R2, and a capacitor C12. Resistor R2 and capacitor C12 are electrically connected to pin PA7 of chip U5. The second stroke sensing Hall unit 402 has a stroke sensing Hall chip U4, which includes a capacitor C10, a resistor R3, and a capacitor C13. Resistor R3 and capacitor C13 are electrically connected to pin PA6 of chip U5. The first speed sensing Hall unit 403 has a speed sensing Hall chip U6. The Hall chip U6 is equipped with capacitor C17, resistor R5, and capacitor C19. Resistor R5 and capacitor C19 are electrically connected to pin PA4 of chip U5. The second speed sensing Hall unit 404 is equipped with speed sensing Hall chip U7. Speed ​​sensing Hall chip U7 is equipped with capacitor C18, resistor R6, and capacitor C20. Resistor R6 and capacitor C20 are electrically connected to pin PA3 of chip U5. Hall sensing circuit group 4 includes travel sensing Hall U3 and U4 and speed sensing Hall U6 and U7. The speed sensing Hall uses dual backup. As long as one Hall state is sensed, the MCU control circuit 2 will work to avoid failure caused by the failure of a single device. The motor drive circuit 3 has overcurrent protection, undervoltage protection, and overheat protection functions. When the motor stalls, it will cut off the output to reduce power consumption.

[0037] The power supply circuit 1 is equipped with a step-down ICU1, which is connected to filter capacitors C2, C3, C4 and C5. The filter capacitors C2 and C3 are electrically connected to an inductor L1. The output terminal of the power supply circuit 1 is connected to a 3.3V output terminal, which is electrically connected to the Hall sensor circuit group 4 and the communication circuit 5. The circuit is simple and has low production cost.

[0038] Furthermore, such as Figure 2 and Figure 6 As shown, a driver chip U2 is provided on the motor drive circuit 3. Port J1 is electrically connected to pins 1 and 6 of the driver chip U2. Pin INA of the driver chip U2 is electrically connected to pin PA10 of the chip U5. Pin IN of the driver chip U2 is electrically connected to pin PA9 of the chip U5. After the motor stroke is shortened, the required motor torque is reduced, which further reduces the peak current, thereby achieving the purpose of reducing power consumption.

[0039] Furthermore, such as Figure 2 and Figure 4As shown, a chip U8 is installed on the communication circuit 5. Pin 1 of chip U8 is electrically connected to pin PA0 of chip U5, pins 2 and 3 of chip U8 are electrically connected to pin PA1 of chip U5, and pin 4 of chip U8 is electrically connected to pin PA2 of chip U5. Pins 7 and 6 of chip U8 are grounded through electrostatic discharge diode D2. In the working mode, the software design works in conjunction with the normal operation of the CPU and other on-chip resources to reduce the system clock frequency and disable the clock of unused bus peripherals to further reduce the operating power consumption. When the system determines that it does not need to continue to maintain the working state, it enters the deep sleep mode, disables the system main clock and other peripherals, and only retains the wake-up interface to achieve the goal of minimum power consumption.

[0040] like Figures 1-6 As shown, the principle of the low-power smart lock drive circuit provided in this embodiment is as follows:

[0041] The MCU control circuit 2 is connected to the host computer via the communication circuit 5. The MCU control circuit 2 also has a communication connection to the motor drive circuit 3 and the Hall effect sensor circuit group 4. The MCU control circuit 2 is equipped with a chip U5. The power supply circuit 1 is electrically connected to the SWDIO and SWCLK pins of the chip U5 through chip programming. The MCU control circuit 2 receives information from the host computer or uploads status information to the host computer via the communication circuit 5. It controls the motor drive circuit 3 through the interface to adjust the motor stroke. The MCU control circuit 2 is connected to the Hall effect sensor circuit group 4 to monitor the motor stroke status via the Hall effect sensors. The MCU control circuit 2 has standby and sleep modes. During operation, the host computer sends control commands to the MCU control circuit 2 via the communication circuit 5. The motor stroke status is accurately monitored by the Hall effect sensors and reported to the MCU. The MCU control circuit 2 controls the motor drive circuit 3 to output or cut off current. When the Hall effect sensor detects a signal, the MCU will not operate the motor drive.

[0042] If certain terms are used in the specification and claims to refer to specific components, those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function. The term "comprising" as used throughout the specification and claims is an open-ended term and should be interpreted as "comprising but not limited to." "Approximately" means that within an acceptable margin of error, those skilled in the art can solve the technical problem and substantially achieve the technical effect within a certain margin of error.

[0043] It should be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a product or system comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a product or system. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the product or system that includes that element.

[0044] The foregoing description illustrates and describes several preferred embodiments of the present invention. However, as previously stated, it should be understood that the present invention is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the inventive concept described herein through the foregoing teachings or techniques or knowledge in related fields. Any modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention should be within the protection scope of the appended claims.

Claims

1. A low-power smart lock drive circuit, comprising an electrically connected power supply circuit (1) and an MCU control circuit (2), characterized in that, The MCU control circuit (2) is connected to a host computer via a communication circuit (5), and the MCU control circuit (2) is connected to a motor drive circuit (3) and a Hall sensor circuit group (4). The Hall sensing circuit group (4) includes a first stroke sensing Hall unit (401), a second stroke sensing Hall unit (402), a first speed sensing Hall unit (403), and a second speed sensing Hall unit (404). The first stroke sensing Hall unit (401) is provided with a stroke sensing Hall chip U3, the second stroke sensing Hall unit (402) is provided with a stroke sensing Hall chip U4, the first speed sensing Hall unit (403) is provided with a speed sensing Hall chip U6, and the second speed sensing Hall unit (404) is provided with a speed sensing Hall chip U7. The power supply circuit (1) is equipped with a step-down ICU1, and filter capacitors C2, C3, C4 and C5 are connected to the step-down ICU1. An inductor L1 is electrically connected between the filter capacitors C2 and C3. The output terminal of the power supply circuit (1) is connected to a 3.3V output terminal, which is electrically connected to the Hall sensor circuit group (4) and the communication circuit (5).

2. The low-power smart lock driving circuit according to claim 1, characterized in that: The MCU control circuit (2) is equipped with a chip U5, and the power supply circuit (1) is electrically connected to the pins SWDIO and SWCLK of the chip U5 through chip programming.

3. The low-power smart lock driving circuit according to claim 1, characterized in that: The travel sensing Hall chip U3 is equipped with a capacitor C9, a resistor R2, and a capacitor C12. The resistor R2 and the capacitor C12 are electrically connected to pin PA7 of the chip U5.

4. The low-power smart lock driving circuit according to claim 1, characterized in that: The travel sensing Hall chip U4 is equipped with a capacitor C10, a resistor R3, and a capacitor C13. The resistor R3 and the capacitor C13 are electrically connected to pin PA6 of the chip U5.

5. The low-power smart lock drive circuit according to claim 1, characterized in that: The speed sensing Hall chip U6 is equipped with a capacitor C17, a resistor R5, and a capacitor C19. The resistor R5 and the capacitor C19 are electrically connected to pin PA4 of the chip U5.

6. The low-power smart lock driving circuit according to claim 1, characterized in that: The speed sensing Hall chip U7 is equipped with a capacitor C18, a resistor R6, and a capacitor C20. The resistor R6 and the capacitor C20 are electrically connected to pin PA3 of the chip U5.

7. The low-power smart lock driving circuit according to claim 1, characterized in that: The motor drive circuit (3) is provided with a drive chip U2. The drive chip U2 has a port J1 electrically connected to pin 1 and pin 6. The drive chip U2 has a pin INA electrically connected to the chip U5's pin PA10. The drive chip U2 has a pin IN electrically connected to the chip U5's pin PA9.

8. The low-power smart lock driving circuit according to claim 1, characterized in that: The communication circuit (5) is provided with a chip U8. Pin 1 of the chip U8 is electrically connected to pin PA0 of the chip U5. Pins 2 and 3 of the chip U8 are electrically connected to pin PA1 of the chip U5. Pin 4 of the chip U8 is electrically connected to pin PA2 of the chip U5. The pins 7 and 6 of the chip U8 are grounded via an electrostatic discharge diode D2.

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