Circuit and chip for inhibiting weak magnetic field pollution, circuit board, parallel chip and parallel circuit board

By using a parallel circuit design, wires with opposite current directions are connected side by side, which solves the problems of high cost and residual magnetic pollution in existing technologies and achieves a low-cost and efficient magnetic field suppression effect.

CN223872654UActive Publication Date: 2026-02-03SHANGHAI YOUGE OPTOELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202423060243.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-11
Publication Date
2026-02-03
Estimated Expiration
2034-12-11

AI Technical Summary

Technical Problem

Existing technologies for demagnetization and magnetic isolation suffer from high costs and residual magnetic pollution in the materials themselves, making it difficult to effectively suppress pollution from extremely weak magnetic fields.

Method used

By designing a parallel circuit, wires with opposite current directions are connected side by side. This utilizes the principle of magnetic field cancellation to reduce the magnetic field generated by the circuit.

Benefits of technology

It effectively reduces magnetic pollution from extremely weak magnetic fields, lowers costs, avoids complex demagnetization processes, and achieves a simple structure with good results.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a circuit for inhibiting weak magnetic field pollution, a chip, a circuit board, a parallel chip and a parallel circuit board. A first positive electrode wire and a second negative electrode wire in the circuit are arranged side by side, and a first negative electrode wire and a second positive electrode wire are arranged side by side; the first positive wire and the second positive wire are connected to an external positive wiring port in parallel, and the first negative wire and the second negative wire are connected to an external negative wiring port in parallel, so that the current directions in the first positive wire and the second negative wire are opposite, and the current directions in the first positive wire and the second negative wire are opposite. Magnetic fields generated by the first positive electrode wire and the second negative electrode wire are mutually counteracted; similarly, the current directions in the first cathode wire and the second anode wire are opposite, and the magnetic fields generated by the first cathode wire and the second anode wire are offset mutually. Therefore, the circuit for suppressing the magnetic field can effectively reduce the magnetic field generated by the circuit, and can effectively reduce the magnetic pollution of an extremely weak magnetic field.
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Description

Technical Field

[0001] This utility model relates to a circuit and chip, circuit board, parallel chip, and parallel circuit board for suppressing weak magnetic field pollution, and particularly to a circuit and chip, circuit board, parallel chip, and parallel circuit board for suppressing extremely weak magnetic field pollution. Background Technology

[0002] With the development of society, economy, and high technology, magnetic field pollution, even extremely weak magnetic field pollution, is not permitted in some key national science and technology projects, national key laboratories, and hospital facilities. Demagnetization and isolation technology for extremely weak magnetic fields is a technical challenge both domestically and internationally.

[0003] Circuits in components such as circuit boards and chips generate weak magnetic fields. Currently, both domestically and internationally, new high-tech magnetic shielding materials are used to shield these weak magnetic fields. While shielding methods have solved the problem of shielding extremely weak magnetic fields, they are costly. Furthermore, although new materials offer good magnetic shielding, they retain residual magnetism after shielding, which still causes contamination. The demagnetization process is very complex and costly. Utility Model Content

[0004] In view of the shortcomings of the prior art described above, the technical problem to be solved by this utility model is to provide a circuit and chip, circuit board, parallel chip, and parallel circuit board for suppressing weak magnetic field pollution, which can effectively reduce magnetic pollution from extremely weak magnetic fields.

[0005] To achieve the above objectives, this utility model provides a circuit for suppressing magnetic fields, comprising one or more sets of parallel circuits. The parallel circuits include a first circuit and a second circuit. The first circuit has a first positive terminal connection and a first negative terminal connection, and the second circuit has a second positive terminal connection and a second negative terminal connection. The first positive terminal connection and the second negative terminal connection are arranged side by side. The first negative terminal connection and the second positive terminal connection are arranged side by side. The first positive terminal connection and the second positive terminal connection are connected in parallel to an external positive terminal, and the first negative terminal connection and the second negative terminal connection are connected in parallel to an external negative terminal.

[0006] This invention provides a circuit for suppressing magnetic fields. Because the first positive terminal and the second negative terminal are arranged side-by-side, and the first negative terminal and the second positive terminal are also arranged side-by-side, and the first positive terminal and the second positive terminal are connected in parallel to an external positive terminal, and the first negative terminal and the second negative terminal are connected in parallel to an external negative terminal, the currents in the first positive terminal and the second negative terminal are in opposite directions. Therefore, the magnetic fields generated by the first positive terminal and the second negative terminal are mutually canceled. Similarly, the currents in the first negative terminal and the second positive terminal are also in opposite directions, and the magnetic fields generated by the first negative terminal and the second positive terminal are also mutually canceled. Therefore, this circuit for suppressing magnetic fields can effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields.

[0007] Preferably, the first positive terminal and the second negative terminal are arranged adjacent to each other and in parallel.

[0008] Preferably, the first positive terminal is connected to the second positive terminal via a positive terminal connecting line, and the first negative terminal is connected to the second negative terminal via a negative terminal connecting line, wherein the positive terminal connecting line and the negative terminal connecting line are arranged in parallel.

[0009] Preferably, the first circuit, the second circuit, the positive terminal connection line, and the negative terminal connection line are all packaged together to form an integral structure.

[0010] This utility model also provides a circuit board, including the magnetic field suppression circuit described in any of the above technical solutions.

[0011] The circuit board of this utility model includes the magnetic field suppression circuit described in any of the above technical solutions, and therefore also has the corresponding beneficial effects of the magnetic field suppression circuit of this utility model, which will not be repeated here.

[0012] This utility model also provides a chip that includes the circuit for suppressing magnetic fields described in any of the above technical solutions.

[0013] One chip of this utility model includes the magnetic field suppression circuit described in any of the above technical solutions, and therefore also has the corresponding beneficial effects of the magnetic field suppression circuit of this utility model, which will not be elaborated here.

[0014] This utility model also provides a parallel circuit board, including a first circuit board and a second circuit board. The first circuit board has a first circuit, and the second circuit board has a second circuit. The first circuit has a first positive terminal connection and a first negative terminal connection, and the second circuit has a second positive terminal connection and a second negative terminal connection. The first positive terminal connection and the second negative terminal connection are arranged side by side. The first negative terminal connection and the second positive terminal connection are arranged side by side. The first positive terminal connection and the second positive terminal connection are connected in parallel to an external positive terminal, and the first negative terminal connection and the second negative terminal connection are connected in parallel to an external negative terminal.

[0015] In this parallel circuit board, the first positive terminal of the first circuit board and the second negative terminal of the second circuit board are arranged side by side; the first negative terminal of the first circuit board and the second positive terminal of the second circuit board are arranged side by side; the first positive terminal and the second positive terminal are connected in parallel to an external positive terminal, and the first negative terminal and the second negative terminal are connected in parallel to an external negative terminal. Thus, the current directions in the first positive terminal and the second negative terminal are opposite, and therefore, the magnetic fields generated by the first positive terminal and the second negative terminal cancel each other out. Similarly, the current directions in the first negative terminal and the second positive terminal are also opposite, and the magnetic fields generated by the first negative terminal and the second positive terminal also cancel each other out. Therefore, this parallel circuit board can effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields.

[0016] This utility model also provides a parallel chip, including a first chip and a second chip. The first chip has a first circuit, and the second chip has a second circuit. The first circuit has a first positive terminal connection and a first negative terminal connection, and the second circuit has a second positive terminal connection and a second negative terminal connection. The first positive terminal connection and the second negative terminal connection are arranged side by side. The first negative terminal connection and the second positive terminal connection are arranged side by side. The first positive terminal connection and the second positive terminal connection are connected in parallel to an external positive terminal, and the first negative terminal connection and the second negative terminal connection are connected in parallel to an external negative terminal.

[0017] Similar to the beneficial effects of the parallel circuit board of the present invention, the parallel chip of the present invention can also effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields.

[0018] Preferably, the first chip and the second chip are packaged together.

[0019] As described above, the present invention relates to a circuit, chip, circuit board, parallel chip, and parallel circuit board for suppressing weak magnetic field pollution, which can effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields. Attached Figure Description

[0020] Figure 1 The diagram shown is a circuit connection diagram of a circuit board according to this utility model.

[0021] Figure 2 The diagram shown is a circuit connection diagram of a parallel circuit board according to this utility model.

[0022] Component designation explanation

[0023] 1 Circuit board

[0024] 11 First positive terminal connection

[0025] 12 First negative terminal connection

[0026] 13 Second positive terminal connection

[0027] 14 Second negative terminal connection

[0028] 15 External positive polarity connection port

[0029] 16 External negative polarity connection port

[0030] 17 Positive terminal connection wire

[0031] 18 Negative terminal connection wire

[0032] 2 Parallel Circuit Boards

[0033] 21 First positive terminal connection

[0034] 22 First negative terminal connection

[0035] 23 Second positive terminal connection

[0036] 24 Second negative terminal connection

[0037] 25 External positive polarity connector

[0038] 26 External negative polarity connection port

[0039] 27 Positive terminal connection wire

[0040] 28 Negative terminal connection wire Detailed Implementation

[0041] The following specific embodiments illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification.

[0042] It should be understood that the structures, proportions, sizes, etc., illustrated in the accompanying drawings of this specification are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation of this utility model. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this utility model, should still fall within the scope of the technical content disclosed in this utility model. Furthermore, the terms such as "upper," "lower," "left," "right," and "middle" used in this specification are merely for clarity of description and are not intended to limit the scope of implementation of this utility model. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of implementation of this utility model.

[0043] Please refer to Figure 1 This utility model provides a circuit for suppressing magnetic fields, including one or more sets of parallel circuits. The parallel circuits include a first circuit and a second circuit. The first circuit has a first positive terminal 11 and a first negative terminal 12, and the second circuit has a second positive terminal 13 and a second negative terminal 14. The first positive terminal 11 and the second negative terminal 14 are arranged side by side. The first negative terminal 12 and the second positive terminal 13 are arranged side by side. The first positive terminal 11 and the second positive terminal 13 are connected in parallel to an external positive terminal 15, and the first negative terminal 12 and the second negative terminal 14 are connected in parallel to an external negative terminal 16.

[0044] This invention provides a circuit for suppressing magnetic fields. Because the first positive terminal 11 and the second negative terminal 14 are arranged side-by-side; the first negative terminal 12 and the second positive terminal 13 are also arranged side-by-side; and the first positive terminal 11 and the second positive terminal 13 are connected in parallel to an external positive terminal 15, and the first negative terminal 12 and the second negative terminal 14 are connected in parallel to an external negative terminal 16, the currents in the first positive terminal 11 and the second negative terminal 14 flow in opposite directions. Therefore, the magnetic fields generated by the first positive terminal 11 and the second negative terminal 14 cancel each other out. Similarly, the currents in the first negative terminal 12 and the second positive terminal 13 also flow in opposite directions, and the magnetic fields generated by the first negative terminal 12 and the second positive terminal 13 also cancel each other out. Therefore, this circuit for suppressing magnetic fields can effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields. Furthermore, in terms of electrical connection, the first positive terminal and the second positive terminal 13 are connected in parallel to the external positive terminal 15, and the first negative terminal 12 and the second negative terminal 14 are connected in parallel to the external negative terminal 16. In this way, the power of the first circuit and the second circuit is half that of the original single circuit, which can also reduce the generation of magnetic field.

[0045] In the magnetic field suppression circuit of this invention, to achieve better magnetic field cancellation, the first positive terminal and the second negative terminal 14 are arranged adjacent to and parallel to each other, and the first negative terminal 12 and the second positive terminal 13 are arranged adjacent to and parallel to each other. Thus, the first positive terminal and the second negative terminal 14 are close together, resulting in a larger magnetic field overlap area, and the magnetic fields generated by them are opposite and can cancel each other out effectively. Similarly, the first negative terminal 12 and the second positive terminal 13 are also close together, resulting in a larger magnetic field overlap area, and the magnetic fields generated by them are opposite and can cancel each other out effectively.

[0046] To minimize the magnetic field generated in the circuit, please refer to... Figure 1 The first positive terminal 11 is connected to the second positive terminal 13 via a positive terminal connecting line 17, and the first negative terminal 12 is connected to the second negative terminal 14 via a negative terminal connecting line 18. The positive terminal connecting line 17 and the negative terminal connecting line 18 are arranged in parallel. In this way, the magnetic fields generated by the positive terminal connecting line 17 and the negative terminal connecting line 18 can be effectively canceled out, resulting in a smaller magnetic field.

[0047] The present invention discloses a circuit for suppressing magnetic fields, which is used to suppress extremely weak magnetic field pollution. It is generally set in small components, such as chips and PCB circuit boards. For ease of manufacturing and use, the first circuit, the second circuit, the positive terminal connection line 17, and the negative terminal connection line 18 are all packaged together to form an integrated structure.

[0048] The magnetic field suppression circuit of this utility model is more suitable for circuits in various small-sized circuit boards. Therefore, this utility model also provides a circuit board 1, which includes the magnetic field suppression circuit described in any of the above technical solutions.

[0049] The magnetic field suppression circuit of this invention is more suitable for circuits in chips. Therefore, this invention also provides a chip that includes the magnetic field suppression circuit described in any of the above technical solutions.

[0050] Please refer to Figure 2 The present invention also provides a parallel circuit board 2, including a first circuit board and a second circuit board. The first circuit board has a first circuit, and the second circuit board has a second circuit. The first circuit has a first positive terminal 21 and a first negative terminal 22, and the second circuit has a second positive terminal 23 and a second negative terminal 24. The first positive terminal 21 and the second negative terminal 24 are arranged side by side. The first negative terminal 22 and the second positive terminal 23 are arranged side by side. The first positive terminal 21 and the second positive terminal 23 are connected in parallel to an external positive terminal 25, and the first negative terminal 22 and the second negative terminal 24 are connected in parallel to an external negative terminal 26.

[0051] In the parallel circuit board 2 of this invention, the currents in the first positive terminal 21 and the second negative terminal 24 flow in opposite directions, thus canceling out the magnetic fields generated by the first positive terminal 21 and the second negative terminal 24. Similarly, the currents in the first negative terminal 22 and the second positive terminal 23 also flow in opposite directions, and the magnetic fields generated by the first negative terminal 22 and the second positive terminal 23 also cancel out each other. Therefore, the parallel circuit board of this invention can effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields.

[0052] This utility model discloses a parallel circuit board, which differs from the previous equipment that used several circuit boards. Each circuit board employs two circuits with equal power and identical structure. In the circuit layout, the current direction is "reversely distributed," while the external electrical polarity connection is "parallel in the same direction." Its structural features are: in the parallel circuit layout, the current flow directions at the same location are opposite, and the magnetic fields generated by the opposite currents are in opposite directions, resulting in magnetic field vector cancellation; the two external circuits are electrically connected in parallel with the same polarity. Thus, the power of each of the two circuit boards operating is half the power of a single chip in the original system.

[0053] This utility model also provides a parallel chip, which is basically the same as the parallel circuit board technical solution of this utility model described above. It includes a first chip and a second chip. The first chip has a first circuit, and the second chip has a second circuit. The first circuit has a first positive terminal connection and a first negative terminal connection, and the second circuit has a second positive terminal connection and a second negative terminal connection. The first positive terminal connection and the second negative terminal connection are arranged side by side. The first negative terminal connection and the second positive terminal connection are arranged side by side. The first positive terminal connection and the second positive terminal connection are connected in parallel to an external positive terminal, and the first negative terminal connection and the second negative terminal connection are connected in parallel to an external negative terminal.

[0054] The original equipment used several chips, each employing two circuits or chips with equal power and identical structure. In terms of circuit or chip layout, the current direction was "reversely distributed," and the external electrical polarity connection was "parallel in the same direction." Its structural characteristics are: in the parallel circuits or chips, the current flow directions at the same location are opposite, and the magnetic fields generated by these opposite currents are in opposite directions, resulting in vector cancellation. Externally, the two chips are electrically connected in parallel with the same polarity. Thus, the power of two individual chips is half that of a single chip in the original system.

[0055] In this invention, two parallel chips generate magnetic fields that are always opposite during operation, and the vector sum of the magnetic fields is always zero. Therefore, the complex structures of magnetic shielding and demagnetization are eliminated, and the structure is simple, low in cost, and effective.

[0056] Similar to the beneficial effects of the parallel circuit board of the present invention, the parallel chip of the present invention can also effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields.

[0057] For ease of manufacturing and use, the first chip and the second chip are packaged together.

[0058] As described above, the present invention relates to a circuit, chip, circuit board, parallel chip, and parallel circuit board for suppressing weak magnetic field pollution, which can effectively reduce the magnetic field generated by the circuit and effectively reduce magnetic pollution from extremely weak magnetic fields.

[0059] In summary, the circuit, chip, circuit board, parallel chip, and parallel circuit board for suppressing weak magnetic field contamination disclosed in this utility model can be used in major scientific and technological infrastructure projects involving extremely weak magnetic fields, as well as in national key laboratories, hospitals, and other places with high requirements for suppressing extremely weak magnetic field contamination. It solves the problem of magnetic field contamination in any equipment using chips, and is low in cost, efficient, and suitable for market-oriented, engineering-scale production and widespread application. Currently, new high-tech magnetic shielding materials are used domestically and internationally to shield magnetic fields. Although this has solved the problem of shielding extremely weak magnetic fields, the cost is high. Furthermore, while new materials have good magnetic shielding effects, they still possess residual magnetism after shielding the magnetic field, which still causes contamination and requires demagnetization. The principle of demagnetization is mainly to change the direction of the internal magnetic domains of the magnet, restoring it to a magnetically neutral state, i.e., a uniform distribution of magnetic moments, thereby eliminating or reducing the magnetism of the magnet. This process can be achieved through several methods: addition method; alternating magnetic field method; direct current demagnetization; static and dynamic demagnetization; all of these methods are very complex and costly. Compared to the above-mentioned methods for shielding magnetic fields, the magnetization technology of the extremely weak magnetic field chip described in this invention completely avoids the above-mentioned methods of magnetic shielding and avoids the demagnetization process. In particular, it solves the problem of extremely weak magnetic field pollution caused by current in any device chip in the field of chip application. It has the advantages of simple structure, low cost and good effect.

[0060] This utility model relates to a circuit and chip, circuit board, parallel chip, and parallel circuit board for suppressing weak magnetic field pollution. It is applicable to chip manufacturing by chip manufacturers and is used to limit magnetic field pollution. It is also applicable to infrastructure projects or other equipment manufacturing fields, chips in equipment, and users to limit magnetic field pollution.

[0061] This utility model effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0062] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A circuit for suppressing magnetic fields, characterized in that, It includes one or more sets of parallel circuits, the parallel circuits include a first circuit and a second circuit, the first circuit has a first positive terminal connection and a first negative terminal connection, the second circuit has a second positive terminal connection and a second negative terminal connection; the first positive terminal connection and the second negative terminal connection are arranged side by side; the first negative terminal connection and the second positive terminal connection are arranged side by side; the first positive terminal connection and the second positive terminal connection are connected in parallel to an external positive terminal, and the first negative terminal connection and the second negative terminal connection are connected in parallel to an external negative terminal.

2. The circuit for suppressing magnetic fields according to claim 1, characterized in that: The first positive terminal and the second negative terminal are arranged adjacent to each other and in parallel. The first negative terminal and the second positive terminal are arranged adjacent to each other and in parallel.

3. The circuit for suppressing magnetic fields according to claim 1, characterized in that: The first positive terminal is connected to the second positive terminal via a positive terminal connecting wire, and the first negative terminal is connected to the second negative terminal via a negative terminal connecting wire. The positive terminal connecting wire and the negative terminal connecting wire are arranged in parallel.

4. The circuit for suppressing magnetic fields according to claim 2, characterized in that: The first circuit, the second circuit, the positive terminal connection line, and the negative terminal connection line are all packaged together to form a single structure.

5. A circuit board, characterized in that, A circuit comprising the magnetic field suppression described in claim 1.

6. A chip, characterized in that, A circuit comprising the magnetic field suppression described in claim 1.

7. A parallel circuit board, comprising a first circuit board and a second circuit board, characterized in that: The first circuit board has a first circuit, and the second circuit board has a second circuit. The first circuit has a first positive terminal and a first negative terminal, and the second circuit has a second positive terminal and a second negative terminal. The first positive terminal and the second negative terminal are arranged side by side. The first negative terminal and the second positive terminal are arranged side by side. The first positive terminal and the second positive terminal are connected in parallel to an external positive terminal, and the first negative terminal and the second negative terminal are connected in parallel to an external negative terminal.

8. A parallel chip, comprising a first chip and a second chip, characterized in that: The first chip has a first circuit, and the second chip has a second circuit. The first circuit has a first positive terminal and a first negative terminal, and the second circuit has a second positive terminal and a second negative terminal. The first positive terminal and the second negative terminal are arranged side by side. The first negative terminal and the second positive terminal are arranged side by side. The first positive terminal and the second positive terminal are connected in parallel to an external positive terminal, and the first negative terminal and the second negative terminal are connected in parallel to an external negative terminal.

9. The parallel chip according to claim 8, characterized in that: The first chip and the second chip are packaged together.