Optical attenuator capable of reducing on-chip optical return loss

By designing the output end face of the optical attenuator to be at a preset angle to the double-arm waveguide structure and forming a wavy and uneven surface by laser sintering, the problem of high optical signal reflection loss is solved, and the optical signal transmission quality is improved.

CN223926652UActive Publication Date: 2026-02-17ACCELINK TECHNOLOGIES CO LTD
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Patent Information

Application Number
CN202520736242.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-04-17
Publication Date
2026-02-17
Estimated Expiration
2035-04-17

AI Technical Summary

Technical Problem

In existing optical attenuators, the return loss caused by the reflection of the optical signal at the output end of the chip substrate is relatively high, which affects the transmission quality of the optical signal.

Method used

By designing the output end face of the chip substrate to be at a preset angle (greater than 90 degrees) to the extension direction of the double-arm waveguide structure, and forming a wavy and uneven surface through laser sintering, the loss of optical signal reflection is reduced.

Benefits of technology

It effectively reduces return loss and improves the transmission quality of optical signals, especially improving the loss from 30dB to 45dB.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides an optical attenuator capable of reducing on-chip light return loss, which comprises a chip substrate 1, a laser chip 2 and a double-arm waveguide structure 3, the double-arm waveguide structure 3 is arranged on the chip substrate 1, one end of the double-arm waveguide structure 3 is coupled with the laser chip 2, and the other end of the double-arm waveguide structure 3 is coupled with the laser chip 2. The other end of the double-arm waveguide structure 3 extends to the output end face 11 of the chip substrate 1. A preset angle is formed between the output end face 11 of the chip substrate 1 and the extension direction of the double-arm waveguide structure 3, and the preset angle is larger than 90 degrees. The output end face 11 of the chip substrate 1 is prevented from forming a 90-degree angle with the extension direction of the double-arm waveguide structure 3, so that the return light reflected back along the original light path after the output signal is reflected by the output end face 11 is reduced, the loss caused by the return light is further reduced, and the transmission quality of the light signal is improved.
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Description

Technical Field

[0001] This utility model relates to the field of optical communication technology, and in particular to an optical attenuator that reduces on-chip optical return loss. Background Technology

[0002] Currently, in optical attenuators based on planar lightwave circuits (PLCs), the output end face on the chip substrate used to set the light waveguide is usually polished. The light waveguide on the chip substrate extends to the output end face to couple with external devices and complete the output signal. The light waveguide on the chip substrate is usually perpendicular to the output end face. When the optical signal is transmitted to the polished output end face, part of the optical signal will be reflected back along the original optical path, resulting in high return loss and affecting the transmission quality of the optical signal.

[0003] Therefore, overcoming the shortcomings of the existing technology is an urgent problem to be solved in this technical field. Utility Model Content

[0004] The problem this invention aims to solve is how to reduce return loss in optical attenuators, thereby improving the transmission quality of optical signals in optical attenuators.

[0005] In a first aspect, an optical attenuator for reducing on-chip optical return loss is provided, comprising: a chip substrate 1, a laser chip 2, and a double-arm waveguide structure 3, wherein:

[0006] The double-arm waveguide structure 3 is disposed on the chip substrate 1. One end of the double-arm waveguide structure 3 is coupled to the laser chip 2, and the other end of the double-arm waveguide structure 3 extends to the output end face 11 of the chip substrate 1.

[0007] The output end face 11 of the chip substrate 1 is at a preset angle to the extension direction of the double-arm waveguide structure 3, and the preset angle is greater than 90 degrees.

[0008] Preferably, the preset angle is 98 degrees to 105 degrees.

[0009] Preferably, the horizontal depth of the output end face 11 of the chip substrate 1 is 300um to 500um.

[0010] Preferably, the surface of the output end face 11 of the chip substrate 1 is wavy and uneven.

[0011] Preferably, the dual-arm waveguide structure 3 includes an input single core 31, a first branch waveguide 32, a second branch waveguide 33, and an output single core 34, wherein:

[0012] One end of the input single core 31 is coupled to the laser chip 2, and the other end of the input single core 31 is connected to one end of the first branch waveguide 32 and one end of the second branch waveguide 33, respectively.

[0013] One end of the output single core 34 is connected to the other end of the first branch waveguide 32 and the other end of the second branch waveguide 33, respectively, and the other end of the output single core 34 extends to the output end face 11 of the chip substrate 1.

[0014] Preferably, a temperature control unit 4 is provided on the second branch waveguide 33.

[0015] Preferably, the temperature regulating unit 4 is made of metal gold.

[0016] Preferably, the dual-arm waveguide structure 3 further includes a splitting waveguide 35 and a combining waveguide 36, wherein:

[0017] One end of the input single core 31 is connected to the first branch waveguide 32 and the second branch waveguide 33 through the beam splitting waveguide 35.

[0018] The first branch waveguide 32 and the second branch waveguide 33 are respectively connected to the output single core 34 through the optical combining waveguide 36.

[0019] Preferably, the optical waveguide 35 includes a first main core 351, a first branch single core 352, and a second branch single core 353, wherein:

[0020] The first main core 351 is connected to the first branch core 352 and the second branch core 353 respectively;

[0021] The first main core 351 is connected to the input single core 31, the first branch single core 352 is connected to the first branch waveguide 32, and the second branch single core 353 is connected to the second branch waveguide 33.

[0022] Preferably, the optical waveguide 36 includes a second main core 361, a third branch single core 362, and a fourth branch single core 363, wherein:

[0023] The second main core 361 is connected to the third branch core 362 and the fourth branch core 363 respectively;

[0024] The second main core 361 is connected to the output single core 34, the third branch single core 362 is connected to the first branch waveguide 32, and the fourth branch single core 363 is connected to the second branch waveguide 33.

[0025] This invention provides an optical attenuator to reduce on-chip optical return loss, comprising: a chip substrate 1, a laser chip 2, and a double-arm waveguide structure 3, wherein: the double-arm waveguide structure 3 is disposed on the chip substrate 1, one end of the double-arm waveguide structure 3 is coupled to the laser chip 2, and the other end of the double-arm waveguide structure 3 extends to the output end face 11 of the chip substrate 1; the output end face 11 of the chip substrate 1 forms a preset angle with the extension direction of the double-arm waveguide structure 3, the preset angle being greater than 90 degrees. By designing the output end face 11 of the chip substrate 1 accordingly, the 90-degree angle between the output end face 11 of the chip substrate 1 and the extension direction of the double-arm waveguide structure 3 is avoided, thereby reducing the return light reflected back along the original optical path after the output signal is reflected by the output end face 11, thus reducing the loss caused by the return light and improving the transmission quality of the optical signal. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A schematic diagram of the structure of an optical attenuator for reducing on-chip optical return loss is provided for an embodiment of this utility model;

[0028] Figure 2 A schematic diagram of another optical attenuator for reducing on-chip optical return loss provided in this embodiment of the present invention;

[0029] Figure 3 A top perspective view of a structural schematic diagram of another optical attenuator for reducing on-chip optical return loss provided in an embodiment of this utility model;

[0030] Figure 4 A schematic diagram of another optical attenuator for reducing on-chip optical return loss provided in this embodiment of the present invention;

[0031] Figure 5 A schematic diagram of another optical attenuator for reducing on-chip optical return loss provided in this embodiment of the present invention;

[0032] The attached figures are numbered as follows:

[0033] Chip substrate 1; output end face 11; laser chip 2; double-arm waveguide structure 3; input single core 31; first branch waveguide 32; second branch waveguide 33; output single core 34; beam splitting waveguide 35; first main core 351; first branch single core 352; second branch single core 353; beam combining waveguide 36; second main core 361; third branch single core 362; fourth branch single core 363; temperature control unit 4. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0035] In the description of this utility model, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this disclosure.

[0036] In the description of this utility model, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more. Furthermore, for example, the description may use the prefix "A" or "B" to describe the same type of nouns as two independent entities. In this case, the features defined with "A" and "B" are used only to distinguish between similar entities and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.

[0037] In describing some embodiments, the terms "coupled," "coupled," and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "connected" or "coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other, such as "optical coupling" or "wireless connection." The embodiments disclosed herein are not necessarily limited to the scope of this invention.

[0038] In the description of this utility model, "A and / or B" will be used to represent specific features. The corresponding expressions include the following three combinations: only A, only B, and a combination of A and B.

[0039] As used in this invention, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the specified value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the specified quantity, i.e., the limitations of the measurement system.

[0040] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as openly inclusive, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," "specific example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples; that is, although they may be incorporated into embodiments or examples using the above terms for reasons such as order and position, it does not limit them to be incorporated in combination by a single embodiment or example.

[0041] Furthermore, the technical features involved in the various embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0042] Example 1:

[0043] This embodiment provides an optical attenuator to reduce on-chip optical return loss, such as... Figure 1 and Figure 2 As shown, it includes: a chip substrate 1, a laser chip 2, and a double-arm waveguide structure 3, wherein:

[0044] The double-arm waveguide structure 3 is disposed on the chip substrate 1. One end of the double-arm waveguide structure 3 is coupled to the laser chip 2, and the other end of the double-arm waveguide structure 3 extends to the output end face 11 of the chip substrate 1. The output end face 11 of the chip substrate 1 forms a preset angle with the extension direction of the double-arm waveguide structure 3, and the preset angle is greater than 90 degrees.

[0045] In this embodiment, the laser chip 2 is used to output optical signals to the double-arm waveguide structure 3. The double-arm waveguide structure 3 is used to split the input optical signal into two paths. By adjusting the phase difference between the two optical signals, the optical power of the output optical signal is adjusted, thereby realizing the function of an attenuator. The relationship between the phase difference between the two optical signals and the optical power of the output optical signal is as follows:

[0046] Pout = Pin * (sin(φ / 2))^2;

[0047] Where Pout is the optical power of the output optical signal, Pin is the optical power of the input optical signal, and φ is the phase difference between the two optical signals on the double-arm waveguide structure 3.

[0048] The output end face 11 of the chip substrate 1 is used to correspond with other devices so that the optical waveguide on the chip substrate 1 can be coupled with other devices. In the existing structure, the output end face 11 of the chip substrate 1 is usually polished. When the optical signal is transmitted to the polished output end face 11, part of the optical signal will be reflected back along the original optical path, causing loss to the original optical path. The relationship of the reflected light loss is as follows:

[0049]

[0050] Where RL is the return optical loss, P R P0 is the reflected light power, and Preflected is the incident light power.

[0051] The higher the optical power of the reflected light along the original optical path, the higher the corresponding loss. Therefore, in order to minimize the optical power of the reflected light along the original optical path, the reflection of the reflected light along the original optical path should be avoided as much as possible. Before special treatment of the output end face 11, the direction in which the double-arm waveguide structure 3 extends to the output end face 11 is perpendicular to the output end face 11 at a 90-degree angle. This will cause the optical signal output by the double-arm waveguide structure 3 to be reflected back along the original optical path after being reflected by the output end face 11. Therefore, in this embodiment, by performing laser sintering treatment on the output end face 11 of the chip substrate 1, the output end face 11 of the chip substrate 1 is sintered into a certain angled surface to avoid the output end face 11 of the chip substrate 1 being at a 90-degree angle to the extension direction of the double-arm waveguide structure 3, thereby reducing the reflected light along the original optical path, thereby reducing the loss caused by the reflected light and improving the transmission quality of the optical signal.

[0052] The preset angle, being greater than 90 degrees, can be set by those skilled in the art based on actual conditions. In this embodiment, for example... Figure 2 As shown, the preset angle is 98 degrees to 105 degrees, wherein the preset angle can be 98 degrees, the preset angle can be 102.5 degrees, and the preset angle can be 105 degrees.

[0053] Furthermore, since laser sintering is performed on the output end face 11, the output end face 11 will inevitably have a certain degree of lateral horizontal depth compared to before sintering. This lateral horizontal depth is the lateral distance between the deepest point of the laser-sintered portion of the output end face 11 and its position before laser sintering. This lateral horizontal depth determines the inclination degree of the output end face 11. The lateral horizontal depth can be set by those skilled in the art according to actual conditions. Figure 2 As shown, the horizontal depth of the output end face 11 of the chip substrate 1 is 300um to 500um. The horizontal depth of the output end face 11 of the chip substrate 1 can be 300um, 400um, or 500um.

[0054] Furthermore, since the output end face 11 of the chip substrate 1 is treated by laser sintering, the output end face 11, while at a certain angle, will also have the appearance of being treated by laser sintering, as follows: Figure 3 As shown, the surface of the output end face 11 of the chip substrate 1 is wavy and uneven. Figure 3 The raised and recessed lines on the output end face 11 represent the wave-like shape.

[0055] In this embodiment, the wavy and uneven shape is caused by laser sintering. The wavy and uneven shape is an irregular rough surface. The output end face 11 with the wavy and uneven shape can scatter the received output signal in different directions, thereby reducing the optical power of the reflected light along the original optical path and further improving the optical index of return loss.

[0056] In this embodiment, when the output end face 11 of the chip substrate 1 is at a 98-degree angle to the extension direction of the double-arm waveguide structure 3 through laser sintering, and the horizontal depth of the output end face 11 of the chip substrate 1 is 500um, the return loss can be improved from 30dB before laser sintering to 45dB.

[0057] Furthermore, to achieve the optical power adjustment function of the output signal of the dual-arm waveguide structure 3, the dual-arm waveguide structure 3 also needs a corresponding structural design, as follows:

[0058] like Figure 4 As shown, the dual-arm waveguide structure 3 includes an input single core 31, a first branch waveguide 32, a second branch waveguide 33, and an output single core 34. One end of the input single core 31 is coupled to the laser chip 2, and the other end of the input single core 31 is connected to one end of the first branch waveguide 32 and one end of the second branch waveguide 33, respectively. One end of the output single core 34 is connected to the other end of the first branch waveguide 32 and the other end of the second branch waveguide 33, respectively, and the other end of the output single core 34 extends to the output end face 11 of the chip substrate 1.

[0059] In this embodiment, the input single-core 31 is used to transmit the optical signal output by the laser chip 2, and splits the optical signal to transmit it to the first branch waveguide 32 and the second branch waveguide 33 respectively. The first branch waveguide 32 and the second branch waveguide 33 are then combined and sent to the output single-core 34. By adjusting the phase difference between the first branch waveguide 32 and the second branch waveguide 33, the optical power of the combined optical signal sent to the output single-core 34 is adjusted. The above structure realizes the attenuator function.

[0060] Furthermore, based on the above structure, since it is necessary to adjust the phase difference between the first branch waveguide 32 and the second branch waveguide 33, this can usually be achieved by adjusting the temperature of the first branch waveguide 32 or the second branch waveguide 33, thereby changing the phase difference between them. Therefore, this embodiment also involves the following design:

[0061] like Figure 4 As shown, a temperature control unit 4 is disposed on the second branch waveguide 33. The temperature control unit 4 is made of gold. In this embodiment, traces can be routed on the chip substrate 1 and connected to the temperature control unit 4, thereby realizing independent control of the temperature control unit 4. By energizing the temperature control unit 4, the temperature control unit 4 heats up, changing the temperature of the second branch waveguide 33, thereby changing the phase difference between the first branch waveguide 32 and the second branch waveguide 33.

[0062] Furthermore, since the input single-core 31 needs to split the input optical signal to transmit the split optical signal to the first branch waveguide 32 and the second branch waveguide 33, a corresponding splitting structure is required between the input single-core 31 and the first branch waveguide 32 and the second branch waveguide 33. Similarly, since the output single-core 34 needs to receive the combined optical signal from the first branch waveguide 32 and the second branch waveguide 33, a corresponding combining structure is required between the output single-core 34 and the first branch waveguide 32 and the second branch waveguide 33. Therefore, this embodiment also involves the following design:

[0063] As shown in the figure Figure 4 and Figure 5 As shown, the double-arm waveguide structure 3 further includes a beam splitter waveguide 35 and a beam combiner waveguide 36, wherein:

[0064] One end of the input single core 31 is connected to the first branch waveguide 32 and the second branch waveguide 33 through the beam splitter waveguide 35. The beam splitter waveguide 35 includes a first main core 351, a first branch single core 352, and a second branch single core 353, wherein: the first main core 351 is connected to the first branch single core 352 and the second branch single core 353 respectively; the first main core 351 is connected to the input single core 31, the first branch single core 352 is connected to the first branch waveguide 32, and the second branch single core 353 is connected to the second branch waveguide 33.

[0065] The first branch waveguide 32 and the second branch waveguide 33 are respectively connected to the output single core 34 through the optical combining waveguide 36. The optical combining waveguide 36 includes a second main core 361, a third branch single core 362, and a fourth branch single core 363, wherein: the second main core 361 is connected to the third branch single core 362 and the fourth branch single core 363 respectively; the second main core 361 is connected to the output single core 34, the third branch single core 362 is connected to the first branch waveguide 32, and the fourth branch single core 363 is connected to the second branch waveguide 33.

[0066] In practical applications, the following steps can be taken to process it:

[0067] (1) Before laser sintering, determine the current return loss of the device and the ideal return loss of the device.

[0068] The return loss of the current device is the return loss generated at the input port of the device before laser sintering; the ideal return loss of the device is the return loss set by the user, which is set by the user according to their own requirements. The ideal return loss will be significantly better than the return loss of the current device and is a reference target that needs to be optimized.

[0069] (2) Determine the laser sintering parameters based on the current return loss of the device and the ideal return loss of the device.

[0070] The laser sintering parameters include sintering angle and horizontal depth.

[0071] (3) The output end face 11 is sintered by laser sintering parameters so that the actual return loss during the sintering period meets the ideal return loss.

[0072] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. An optical attenuator that reduces on-chip optical back loss, characterized by, The chip substrate (1), the laser chip (2) and the double-arm waveguide structure (3), wherein: The double-arm waveguide structure (3) is arranged on the chip substrate (1), one end of the double-arm waveguide structure (3) is coupled with the laser chip (2), and the other end of the double-arm waveguide structure (3) extends to the output end face (11) of the chip substrate (1); The output end face (11) of the chip substrate (1) is at a preset angle with the extension direction of the double-arm waveguide structure (3), and the preset angle is greater than 90 degrees. The preset angle is 98-105 degrees.

2. The optical attenuator to reduce on-chip optical back loss according to claim 1, wherein, The horizontal depth of the output end face (11) of the chip substrate (1) is 300-500 um.

3. The optical attenuator to reduce on-chip optical back loss according to claim 1, wherein, The surface of the output end face (11) of the chip substrate (1) is in a wavy concave-convex shape.

4. The optical attenuator to reduce on-chip optical back loss according to claim 1, wherein, The double-arm waveguide structure (3) comprises an input single core (31), a first branch waveguide (32), a second branch waveguide (33) and an output single core (34), wherein:

5. The optical attenuator to reduce on-chip optical back loss according to claim 1, wherein, One end of the input single core (31) is coupled with the laser chip (2), and the other end of the input single core (31) is respectively connected with one end of the first branch waveguide (32) and one end of the second branch waveguide (33); One end of the output single core (34) is respectively connected with the other end of the first branch waveguide (32) and the other end of the second branch waveguide (33), and the other end of the output single core (34) extends to the output end face (11) of the chip substrate (1). The second branch waveguide (33) is provided with a temperature control unit (4).

6. The optical attenuator to reduce on-chip optical back loss according to claim 5, wherein, The temperature control unit (4) is gold.

7. The optical attenuator to reduce on-chip optical back loss according to claim 6, wherein, The double-arm waveguide structure (3) further comprises a light splitting waveguide (35) and a light combining waveguide (36), wherein:

8. The optical attenuator to reduce on-chip optical back loss according to claim 5, wherein, One end of the input single core (31) is connected with the first branch waveguide (32) and the second branch waveguide (33) through the light splitting waveguide (35); The first branch waveguide (32) and the second branch waveguide (33) are respectively connected with the output single core (34) through the light combining waveguide (36). The light splitting waveguide (35) comprises a first main core (351), a first branch single core (352) and a second branch single core (353), wherein:

9. The optical attenuator to reduce on-chip optical back loss according to claim 8, wherein, The first main core (351) is connected with the first branch single core (352) and the second branch single core (353); The first main core (351) is connected with the input single core (31), the first branch single core (352) is connected with the first branch waveguide (32), and the second branch single core (353) is connected with the second branch waveguide (33). The light combining waveguide (36) comprises a second main core (361), a third branch single core (362) and a fourth branch single core (363), wherein:

10. The optical attenuator to reduce on-chip optical back loss according to claim 8, wherein, The second main core (361) is connected with the third branch single core (362) and the fourth branch single core (363); The second main core (361) is connected with the output single core (34), the third branch single core (362) is connected with the first branch waveguide (32), and the fourth branch single core (363) is connected with the second branch waveguide (33). ​