Root control circuit

Abstract

The utility model relates to the technical field of flashing circuits, and provides a flashing control circuit, which comprises a CPU (Central Processing Unit) connecting end, a first control circuit, an upgrading circuit switch end, a main power supply connecting end, a post-stage power supply connecting end, an external control pin and a second control circuit, the CPU connecting end is connected with the switch end of the upgrading circuit through the first control circuit, and the external control pin is connected with the switch end of the upgrading circuit through the second control circuit; the main power supply connecting end is connected to a connecting line between the external control pin and the second control circuit, and the post-stage power supply connecting end is respectively connected with the first control circuit, the second control circuit and the switch end of the upgrading circuit. According to the circuit, on one hand, the equipment can be controlled to quickly enter a flashing state through a software program, and on the other hand, a control circuit for manually controlling equipment flashing through an external control pin is additionally arranged, so that manual flashing can be switched in time when the software program is abnormal, and the equipment is ensured to finish flashing and normally run.

Description

TECHNICAL FIELD

[0001] The utility model relates to a brush machine circuit technical field especially relates to a brush machine control circuit. BACKGROUND

[0002] Now, most of the electronic equipment on the market will adopt software program control equipment brush machine, or directly disassemble and brush machine. Using software program to brush machine is still the primary solution of most electronic equipment manufacturers, although it is more convenient, but the prerequisite for successful brush machine of brush machine software is that brush machine software must be able to run normally, if the brush machine software cannot run normally because of sudden factors, only the electronic equipment can be disassembled and brushed, time-consuming and laborious. Therefore, the electronic equipment needs a brush machine scheme with higher stability and higher success rate of brush machine. INVENTION CONTENTS

[0003] The utility model provides a kind of brush machine control circuit, to solve the defect that equipment cannot normally brush machine when the software program of control equipment enters brush machine state in prior art, realize that software program can be switched to manually control equipment brush machine in time when abnormal.

[0004] The utility model provides a kind of brush machine control circuit, comprising: CPU connection end, first control circuit, upgrade circuit switch end, total power supply connection end, rear power supply connection end, external control pin, second control circuit;

[0005] The CPU connection end is connected with upgrade circuit switch end by first control circuit, and the external control pin is connected with upgrade circuit switch end by second control circuit;Total power supply connection end is connected on the connecting line between external control pin and second control circuit, and the rear power supply connection end is connected with first control circuit, second control circuit and upgrade circuit switch end respectively.

[0006] According to the brush machine control circuit provided by the utility model, the first control circuit includes latch and first triode, the latch is 6-pin latch, the CLK pin and D pin of the latch are connected with CPU connection end respectively, the GND pin of the latch is grounded, the VCC pin and CLR pin of the latch are connected with rear power supply connection end respectively, the Q pin of the latch is connected with the base of first triode, the emitter of first triode is grounded, and the collector of first triode is connected with upgrade circuit switch end.

[0007] According to the utility model provide a kind of machine brushing control circuit, the second control circuit includes second triode, machine brushing trigger capacitor and third triode, the external control pin is connected with the base of second triode, the emitter of second triode is grounded, the collector of second triode is connected with one end of machine brushing trigger capacitor, the other end of machine brushing trigger capacitor is connected with the base of third triode, the emitter of third triode is grounded, the collector of third triode is connected with the switch end of upgrade circuit.

[0008] According to the utility model provide a kind of machine brushing control circuit, the total power supply connecting end is connected on the connecting line between external control pin and the base of second triode.

[0009] According to the utility model provide a kind of machine brushing control circuit, the rear power supply connecting end is connected on the connecting line between the collector of second triode and machine brushing trigger capacitor.

[0010] According to the utility model provide a kind of machine brushing control circuit, the VCC pin and CLR pin of latch are also respectively grounded by first capacitor.

[0011] According to the utility model provide a kind of machine brushing control circuit, the connecting line of the CLK pin of latch and CPU connecting end is connected with first resistance in series, and the connecting line of the D pin of latch and CPU connecting end is connected with second resistance in series.

[0012] According to the utility model provide a kind of machine brushing control circuit, the line between first resistance and the CLK pin of latch is also grounded by third resistance, and the line between second resistance and the D pin of latch is also grounded by fourth resistance.

[0013] According to the utility model provide a kind of machine brushing control circuit, the switch end of upgrade circuit is connected with first control circuit and second control circuit by eighth resistance respectively, and the line of switch end of upgrade circuit and eighth resistance is also connected with rear power supply connecting end by ninth resistance, and the line of eighth resistance and first control circuit and second control circuit is also grounded by second capacitor.

[0014] According to the utility model provide a kind of machine brushing control circuit, the connecting line between external control pin and the base of second triode is connected with eleventh resistance in series, and the connecting line of eleventh resistance and external control pin is sequentially connected with total power supply connecting end by tenth resistance, diode, wherein, the anode of diode is connected with total power supply connecting end;The connecting line of eleventh resistance and the base of second triode is also grounded by twelfth resistance.

[0015] The utility model provides a kind of machine brushing control circuit, through design internal software control machine brushing circuit and external pin control machine brushing circuit combination's double machine brushing circuit, when internal machine brushing software program appears exception, can continue to control equipment for machine brushing operation by timely switching for external pin, without disassembly, so that equipment machine brushing end, can be normally powered on to enter working condition, further improve the efficiency of equipment machine brushing success. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical scheme in the utility model or the prior art, the following will be a simple introduction to the drawings needed to be used in the embodiment or the prior art description, obviously, the following description of drawings is some embodiments of the utility model, for those skilled in the art, without creative labor, other drawings can also be obtained according to these drawings.

[0017] Figure 1 It is a kind of machine brushing control circuit schematic diagram provided by the utility model;

[0018] Figure 2 It is the electrical block diagram of a kind of machine brushing control circuit provided by the utility model;

[0019] Figure 3 It is the level state timing diagram between latch pin and upgrade circuit switch end;

[0020] Figure 4 It is the level state timing diagram between external control pin and upgrade circuit switch end. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical scheme and advantage of the utility model more clearly, the following will be combined with the drawings in the utility model, the technical scheme in the utility model is clearly and completely described, obviously, the described embodiment is a part of the embodiment of the utility model, not all embodiments. Based on the embodiment in the utility model, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the utility model.

[0022] The following will be combined Figures 1-4 A kind of machine brushing control circuit of the utility model is described, the machine brushing control circuit is applicable to the electronic equipment (such as code scanning gun, PDA, mobile phone, tablet computer etc.) with code scanning function, the machine brushing control circuit includes: CPU connection end, first control circuit, upgrade circuit switch end, total power supply connection end, rear power supply connection end, external control pin, second control circuit;

[0023] As Figure 1 And Figure 2As shown, the CPU connection terminal is connected to the upgrade circuit switch terminal through the first control circuit, and the external control pin is connected to the upgrade circuit switch terminal through the second control circuit; the main power connection terminal is connected to the connection line between the external control pin and the second control circuit, and the subsequent power connection terminal is connected to the first control circuit, the second control circuit, and the upgrade circuit switch terminal respectively.

[0024] As the names suggest, the CPU connection terminal mentioned above is used to connect to the CPU, and the upgrade circuit switch terminal is used to connect to the upgrade circuit and control whether the upgrade circuit enters the upgrade state. In this embodiment, when the upgrade circuit switch terminal is in a high-level state, the upgrade circuit does not perform a flash upgrade; when the upgrade circuit switch terminal is in a low-level state, the upgrade circuit performs a flash upgrade. The main power connection terminal is used to connect to the main power supply, which acts as the main switch for the entire device's power supply. The downstream power supply acts as a voltage divider. The downstream power supply will only be turned on after the main power supply is turned on, and the voltage of the main power supply is greater than the voltage of the downstream power supply. Under normal circumstances, the main power supply is 5V, and the downstream power supply is 3.3V. The external control pin is used to manually control the level of the upgrade circuit switch terminal to go low so that the upgrade circuit can perform a flash upgrade.

[0025] The first control circuit includes a latch U1 and a first transistor Q1. The latch U1 is a 6-pin latch. The CLK pin and D pin of the latch U1 are connected to the CPU connection terminal, the GND pin of the latch U1 is grounded, the VCC pin and CLR pin of the latch U1 are connected to the power supply connection terminal of the subsequent stage, the Q pin of the latch U1 is connected to the base of the first transistor Q1, the emitter of the first transistor Q1 is grounded, and the collector of the first transistor Q1 is connected to the switch terminal of the upgrade circuit.

[0026] In this embodiment, latch U1 is model SN74LVC1G175DCK, which triggers the D pin (i.e., the input signal) on the rising edge of the CLK pin and outputs the signal from the Q pin. The D pin of latch U1 is always high by default. The CLR pin of the latch has an asynchronous reset function and is active when low. Therefore, connecting the subsequent power supply is to ensure that it is always high by default, avoiding accidental reset that could cause the latch to fail.

[0027] Furthermore, a first resistor R1 is connected in series on the connection line between the CLK pin of latch U1 and the CPU terminal, and a second resistor R2 is connected in series on the connection line between the D pin of latch U1 and the CPU terminal; the line between the first resistor R1 and the CLK pin of latch U1 is also grounded through a third resistor R3, and the line between the second resistor R2 and the D pin of latch U1 is also grounded through a fourth resistor R4.

[0028] Furthermore, the VCC and CLR pins of latch U1 are grounded through the first capacitor C1, the CLR pin of latch U1 is connected to the power supply terminal of the subsequent stage through the fifth resistor R5, the Q pin of latch U1 is connected in series with the base of the first transistor Q1 through the sixth resistor R6, and the connection line between the sixth resistor R6 and the base of the first transistor Q1 is grounded through the seventh resistor R7.

[0029] The upgrade circuit switch is connected to the first control circuit and the second control circuit respectively through the eighth resistor R8. The line connecting the upgrade circuit switch to the eighth resistor R8 is also connected to the power supply terminal of the subsequent stage through the ninth resistor R9. The line connecting the eighth resistor R8 to the first control circuit and the second control circuit is also grounded through the second capacitor C2.

[0030] In this embodiment, when the upgrade circuit switch is at a low level, the device enters the flashing state; when the upgrade circuit switch is at a high level, the device enters the normal operating state. After the main power supply of the device is turned on, the upgrade circuit switch is maintained at a high level by the downstream power supply. Figure 3 As shown, when the CPU detects a flashing command, it controls the D pin of latch U1 to be triggered on the rising edge of the CLK pin of latch U1 (equivalent to inputting a high-level signal). This, in turn, controls the Q pin of latch U1 to output a high-level signal, creating a voltage difference between the base and emitter of the first transistor Q1. The collector and emitter of the first transistor Q1 are then turned on, causing the upgrade circuit switch to change from a high-level state to a low-level state. The device enters the flashing state. After the flashing is completed, the CPU controls the CLK and D pins of latch U1 to return to a low-level state, thereby restoring the Q pin of latch U1 and the upgrade circuit switch to their normal state.

[0031] The second control circuit includes a second transistor Q2, a flashing trigger capacitor C3, and a third transistor Q3. The external control pin is connected to the base of the second transistor Q2, the emitter of the second transistor Q2 is grounded, the collector of the second transistor Q2 is connected to one end of the flashing trigger capacitor C3, the other end of the flashing trigger capacitor C3 is connected to the base of the third transistor Q3, the emitter of the third transistor Q3 is grounded, and the collector of the third transistor Q3 is connected to the upgrade circuit switch terminal.

[0032] In this embodiment, the on-state voltage of the third transistor Q3 is set to 0.7V. The on and off states of the third transistor Q3 depend on the voltage of the flashing trigger capacitor C3. When the voltage of the flashing trigger capacitor C3 is greater than 0.7V, the third transistor Q3 is on; when the voltage of the flashing trigger capacitor C3 is less than 0.7V, the third transistor Q3 is off.

[0033] Further, the total power connection end is connected to the connection line between the external control pin and the base of the second transistor Q2, and the later-stage power connection end is connected to the connection line between the collector of the second transistor Q2 and the flash trigger capacitor C3; the connection line between the collector of the second transistor Q2 and the flash trigger capacitor C3 is further connected to the later-stage power connection end through the thirteenth resistor R13, and the connection line between the flash trigger capacitor C3 and the base of the third transistor Q3 is connected in series with the fourteenth resistor R14, and the connection line between the fourteenth resistor R14 and the base of the third transistor Q3 is further connected to the ground through the fifteenth resistor R15.

[0034] Further, the eleventh resistor R11 is connected in series to the connection line between the external control pin and the base of the second transistor Q2, and the connection line between the eleventh resistor R11 and the external control pin is connected to the total power connection end in sequence through the tenth resistor R10, the diode D1 and the total power connection end, wherein the positive electrode of the diode D1 is connected to the total power connection end; the connection line between the eleventh resistor R11 and the base of the second transistor Q2 is further connected to the ground through the twelfth resistor R12.

[0035] In the embodiment, the external control pin is manually controlled, and under normal circumstances, the level of the external control pin is maintained at a high level state by the total power, the base of the second transistor Q2 is maintained at a high level state by the total power, and then the second transistor Q2 is in a conducting state, so that the later-stage power cannot supply power to the flash trigger capacitor C3, and the third transistor Q3 is in a disconnected state.

[0036] When the external control pin is artificially controlled to be in a low level state (for example, the external control pin is connected to the ground), there is no voltage difference between the base and the emitter of the second transistor Q2, and the second transistor Q2 is thus in a disconnected state. At the same time, the later-stage power supplies power to the flash trigger capacitor C3 through the later-stage power connection end, so that the flash trigger capacitor C3 is continuously charged, and when the voltage of the flash trigger capacitor C3 is greater than or equal to 0.7V, the third transistor Q3 is turned on, so that the upgrade circuit switch end is in a low level state, and the device enters the flash state. After the device enters the flash state, the low level state of the external control pin can be released, the second transistor Q2 returns to the conducting state, the flash trigger capacitor C3 switches to the discharging state, and the voltage value thereof gradually decreases. When the voltage value of the flash trigger capacitor C3 is less than 0.7V, the third transistor Q3 is disconnected, so that the upgrade circuit switch end returns to a high level state, and the device automatically powers on to enter the working state after the flash ends, thereby avoiding the cumbersome operation of artificially controlling the device to be powered on and enter the working state when the upgrade circuit switch end is still in a low level state after the device flash ends.

[0037] Finally, it should be noted that: the above examples are used to illustrate the technical solutions of the present application, but not limited to; although the present application is described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still be modified to the technical solutions recorded in the foregoing examples, or part of the technical features are replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A flashing control circuit, characterized in that, include: CPU connection terminal, first control circuit, upgrade circuit switch terminal, main power connection terminal, subsequent power connection terminal, external control pin, second control circuit; The CPU connection terminal is connected to the upgrade circuit switch terminal through the first control circuit, and the external control pin is connected to the upgrade circuit switch terminal through the second control circuit; the main power connection terminal is connected to the connection line between the external control pin and the second control circuit, and the subsequent power connection terminal is connected to the first control circuit, the second control circuit, and the upgrade circuit switch terminal respectively.

2. The flashing control circuit according to claim 1, characterized in that, The first control circuit includes a latch and a first transistor. The latch is a 6-pin latch. The CLK and D pins of the latch are connected to the CPU connection terminal, the GND pin of the latch is grounded, the VCC and CLR pins of the latch are connected to the power supply connection terminal of the subsequent stage, the Q pin of the latch is connected to the base of the first transistor, the emitter of the first transistor is grounded, and the collector of the first transistor is connected to the switch terminal of the upgrade circuit.

3. The flashing control circuit according to claim 1, characterized in that, The second control circuit includes a second transistor, a flashing trigger capacitor, and a third transistor. The external control pin is connected to the base of the second transistor, the emitter of the second transistor is grounded, the collector of the second transistor is connected to one end of the flashing trigger capacitor, the other end of the flashing trigger capacitor is connected to the base of the third transistor, the emitter of the third transistor is grounded, and the collector of the third transistor is connected to the upgrade circuit switch terminal.

4. The flashing control circuit according to claim 3, characterized in that, The main power supply connection is connected to the connection line between the external control pin and the base of the second transistor.

5. A flashing control circuit according to claim 3, characterized in that, The power supply connection terminal is connected to the connection line between the collector of the second transistor and the flashing trigger capacitor.

6. A flashing control circuit according to claim 2, characterized in that, The VCC and CLR pins of the latch are also grounded through the first capacitor.

7. A flashing control circuit according to claim 2, characterized in that, A first resistor is connected in series on the connection line between the CLK pin of the latch and the CPU terminal, and a second resistor is connected in series on the connection line between the D pin of the latch and the CPU terminal.

8. A flashing control circuit according to claim 7, characterized in that, The line between the first resistor and the CLK pin of the latch is also grounded through a third resistor, and the line between the second resistor and the D pin of the latch is also grounded through a fourth resistor.

9. A flashing control circuit according to claim 1, characterized in that, The upgrade circuit switch terminal is connected to the first control circuit and the second control circuit respectively through the eighth resistor. The line connecting the upgrade circuit switch terminal and the eighth resistor is also connected to the downstream power supply terminal through the ninth resistor. The line connecting the eighth resistor and the first control circuit and the second control circuit is also grounded through the second capacitor.

10. A flashing control circuit according to claim 3, characterized in that, An eleventh resistor is connected in series on the connection line between the external control pin and the base of the second transistor. The connection line between the eleventh resistor and the external control pin is connected in sequence through a tenth resistor, a diode, and the main power supply terminal, wherein the positive terminal of the diode is connected to the main power supply terminal. The connection line between the eleventh resistor and the base of the second transistor is also grounded through a twelfth resistor.

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