Dual-power parallel operation control circuit

Abstract

The utility model discloses a dual-power parallel operation control circuit, which comprises an acquisition circuit, an output driving control circuit, a parallel operation control circuit, a system auxiliary power supply and a processor MCU (Microprogrammed Control Unit), the acquisition circuit judges the working state of the power supply by detecting the voltage and current output by the power supply; the output drive control circuit controls on-off of an MOS through a gate drive chip so as to control on-off of output. The parallel operation control circuit controls connection and disconnection of a parallel operation line by controlling a relay. According to the system auxiliary power supply, the two power supplies are connected in parallel, the maximum load current is supported to be rated output current of a single power supply, the two power supplies respectively output half of the rated current through current sharing, so that a redundant system is constructed, and when any power supply module in parallel connection breaks down, other power supply modules can work continuously. The dual-power parallel operation control circuit provided by the utility model has the effect of ensuring the redundancy reliability of the whole power supply system.

Description

TECHNICAL FIELD

[0001] The utility model relates to power supply system technical field especially relates to a double power supply parallel operation control circuit. BACKGROUND

[0002] The power module output can be connected in parallel to realize redundancy, thereby improving system reliability. The maximum power of the redundant system needs to be derated to ensure that the redundant system can still meet the rated load requirement when a power module fails. Currently, two power supplies are connected in parallel to support the maximum load current as the rated output current of a single power supply. The two power supplies are connected in parallel to output half of the rated current, thereby constructing a redundant system.

[0003] The power module is connected in parallel and works redundantly. When any power module in parallel fails, other power modules can continue to work. After any power module in parallel fails, the current sharing connection terminal needs to be removed to avoid the influence of other power modules, resulting in a decrease in output voltage. SUMMARY

[0004] To solve the above problems, the present application provides a double power supply parallel operation control circuit to solve the problems in the prior art.

[0005] The specific technical solutions are as follows:

[0006] A double power supply parallel operation control circuit, comprising a collection circuit, an output drive control circuit, a parallel operation control circuit, a system auxiliary power supply and a processor MCU.

[0007] The collection circuit detects the voltage and current of the power supply output to determine the working state of the power supply.

[0008] The output drive control circuit controls the on-off of the MOS through the gate drive chip, thereby controlling the on-off of the output.

[0009] The parallel operation control circuit controls the access and disconnection of the parallel operation line by controlling the relay.

[0010] The system auxiliary power supply provides power supply for the whole system.

[0011] The processor MCU realizes corresponding control according to the relevant information collected by the collection circuit.

[0012] The double power parallel operation control circuit has the following characteristics: the circuit further comprises a circuit breaker K1, a circuit breaker K2, a power supply PW1 and a power supply PW2; an external input is electrically connected to two input terminals of the power supply PW1 through the circuit breaker K1; the external input is also electrically connected to two input terminals of the power supply PW2 through the circuit breaker K1; two output terminals of the power supply PW1 are electrically connected to one module of the auxiliary power supply; the two output terminals of the power supply PW1 are electrically connected to an input terminal of the circuit breaker K2 in sequence through the acquisition circuit and the output drive control circuit; two output terminals of the power supply PW2 are electrically connected to the input terminal of the circuit breaker K2 in sequence through the acquisition circuit and the output drive control circuit; an output terminal of the circuit breaker K2 is used as a system output terminal; an output terminal of the acquisition circuit is electrically connected to a signal input terminal of the processor MCU; a control signal output terminal of the processor MCU is electrically connected to an input terminal of the parallel operation control circuit; an output terminal of the parallel operation control circuit is electrically connected to a current sharing terminal of the power supply PW1 and a current sharing terminal of the power supply PW2 respectively; and a drive signal output terminal of the processor is electrically connected to a control input terminal of the output drive control circuit.

[0013] The double power parallel operation control circuit has the following characteristics: the acquisition circuit comprises two voltage acquisition modules and two current acquisition modules; the two voltage acquisition modules are arranged at output terminals of the power supply PW1 and the power supply PW2 respectively to acquire voltage signals; output terminals of the two voltage acquisition modules are electrically connected to the processor MCU; a negative output terminal of the power supply PW1 and a negative output terminal of the power supply PW2 are electrically connected to input terminals of corresponding output drive control circuits through corresponding current acquisition modules; and output terminals of the two current acquisition modules are electrically connected to the processor MCU.

[0014] The double power parallel operation control circuit has the following characteristics: the output drive control circuit comprises an output control module Q1 and an output control module Q2; a negative output terminal of the power supply PW1 is electrically connected to an input terminal of the output control module Q1 through the current acquisition module; a positive output terminal of the power supply PW1 and an output terminal of the output control module Q1 are electrically connected to two input terminals of the circuit breaker K2 respectively; a negative output terminal of the power supply PW2 is electrically connected to an input terminal of the output control module Q2 through the current acquisition module; and a positive output terminal of the power supply PW2 and an output terminal of the output control module Q2 are electrically connected to two input terminals of the circuit breaker K2 respectively.

[0015] The double power supply parallel control circuit has the following characteristics: the parallel control circuit comprises a relay K3, a control signal input end of the relay K3 is electrically connected with a control signal output end of the processor MCU, two equal current ends of the power supply PW2 are electrically connected with two common ends of the relay K3 respectively, and two normally open ends of the relay K3 are electrically connected with two equal current ends of the power supply PW1 respectively.

[0016] In summary, the scheme has the following beneficial effects:

[0017] In the double power supply parallel control circuit, two power supplies are connected in parallel, the maximum load current is the rated output current of a single power supply, two power supplies are connected in parallel, and each outputs half of the rated current, so that a redundant system is constructed, and when any power supply module in parallel fails, other power supply modules can continue to work. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 The utility model provides a double power supply parallel control circuit's circuit structure schematic diagram. DETAILED DESCRIPTION

[0019] The technical scheme of the utility model will be described clearly and completely in combination with the embodiments of the utility model. Obviously, the described embodiments are only a part of the embodiments of the utility model, not all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by the person skilled in the art without creative labor belong to the protection scope of the utility model.

[0020] It should be noted that the embodiments in the utility model and the features in the embodiments can be combined with each other without conflict.

[0021] The utility model will be further described in combination with specific embodiments, but not as the limitation of the utility model.

[0022] Figure 1 The utility model provides a double power supply parallel control circuit's circuit structure schematic diagram, as shown in the figure, Figure 1 The double power supply parallel control circuit comprises a collection circuit, an output drive control circuit, a parallel control circuit, a system auxiliary power supply and a processor MCU.

[0023] The collection circuit judges the working state of the power supply by detecting the voltage and current output by the power supply.

[0024] The output drive control circuit controls the on-off of the MOS through the gate drive chip, thereby controlling the on-off of the output.

[0025] Parallel control circuit, by controlling the relay, thereby controlling the access and disconnection of the parallel line;

[0026] System auxiliary power supply, for the whole system to provide power supply;

[0027] Processor MCU, according to the relevant information collected by the acquisition circuit, realize the corresponding control.

[0028] It should be noted that the system auxiliary power supply includes an auxiliary power supply and a diode, the positive output of the power supply PW1 is electrically connected with the first end of the auxiliary power supply, the second end of the auxiliary power supply is electrically connected with the anode of the diode, and the cathode of the diode is electrically connected with the negative output of the power supply PW1.

[0029] In the above embodiment, further comprising circuit breaker K1, circuit breaker K2, power supply PW1 and power supply PW2, the external input is electrically connected with the two input ends of the power supply PW1 after passing through the circuit breaker K1, and is also electrically connected with the two input ends of the power supply PW2 after passing through the circuit breaker K1, the two output ends of the power supply PW1 are electrically connected with one module of the system auxiliary power supply, the two output ends of the power supply PW1 are electrically connected with the input end of the circuit breaker K2 after passing through the acquisition circuit and the output drive control circuit in turn, the two output ends of the power supply PW2 are electrically connected with the input end of the circuit breaker K2 after passing through the acquisition circuit and the output drive control circuit in turn, the output end of the circuit breaker K2 is as the system output end, the output end of the acquisition circuit is electrically connected with the signal input end of the processor MCU, the control signal output end of the processor MCU is electrically connected with the input end of the parallel control circuit, the output end of the parallel control circuit is respectively electrically connected with the current sharing end of the power supply PW1 and the current sharing end of the power supply PW2, and the drive signal output end of the processor is electrically connected with the control input end of the output drive control circuit.

[0030] In the above embodiment, the acquisition circuit includes two voltage acquisition modules and two current acquisition modules, the two voltage acquisition modules are respectively arranged at the output ends of the power supply PW1 and the power supply PW2 to acquire voltage signals, the output ends of the two voltage acquisition modules are electrically connected with the processor MCU, the negative output end of the power supply PW1 and the negative output end of the power supply PW2 are respectively electrically connected with the input end of the corresponding output drive control circuit through the corresponding current acquisition module, and the output ends of the two current acquisition modules are electrically connected with the processor MCU.

[0031] In the above embodiment, the output drive control circuit comprises an output control module Q1 and an output control module Q2, the negative output end of the power supply PW1 is electrically connected with the input end of the output control module Q1 through a current collection module, the positive output end of the power supply PW1 is electrically connected with the output end of the output control module Q1, and the two input ends of the circuit breaker K2 are respectively electrically connected with the output end of the output control module Q1, the negative output end of the power supply PW2 is electrically connected with the input end of the output control module Q2 through a current collection module, and the positive output end of the power supply PW2 is electrically connected with the output end of the output control module Q2, and the two input ends of the circuit breaker K2 are respectively electrically connected with the output end of the output control module Q2.

[0032] It should be noted that the output control module Q1 and the output control module Q2 each comprise two MOS tubes and a drive circuit for controlling the two MOS tubes.

[0033] In the above embodiment, the parallel control circuit comprises a relay K3, the control signal input end of the relay K3 is electrically connected with the control signal output end of the processor MCU, the two current sharing ends of the power supply PW2 are respectively electrically connected with the two common ends of the relay K3, and the two normally open ends of the relay K3 are respectively electrically connected with the two current sharing ends of the power supply PW1.

[0034] Working principle, when the input voltage is connected, the processor MCU controls the output control module Q1 and the output control module Q2 to work in the diode mode, first enters the parallel preparation working state in the diode mode, the processor MCU collects the output voltages of the power supply PW1 and the power supply PW2, and controls the relay K3 to be closed when the output voltages are normal, and the output currents I1 and I2 of the two power supplies are close, the output control module Q1 and the output control module Q2 are all turned on, and the formal parallel working mode is entered; in the running state, the output currents I1 and I2 of the two power supplies are monitored in real time, if the deviation is large, one of the power supplies has failed, the output control module Q1 and the output control module Q2 will be adjusted to the diode working state immediately, and the relay K3 is controlled to be disconnected, and the parallel working mode is exited, at this time, the output voltages of the power supply PW1 and the power supply PW2 are detected again, if one of the voltages is abnormal and the other voltage is normal, the power supply with the abnormal voltage is marked as a fault, and the parallel working mode is not entered again, if all the voltages are normal, a certain time delay is performed, and the parallel working is tried again, if the parallel working fails, the power supply with the abnormal output current is determined according to the output current of the power supply in this process, and the parallel working is not tried again.

[0035] The above is only a preferred embodiment of the utility model, and does not limit the implementation and protection scope of the utility model, and those skilled in the art should realize that any equivalent replacement and obvious change obtained by applying the content of the utility model should be included in the protection scope of the utility model.

Claims

1. A dual-power parallel control circuit, characterized in that: This includes the acquisition circuit, output drive control circuit, parallel operation control circuit, system auxiliary power supply, and processor MCU; The acquisition circuit determines the operating status of the power supply by detecting the voltage and current output by the power supply. The output drive control circuit controls the on / off state of the output by controlling the switching of the MOS through the gate drive chip. The parallel operation control circuit controls the connection and disconnection of the parallel operation line by controlling the relay; The system auxiliary power supply provides power to the entire system. The processor MCU performs corresponding control based on the relevant information collected by the acquisition circuit.

2. The dual-power parallel control circuit according to claim 1, characterized in that: It also includes circuit breakers K1 and K2, power supplies PW1 and PW2. External inputs are electrically connected to the two input terminals of power supply PW1 after passing through circuit breaker K1. External inputs are also electrically connected to the two input terminals of power supply PW2 after passing through circuit breaker K1. Both output terminals of power supply PW1 are electrically connected to a module of the system's auxiliary power supply. The two output terminals of power supply PW1 are sequentially connected to the input terminals of circuit breaker K2 after passing through the acquisition circuit and the output drive control circuit. The two output terminals of power supply PW2 are sequentially connected to... The acquisition circuit and the output drive control circuit are electrically connected to the input terminal of the circuit breaker K2. The output terminal of the circuit breaker K2 serves as the system output terminal. The output terminal of the acquisition circuit is electrically connected to the signal input terminal of the processor MCU. The control signal output terminal of the processor MCU is electrically connected to the input terminal of the parallel control circuit. The output terminal of the parallel control circuit is electrically connected to the current sharing terminal of the power supply PW1 and the current sharing terminal of the power supply PW2, respectively. The drive signal output terminal of the processor is electrically connected to the control input terminal of the output drive control circuit.

3. The dual-power parallel control circuit according to claim 2, characterized in that: The acquisition circuit includes two voltage acquisition modules and two current acquisition modules. The two voltage acquisition modules are respectively located at the output terminals of power supplies PW1 and PW2 to acquire voltage signals. The output terminals of both voltage acquisition modules are electrically connected to the processor MCU. The negative output terminals of power supplies PW1 and PW2 are respectively electrically connected to the input terminals of the corresponding output drive control circuits through the corresponding current acquisition modules. The output terminals of both current acquisition modules are electrically connected to the processor MCU.

4. The dual-power parallel control circuit according to claim 3, characterized in that: The output drive control circuit includes an output control module Q1 and an output control module Q2. The negative output terminal of the power supply PW1 is electrically connected to the input terminal of the output control module Q1 after passing through the current acquisition module. The positive output terminal of the power supply PW1 and the output terminal of the output control module Q1 are respectively electrically connected to the two input terminals of the circuit breaker K2. The negative output terminal of the power supply PW2 is electrically connected to the input terminal of the output control module Q2 after passing through the current acquisition module. The positive output terminal of the power supply PW2 and the output terminal of the output control module Q2 are respectively electrically connected to the two input terminals of the circuit breaker K2.

5. The dual-power parallel control circuit according to claim 4, characterized in that: The parallel control circuit includes a relay K3. The control signal input terminal of the relay K3 is electrically connected to the control signal output terminal of the processor MCU. The two current sharing terminals of the power supply PW2 are respectively electrically connected to the two common terminals of the relay K3. The two normally open terminals of the relay K3 are respectively electrically connected to the two current sharing terminals of the power supply PW1.

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