Power tube junction capacitance test circuit and device
By designing a power transistor junction capacitance test circuit and integrating different test circuits through switching, the problem of low testing efficiency of power devices in the existing technology is solved, and fast and efficient testing of power transistor junction capacitance parameters is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-10
- Publication Date
- 2026-03-31
AI Technical Summary
Existing power device junction capacitance testing equipment requires the power transistor to be repositioned in different circuits, resulting in low testing efficiency and long testing time.
By designing a power transistor junction capacitance test circuit, different test circuits are switched using a switch, and the test is completed in the same test circuit. The circuit includes a test power supply, a drain-source capacitance switching branch, a gate capacitance switching branch, a first switching branch, and a second switching branch. The circuit state switching is controlled by a relay switch and a control unit.
It enables rapid and efficient testing of power transistor junction capacitance parameters within the same test circuit, reducing switching time and improving testing efficiency and speed.
Smart Images
Figure CN224066896U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic circuit technology, and in particular to a power transistor junction capacitance testing circuit and device. Background Technology
[0002] The core of power semiconductors is the PN junction. When N-type and P-type semiconductors are combined, a space charge region, also known as a depletion layer, is formed on both sides of the junction. When the voltage across the PN junction changes, the charge in this space charge region also changes. Furthermore, the diffusion of electrons in the N-region and holes in the P-region due to their concentration difference also creates a charge storage effect on both sides of the PN junction. These factors combined result in parasitic capacitance within any semiconductor power device. The parasitic capacitance of a MOSFET is a dynamic parameter that directly affects its switching performance. Therefore, to understand the relevant switching performance, it is necessary to test the junction capacitance of the power device.
[0003] Existing equipment for testing junction capacitance, such as the test system disclosed in patent publication number "CN218956687U" entitled "A power device junction capacitance test system", uses different circuits and PCB boards for installation and testing when testing junction capacitance parameters (i.e., CISS, COSS, CRSS). When the same power transistor is being tested, it needs to be placed in different test circuits, which has the disadvantages of low efficiency and long time consumption.
[0004] Therefore, a simple, fast, and efficient circuit is needed to test the junction capacitance parameters of power transistors. Utility Model Content
[0005] To address the shortcomings of existing technologies, this invention provides a power transistor junction capacitance testing circuit and device, which uses a circuit switch to switch between different test circuits required for testing the junction capacitance of a power transistor.
[0006] This utility model discloses a power transistor junction capacitance testing circuit through embodiments, including a test power supply, a drain-source capacitance switching branch, a gate capacitance switching branch, a first switching branch, and a second switching branch. The positive terminal of the test power supply is electrically connected to the drain of the MOSFET under test, and the negative terminal of the test power supply is electrically connected to the source of the MOSFET under test. The drain-source capacitance switching branch includes a first switch and a third capacitor connected in series, and the drain and source of the MOSFET under test are connected through the two ends of the drain-source capacitance switching branch. The gate capacitance switching branch is used to select whether a second capacitor is connected in series between the gate of the MOSFET under test and the first interface of the external test device, and also to control whether the gate and source of the MOSFET under test are connected. The first switching branch includes a third switch and a first capacitor connected in series, and the drain of the MOSFET under test is connected to the second interface of the external test device through the two ends of the first switching branch. The second switching branch is used to switch between controlling whether the second and third interfaces of the external test device are connected to the source of the MOSFET under test.
[0007] Furthermore, the gate capacitance switching branch includes: a second capacitor, a second switch, a fourth switch, and a sixth switch. The two ends of the second switch are respectively connected to the gate of the MOSFET under test and the first interface of the external testing device; the two ends of the fourth switch are respectively connected to the source of the MOSFET under test and the first interface of the external testing device; the second capacitor and the sixth switch are connected in series between the gate of the MOSFET under test and the first interface of the external testing device.
[0008] Furthermore, this power transistor junction capacitance test circuit also includes an AC test signal generation circuit, the output of which is connected via the connection point of the second and fourth switches. The AC test signal generation circuit is used to generate the AC signal required for testing the power transistor, thus satisfying the test conditions.
[0009] Furthermore, the second switching branch includes a seventh switch and a fifth switch; the two ends of the seventh switch are respectively connected to the source of the MOSFET under test and the second interface of the external test device; the two ends of the fifth switch are respectively connected to the source of the MOSFET under test and the third interface of the external test device.
[0010] Furthermore, this power transistor junction capacitance test circuit also includes a test fixture, which includes a first connection port, a second connection port, and a third connection port; the first connection port, the second connection port, and the third connection port are respectively connected to the drain, source, and gate of the MOSFET under test. During testing, the power transistor under test can be placed on the test fixture.
[0011] Furthermore, this power transistor junction capacitance test circuit also includes a first resistor. One end of the first resistor is connected to the drain of the MOSFET under test, and the other end is connected to the positive terminal of the test power supply. The resistor is used for current limiting, providing an effective bias voltage to the device under test, and simultaneously preventing the device under test from conducting or short-circuiting, thus protecting the circuit.
[0012] Furthermore, this power transistor junction capacitance test circuit also includes a second resistor. One end of the second resistor is connected to the source of the MOSFET under test, and the other end is connected to the negative terminal of the test power supply. The resistor is used for current limiting to prevent the device under test from conducting or short-circuiting, thereby preventing damage to the equipment and protecting the circuit.
[0013] Furthermore, the testing device is an LCR tester, and the corresponding AC test signal generation circuit is the built-in circuit of the LCR tester.
[0014] Furthermore, one or more of the first switch, second switch, third switch, fourth switch, fifth switch, sixth switch, and seventh switch are relay switches. Correspondingly, a control unit is also included, and the output of the control unit is connected to the trigger coil of the corresponding relay via a drive circuit.
[0015] To achieve the above objectives, this utility model also provides a power transistor junction capacitance testing device, including the aforementioned power transistor junction capacitance testing circuit, and further including a voltage source with adjustable output voltage, the voltage source serving as the test power supply for the power transistor junction capacitance testing circuit.
[0016] Compared with the prior art, the present invention has the following advantages: In the same test circuit, the circuit required to test different junction capacitances of power transistors can be realized by switching the switch, which overcomes the defect of the prior art that requires a PCB circuit board to realize the function, and has the characteristics of low cost, high efficiency and short time consumption. Attached Figure Description
[0017] To more clearly illustrate the technical solution of this utility model and facilitate a further understanding of its technical effects, features, and objectives, the utility model will be described in detail below with reference to the accompanying drawings. The drawings constitute an essential part of the specification and are used together with the embodiments of this utility model to illustrate its technical solution, but do not constitute a limitation on this utility model.
[0018] Figure 1 This is a schematic diagram of the power transistor junction capacitance test circuit in an embodiment of this utility model;
[0019] Figure 2 This is a circuit diagram for testing the input capacitor CISS of the power transistor in an embodiment of this utility model;
[0020] Figure 3 This is a circuit diagram for testing the output capacitor COSS of the power transistor in an embodiment of this utility model;
[0021] Figure 4 This is a circuit diagram for testing the reverse transfer capacitor CRSS of the power transistor in an embodiment of this utility model. Detailed Implementation
[0022] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Of course, the specific embodiments described below are only for explaining the technical solutions of the present invention, and not for limiting the present invention. Furthermore, the parts described in the embodiments or drawings are merely illustrative examples of relevant parts of the present invention, and not the entirety of the present invention. At the same time, all other embodiments obtained by those skilled in the art based on the embodiments of the present invention should naturally fall within the protection scope of the present invention.
[0023] like Figure 1 In the embodiment shown, the power transistor under test is a MOSFET, and the external testing device is an LCR tester. The LCR tester includes an AC test signal generation circuit, as shown in the figure. The test circuit includes a test power supply, a drain-source capacitance switching branch, a gate capacitance switching branch, a first switching branch, and a second switching branch. In this circuit, the positive terminal VCC of the test power supply is electrically connected to the drain (D) of the MOSFET under test, and the negative terminal GND of the test power supply is electrically connected to the source (S) of the MOSFET under test. The drain-source capacitance switching branch includes a first switch SW1 and a third capacitor C3 connected in series. The drain (D) and source (S) of the MOSFET under test are connected through the two ends of the drain-source capacitance switching branch. The gate capacitance switching branch is used to select whether a second capacitor C2 is connected in series between the gate (G) of the MOSFET under test and the first interface of the external test device (i.e., the HIGH interface of the LCR tester shown in the figure), and is also used to control whether the gate (G) and source (S) of the MOSFET under test are connected. The first switching branch includes a third switch SW3 and a first capacitor C1 connected in series. The drain (D) of the MOSFET under test is connected to the second interface of the external test device (i.e., the LOW interface of the LCR tester shown in the figure) through the two ends of the first switching branch. The second switching branch is used to switch between the second and third interfaces of the external test device (i.e., the COMMON interface of the LCR tester shown in the figure) and the source (S) of the MOSFET under test. In use, by controlling the switching of the drain-source capacitance switching branch, the gate capacitance switching branch, the first switching branch, and the second switching branch, the circuit required for testing different junction capacitances of the power transistor under test can be realized. There is no need to reconnect each circuit or replace other test circuits, which reduces switching time and improves test efficiency and speed.
[0024] In this embodiment, the gate capacitance switching branch includes: a second capacitor C2, a second switch SW2, a fourth switch SW4, and a sixth switch SW6. The two ends of the second switch SW2 are respectively connected to the gate G of the MOSFET under test and the first interface of the external testing device (i.e., the HIGH interface of the LCR tester shown in the figure); the two ends of the fourth switch SW4 are respectively connected to the source S of the MOSFET under test and the first interface of the external testing device; the second capacitor C2 and the sixth switch SW6 are connected in series between the gate G of the MOSFET under test and the first interface of the external testing device.
[0025] In this embodiment, the second switching branch includes a seventh switch SW7 and a fifth switch SW5; the two ends of the seventh switch SW7 are respectively connected to the source S of the MOSFET under test and the second interface of the external testing device (i.e., the LOW interface of the LCR tester shown in the figure); the two ends of the fifth switch SW5 are respectively connected to the source S of the MOSFET under test and the third interface of the external testing device (i.e., the COMMON interface of the LCR tester shown in the figure).
[0026] In this embodiment, a first resistor R1 and a second resistor R2 are also included. One end of the first resistor R1 is connected to the drain (D) of the MOSFET under test, and the other end of the first resistor R1 is connected to the positive terminal (VCC) of the test power supply. One end of the second resistor R2 is connected to the source (S) of the MOSFET under test, and the other end of the second resistor R2 is connected to the negative terminal (GND) of the test power supply. The resistors are used for current limiting, providing an effective bias voltage to the device under test, and preventing the device under test from conducting or short-circuiting, thus protecting the equipment and acting as a circuit protector.
[0027] In this embodiment, the first switch SW1, the second switch SW2, the third switch SW3, the fourth switch SW4, the fifth switch SW5, the sixth switch SW6, and the seventh switch SW7 are relay switches. They are connected to the trigger coils of the corresponding relays via a drive circuit through a control unit to control the switching states.
[0028] The following is combined Figure 2-4 The test circuit in the embodiment is described below:
[0029] The LCR tester uses an AC signal as the test signal. AC signals have stable amplitude and period, making them convenient for measuring electrical characteristics. The frequency of the test signal can be adjusted within a certain range to accommodate the characteristics of different components under test. The conditions for testing parasitic capacitance are: VGS = 0, VDS = BVDSS / 2, f = 1MHz. In the following examples, the power transistor under test is a MOSFET, and the junction capacitances of the power transistor under test are: input capacitance CISS = CGS + CGD; output capacitance: COSS = CDS + CGD; reverse transfer capacitance: CRSS = CGD. The following explanation of the circuit's use is based on the testing methods for these three junction capacitances.
[0030] The principle for testing different junction capacitance parameters is as follows:
[0031] I. Measuring Input Capacitance (CISS)
[0032] The input capacitance CISS is calculated as: CISS = (CGS + CGD) * (CGS + CGD). Capacitor C3 is used to connect the drain (D) and source (S) of the MOSFET under test, analogous to shorting the drain (D) and source (S) of the MOSFET. Capacitor C3 provides DC voltage regulation and AC test signal transmission. The drain of the MOSFET is connected to the power supply. The gate (G) and source (S) of the MOSFET are connected to the two ends of the LCR tester. The LCR bridge tester is set to test capacitance, and the corresponding frequency band is selected for testing. In this circuit, the stored capacitance of the device under test is CGS + CGD. When the first switch SW1, the sixth switch SW6, and the seventh switch SW7 are closed, and the second switch SW2, the third switch SW3, the fourth switch SW4, and the fifth switch SW5 are opened, the following is formed: Figure 2 The equivalent circuit shown is a CISS input capacitance test circuit diagram, and the measured parameters are the CISS parameters of the MOSFET under test.
[0033] II. Measuring the output capacitance COSS
[0034] The output capacitance COSS is calculated as follows: COSS = Drain-Source Capacitance CDS + Gate-Drain Capacitance CGD. Short-circuit the gate (G) and source (S) of the MOSFET under test. Connect the drain (D) of the MOSFET to the power supply. Connect the drain (D) of the MOSFET and the short-circuited gate (G) and source (S) to the two ends of the LCR meter. Set the test parameters. This connection method measures the capacitance value as CGD + CDS. Close the second switch SW2, the third switch SW3, and the fourth switch SW4, and open the first switch SW1, the fifth switch SW5, the sixth switch SW6, and the seventh switch SW7, forming the following configuration: Figure 3 The equivalent circuit shown is a COSS output capacitance test circuit diagram, and the measured parameters are the COSS parameters of the device under test.
[0035] III. Measuring the reverse transfer capacitance CRSS
[0036] To measure the reverse transfer capacitance CRSS, which equals the gate-drain capacitance CGD, connect the drain (D) of the device under test (DUT) to the power supply. Connect the drain (D) and gate (G) of the DUT to the two ends of the LCR meter, respectively. The source (S) shares a common ground with the LCR meter. Set the test parameters. This connection method is for measuring the capacitance value of CGD. Close the second switch SW2, the third switch SW3, and the fifth switch SW5, and open the first switch SW1, the fourth switch SW4, the sixth switch SW6, and the seventh switch SW7, forming the following configuration: Figure 4 The equivalent circuit shown is a CRSS reverse transfer capacitance test circuit, and the measured parameters are the CRSS parameters of the device under test.
[0037] To achieve the above objectives, this utility model also provides a power transistor junction capacitance testing device, including the aforementioned power transistor junction capacitance testing circuit, and further including a voltage source with adjustable output voltage, wherein the voltage source serves as the test power supply for the power transistor junction capacitance testing circuit.
[0038] Of course, it should be noted that the above embodiments are only for more clearly illustrating the technical solution of this utility model. Those skilled in the art can understand that the implementation of this utility model is not limited to the above content. Any obvious changes, substitutions or replacements made based on the above content do not exceed the scope of the technical solution of this utility model. Other implementations will naturally fall within the scope of this utility model without departing from the concept of this utility model.
Claims
1. A power tube junction capacitance test circuit, characterized by: The test power supply, the drain-source capacitance switching branch, the gate capacitance switching branch, the first switching branch and the second switching branch are included. The positive pole of the test power supply is electrically connected with the drain of the MOS transistor to be tested, and the negative pole of the test power supply is electrically connected with the source of the MOS transistor to be tested. The drain-source capacitance switching branch includes a first switch and a third capacitor connected in series, and the drain and the source of the MOS transistor to be tested are connected with two ends of the drain-source capacitance switching branch. The gate capacitance switching branch is used for selecting whether a second capacitor is connected in series on a circuit between the gate of the MOS transistor to be tested and a first interface of an external test device, and is also used for controlling whether the gate and the source of the MOS transistor to be tested are connected. The first switching branch includes a third switch and a first capacitor connected in series, and the drain of the MOS transistor to be tested is connected with a second interface of the external test device through two ends of the first switching branch. The second switching branch is used for switching and controlling whether the second interface and a third interface of the external test device are connected with the source of the MOS transistor to be tested.
2. The power junction capacitance test circuit of claim 1, wherein: The gate capacitance switching branch includes a second capacitor, a second switch, a fourth switch and a sixth switch. Two ends of the second switch are respectively connected with the gate of the MOS transistor to be tested and the first interface of the external test device. Two ends of the fourth switch are respectively connected with the source of the MOS transistor to be tested and the first interface of the external test device. The second capacitor and the sixth switch are connected in series between the gate of the MOS transistor to be tested and the first interface of the external test device.
3. The power junction capacitance test circuit of claim 1, wherein: The output of the alternating-current test signal generation circuit is connected through a connection point of the second switch and the fourth switch.
4. The power junction capacitance test circuit of claim 1, wherein: The second switching branch includes a seventh switch and a fifth switch. Two ends of the seventh switch are respectively connected with the source of the MOS transistor to be tested and the second interface of the external test device. Two ends of the fifth switch are respectively connected with the source of the MOS transistor to be tested and the third interface of the external test device.
5. The power junction capacitance test circuit of claim 1, wherein: The test fixture includes a first connection port, a second connection port and a third connection port, and the first connection port, the second connection port and the third connection port are respectively connected with the drain, the source and the gate of the MOS transistor to be tested.
6. The power junction capacitance test circuit of claim 1, wherein: The test fixture further includes a first resistor, one end of the first resistor is connected with the drain of the MOS transistor to be tested, and the other end of the first resistor is connected with the positive pole of the test power supply.
7. The power junction capacitance test circuit of claim 1, wherein: The test fixture further includes a second resistor, one end of the second resistor is connected with the source of the MOS transistor to be tested, and the other end of the second resistor is connected with the negative pole of the test power supply.
8. The power junction capacitance test circuit of claim 3, wherein: The test device is an LCR tester, and correspondingly, the alternating-current test signal generation circuit is a built-in circuit of the LCR tester.
9. The power tube junction capacitance test circuit of any one of claims 1-7, wherein: One or more of the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch and the seventh switch is a relay switch, and correspondingly, the test fixture further includes a control unit, and an output of the control unit is connected with a trigger coil of the corresponding relay through a driving circuit.
10. A power tube junction capacitance testing apparatus comprising the power tube junction capacitance testing circuit according to any one of claims 1 to 9, characterized by: The test fixture further includes a voltage source with adjustable output voltage, and the voltage source serves as the test power supply of the power tube junction capacitance test circuit.