TYPE-C input identification distribution power circuit

By introducing the main control chip U1 and ESD protection circuit into the TYPE-C interface, the compatibility problem caused by the diversity of power supply current of the TYPE-C interface is solved, and stable connection and voltage and current matching with different devices are achieved, improving the versatility and adaptability of the circuit.

CN224109796UActive Publication Date: 2026-04-10ZHONGSHAN BAOLIJIN ELECTRONICS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-07-28
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

The existing TYPE-C interface has a variety of power supply currents, which need to be identified and adjusted to avoid overload. However, it has poor versatility and usually relies on integrated circuits, resulting in insufficient adaptability.

Method used

The main control chip U1 is connected to the interface terminal USB1, which integrates ESD protection circuit and discharge circuit. The input voltage range is identified through the detection terminal, and the output matching voltage and current are output to realize bidirectional connection of handshake protocol and improve versatility.

Benefits of technology

It achieves universal connection between the TYPE-C interface and devices with different power levels, and improves the adaptability and stability of the circuit through the detection and output matching of the main control chip.

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Abstract

The utility model discloses a TYPE-C input identification distribution power circuit, comprising an interface terminal USB1 and a main control chip U1, an output end, a sampling end and a detection end of the main control chip U1 are respectively connected with the interface terminal USB1, and an ESD protection circuit is connected between the detection end and the interface terminal USB1; and the main control chip U1 is connected with a bleeder circuit. When the interface terminal USB1 is connected with external equipment, the detection end of the main control chip U1 detects the input voltage on the interface terminal USB1, determines the output power of the TYPE-C according to the voltage range of the input voltage, and then outputs matched voltage and current through the output end, so that the interface terminal USB1 can be connected with equipment with different powers, and the universality is improved.
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Description

TECHNICAL FIELD

[0001] The utility model relates to a power supply device, in particular to a TYPE-C input identification distribution power circuit. BACKGROUND

[0002] TYPE-C is a kind of USB interface that is more popular in current industry, and it is also the development direction of I / O (Input / Output) interface of subsequent computer, mobile phone and other terminal equipment, TYPE-C can support positive and negative two sides plug, and the signal of transmission data is stronger.But, TYPE-C power supply is various, and there are 5V3A / 9V3A / 12V2.5A and multiple currents of various adapters input, the load capacity of different power supply currents is different, often need to identify input voltage and current to adjust output to prevent overload, and the realization of identification is usually realized using integrated circuit supporting corresponding protocol, and the universality is poor. UTILITY MODEL CONTENTS

[0003] In order to overcome the deficiencies of the prior art, the utility model provides a TYPE-C input identification distribution power circuit.

[0004] The technical scheme adopted by the utility model to solve its technical problems is:

[0005] A TYPE-C input identification distribution power circuit, including interface terminal USB1 and main control chip U1, the output end, sampling end and detection end of the main control chip U1 are connected with the interface terminal USB1, and ESD protection circuit is connected between the detection end and interface terminal USB1;The main control chip U1 is connected with discharge circuit.

[0006] As a further improvement of the utility model, the 11th pin of the main control chip U1 is divided into two paths, one path is connected with the 13th pin-16th pin of interface terminal USB1 simultaneously, and the other path is connected with the 6th pin-9th pin of interface terminal USB1 simultaneously, the 10th pin of the main control chip U1 is divided into two paths, one path is grounded, and the other path is connected with the 11th pin through resistance RS1, and the 10th pin and the 11th pin of the main control chip U1 are sampling end.

[0007] As a further improvement of the utility model, the output end of the main control chip U1 is connected with the interface terminal USB1 through the field effect tube Q2, the 23rd pin of the main control chip U1 is connected with the 2nd pin of the field effect tube Q2, the 3rd pin of the field effect tube Q2 is connected with the 1st pin-4th pin of the interface terminal USB1 simultaneously, the 2nd pin and the 3rd pin of the field effect tube Q2 are connected with the resistance R22, the 24th pin of the main control chip U1 is divided into two ways, one way is grounded through the capacitor C14, the other way is connected with the 1st pin of the field effect tube Q2 through the resistance R21, the 22nd pin of the main control chip U1 is connected with the 3rd pin of the field effect tube Q2 through the resistance R21.

[0008] As a further improvement of the utility model, the ESD protection circuit includes the capacitor C19, the resistance R24-resistance R27 and the surge protection diode ZD2-surge protection diode ZD7, the 17th pin of the main control chip U1 is divided into two ways, one way is grounded through the capacitor C19, the other way is connected with the 5th pin of the interface terminal USB1 through the resistance R24, the 16th pin of the main control chip U1 is connected with the 6th pin and the 7th pin of the interface terminal USB1 through the resistance R25 respectively, the 15th pin of the main control chip U1 is connected with the 8th pin and the 9th pin of the interface terminal USB1 through the resistance R26 respectively, the 14th pin of the main control chip U1 is divided into two ways, one way is grounded through the capacitor C17, the other way is connected with the 10th pin of the interface terminal USB1 through the resistance R27, one end of the surge protection diode ZD2-surge protection diode ZD7 is connected with the output end of the interface terminal USB1 simultaneously, the other end is connected with the 17th pin-14th pin of the main control chip U1 respectively, the 14th pin-17th pin of the main control chip U1 is the detection end.

[0009] As a further improvement of the utility model, the bleed circuit includes the field effect tube Q1, the 2nd pin of the 2nd pin of the field effect tube Q1 is connected with the 7th pin of the main control chip U1, the 3rd pin of the field effect tube Q1 is grounded, the resistance R16 is connected between the 2nd pin and the 3rd pin of the field effect tube Q1, the 1st pin of the field effect tube Q1 is connected with the 1st pin of the field effect tube Q2 through the resistance R14.

[0010] The utility model discloses a beneficial effect is: the utility model discloses an interface terminal USB1 and main control chip U1, the output of main control chip U1, sampling end and detection end are connected with interface terminal USB1 respectively, when interface terminal USB1 is connected with external device, the detection end of main control chip U1 detects the input voltage on interface terminal USB1, and according to the voltage range that input voltage is in determines TYPE -C's output power, then through the output of matching voltage and current, makes interface terminal USB1 can be connected with different power equipment and passes through the handshake agreement bidirectional connection, improves versatility. BRIEF DESCRIPTION OF DRAWINGS

[0011] The utility model is further explained below in combination with the drawings and embodiments.

[0012] Figure 1 It is the circuit schematic diagram of the utility model. DETAILED DESCRIPTION

[0013] In order to make the purpose, technical scheme and advantage of the utility model more clear and apparent, the utility model is further explained in detail below in combination with specific embodiment and referring to the drawings. It needs to be explained that the embodiment of the utility model and the feature in the embodiment can be combined mutually in the case of not conflicting.

[0014] It is understood that these descriptions are only exemplary, and not to limit the scope of the utility model.

[0015] The utility model discloses some embodiments in combination with the drawings below.

[0016] Referring to Figure 1 A TYPE-C input identification distribution power circuit, including interface terminal USB1 and main control chip U1, the output of main control chip U1, sampling end and detection end are connected with interface terminal USB1 respectively, and ESD protection circuit is connected between the detection end and interface terminal USB1, main control chip U1 is connected with the bleed circuit. In the utility model, when interface terminal USB1 is connected with external device, the detection end of main control chip U1 detects the input voltage on interface terminal USB1, and according to the voltage range that input voltage is in determines TYPE -C's output power, then through the output of matching voltage and current, makes interface terminal USB1 can be connected with different power equipment and passes through the handshake agreement bidirectional connection of main control chip U1, improves versatility.

[0017] In this embodiment, the main control chip U1 adopts the model IP2723TH, which is a fast charging protocol IC integrated with multiple protocols for USB output port. It supports multiple fast charging protocols and provides a complete TYPE-C solution for one-way output applications such as adapters and car chargers. IP2723TH has the functions of automatically detecting the insertion and removal of TYPE-C devices, automatically detecting the fast charging request corresponding to the voltage on DP and DM, and adjusting the control output voltage.

[0018] The 11th pin of the main control chip U1 is connected to the 13th pin-16th pin of the interface terminal USB1 through two paths, and the 6th pin-9th pin of the interface terminal USB1 through another two paths. The 10th pin of the main control chip U1 is connected to the ground through one path and connected to the 11th pin through the resistance RS1 through another path. The 10th pin and the 11th pin of the main control chip U1 are sampling ends. In this embodiment, the 10th pin of the main control chip U1 is the negative end of current sampling, and the 11th pin is the positive end of current sampling. The input current on the interface terminal USB1 is measured, and the output power of TYPE-C is determined according to the power range of the input current and input voltage, and then the matching voltage and current are output through the output end.

[0019] The output end of the main control chip U1 is connected to the interface terminal USB1 through the field effect tube Q2. The 23rd pin of the main control chip U1 is connected to the 2nd pin of the field effect tube Q2. The 3rd pin of the field effect tube Q2 is connected to the 1st pin-4th pin of the interface terminal USB1. The 2nd pin and the 3rd pin of the field effect tube Q2 are connected to the resistance R22. The 24th pin of the main control chip U1 is connected to the ground through the capacitor C14 through one path and connected to the 1st pin of the field effect tube Q2 through the resistance R21 through another path. The 22nd pin of the main control chip U1 is connected to the 3rd pin of the field effect tube Q2 through the resistance R21. In this embodiment, the 24th pin of the main control chip U1 is the power input pin, and the VIN in the figure is the output voltage of the power chip in the prior art, which provides power for the chip and provides output voltage for the interface terminal USB1. The 23rd pin of the main control chip U1 is the control pin, which controls the conduction / cutoff of the field effect tube Q2 through the 23rd pin, so as to make the output voltage VIN power supply for the interface terminal USB1. The 22nd pin of the main control chip U1 is the power detection pin, which detects whether it is in the power supply state.

[0020] As a further improvement of the utility model, the ESD protection circuit includes capacitor C19, resistance R24-resistance R27 and surge protection diode ZD2-surge protection diode ZD7, the 17th pin of main control chip U1 is divided into two ways, one way passes through capacitor C19 and is grounded, and the other way is connected with the 5th pin of interface terminal USB1 through resistance R24, the 16th pin of main control chip U1 is connected with the 6th pin and the 7th pin of interface terminal USB1 through resistance R25 respectively, the 15th pin of main control chip U1 is connected with the 8th pin and the 9th pin of interface terminal USB1 through resistance R26 respectively, the 14th pin of main control chip U1 is divided into two ways, one way passes through capacitor C17 and is grounded, and the other way is connected with the 10th pin of interface terminal USB1 through resistance R27, one end of surge protection diode ZD2-surge protection diode ZD7 is connected with the output end of interface terminal USB1 simultaneously, and the other end is connected with the 17th pin-14th pin of main control chip U1 respectively, and the 14th pin-17th pin of main control chip U1 is detection end.

[0021] In the utility model, the ESD protection circuit can prevent static electricity and surge, improve circuit anti-interference and anti-damage ability, and make transmission signal more stable.

[0022] In the embodiment, main control chip U1 is integrated with discharge circuit, when output voltage needs to be discharged quickly, internal 400ohm pull-down resistance is started, when internal discharge does not meet the requirement, external discharge circuit of main control chip U1 can be used, and the discharge circuit includes field effect transistor Q1, the 2nd pin of the 2nd pin of field effect transistor Q1 is connected with the 7th pin of main control chip U1, the 3rd pin of field effect transistor Q1 is grounded, resistance R16 is connected between the 2nd pin and the 3rd pin of field effect transistor Q1, and the 1st pin of field effect transistor Q1 is connected with the 1st pin of field effect transistor Q2 through resistance R14.

[0023] The 5th pin of main control chip U1 is the driving output end of feedback loop and is output through resistance R15, as Figure 1The middle OPTO is connected with the feedback pin of the power supply chip in the prior art, and is used for setting the output voltage; the second pin of the main control chip U1 is used for voltage compensation in the optical coupling isolation mode, and the capacitor C11 and the resistor R18 are connected between the second pin and the fifth pin; the third pin of the main control chip U1 is used for current compensation in the voltage division mode, and the capacitor C10 and the resistor R19 are connected between the third pin and the fifth pin.

[0024] Although the embodiments of the utility model have been shown and described, those skilled in the art can understand that various changes, modifications, replacements and variations can be made to these embodiments without departing from the principles and purposes of the utility model, and the scope of the utility model is defined by the claims and their equivalents.

Claims

1. A TYPE-C input identification power distribution circuit, characterized in that Interface terminal USB1 and host chip U1 are included, the output end, sampling end and detection end of the host chip U1 are connected with the interface terminal USB1 respectively, and an ESD protection circuit is connected between the detection end and the interface terminal USB1; the host chip U1 is connected with a discharge circuit.

2. The TYPE-C input identification power distribution circuit of claim 1, wherein The 11th pin of the host chip U1 is divided into two paths, one path is connected with the 13th pin-16th pin of the interface terminal USB1 simultaneously, and the other path is connected with the 6th pin-9th pin of the interface terminal USB1 simultaneously, the 10th pin of the host chip U1 is divided into two paths, one path is grounded, and the other path is connected with the 11th pin through the resistor RS1, and the 10th pin and the 11th pin of the host chip U1 are sampling ends.

3. The TYPE-C input identification power distribution circuit of claim 1, wherein The output end of the host chip U1 is connected with the interface terminal USB1 through the field effect transistor Q2, the 23rd pin of the host chip U1 is connected with the 2nd pin of the field effect transistor Q2, the 3rd pin of the field effect transistor Q2 is connected with the 1st pin-4th pin of the interface terminal USB1 simultaneously, the 2nd pin and the 3rd pin of the field effect transistor Q2 are connected with the resistor R22, the 24th pin of the host chip U1 is divided into two paths, one path is grounded through the capacitor C14, and the other path is connected with the 1st pin of the field effect transistor Q2 through the resistor R21, and the 22nd pin of the host chip U1 is connected with the 3rd pin of the field effect transistor Q2 through the resistor R21.

4. The TYPE-C input identification power distribution circuit of claim 1, wherein The ESD protection circuit includes the capacitor C19, the resistor R24-resistor R27 and the surge protection diode ZD2-surge protection diode ZD7, the 17th pin of the host chip U1 is divided into two paths, one path is grounded through the capacitor C19, and the other path is connected with the 5th pin of the interface terminal USB1 through the resistor R24, the 16th pin of the host chip U1 is connected with the 6th pin and the 7th pin of the interface terminal USB1 through the resistor R25 respectively, the 15th pin of the host chip U1 is connected with the 8th pin and the 9th pin of the interface terminal USB1 through the resistor R26 respectively, the 14th pin of the host chip U1 is divided into two paths, one path is grounded through the capacitor C17, and the other path is connected with the 10th pin of the interface terminal USB1 through the resistor R27, one end of the surge protection diode ZD2-surge protection diode ZD7 is connected with the output end of the interface terminal USB1 simultaneously, and the other end is connected with the 17th pin-14th pin of the host chip U1 respectively; the 14th pin-17th pin of the host chip U1 are detection ends.

5. The TYPE-C input identification power distribution circuit of claim 1, wherein The discharge circuit includes the field effect transistor Q1, the 2nd pin of the 2nd pin of the field effect transistor Q1 is connected with the 7th pin of the host chip U1, the 3rd pin of the field effect transistor Q1 is grounded, the resistor R16 is connected between the 2nd pin and the 3rd pin of the field effect transistor Q1, and the 1st pin of the field effect transistor Q1 is connected with the 1st pin of the field effect transistor Q2 through the resistor R14.