Inspection device for semiconductor devices and clamping stage used for the inspection device

Abstract

Inspection device (1) for semiconductor devices, comprising: Probes (18, 19) for front electrodes (PA), probes (18, 19) for back electrodes (PB), a clamping step (2) which moves relative to the probes (18, 19) for front electrodes (PA) and the probes (18, 19) for back electrodes (PB), a wafer holding surface (α) which holds a wafer (W) to be examined, and a probe contact surface (β) which is conductive and covers an area which has the same size and shape as the largest wafer which is to be held on the wafer holding surface (α), wherein the wafer holding surface (α) and the probe contact surface (β) are formed close to each other on the upper surface of the clamping step (2) without these surfaces overlapping, wherein the wafer holding surface (α) has conductive contact sections that are in contact with the back of the wafer (W), and wherein the probe contact surface (β) is electrically connected to the conductive contact sections of the wafer holding surface (α), and wherein the probes (18, 19) for front electrodes (PA) and the probes (18, 19) for back electrodes (PB) are arranged such that a distance remains between them in the horizontal direction, so that the probes (18, 19) for back electrodes (PB) move relatively within the probe contact area (β) when the probes (18, 19) for front electrodes (PA) are moved relatively by the movement of the clamping step (2) within the tested wafer (W).

Description

Background of the invention 1. Field of the invention

[0001] The present invention relates to an inspection apparatus for semiconductor devices and to a clamping stage used for the inspection apparatus. More specifically, the present invention relates to an inspection apparatus that examines electrical characteristics of semiconductor devices that support electrodes on both sides of a wafer, and to a clamping stage suitable for the inspection apparatus. 2. Description of the state of the art

[0002] Power semiconductor devices, such as power transistors and IGBTs (Insulated Gate Bipolar Transistors), and other semiconductor devices, such as LEDs and semiconductor lasers, have electrodes on both sides of the wafer because they are designed to allow electrical currents to flow vertically to the chips. Therefore, it is necessary to place probes in contact with the surfaces on both sides of the wafer to examine the electrical properties of such semiconductor devices in the wafer state. Various inspection devices have been proposed to place probes in contact with the backside of the wafer directly beneath the semiconductor device under inspection.

[0003] For example, Japanese patent JP H05-333098 A describes an inspection apparatus for examining electrical properties of semiconductor devices having electrodes on both sides of a wafer, in which a plurality of probe heads are arranged in a clamp stage holding a wafer, the probe heads being arranged directly under the back of the device to be inspected and selectively connected to a tester.

[0004] In the inspection apparatus described in Japanese Patent JP H05-333098 A, it is necessary to shift the clamp stage relative to the probes positioned above the wafer in order to inspect all semiconductor devices formed on the wafer one by one. Therefore, the inspection apparatus requires relatively long cables to connect the testers to the probes arranged in the clamp stage. When the cables connecting the testers to the probes become long, spurious inductance of test leads formed by the cables becomes large, and it becomes difficult to obtain transient characteristics necessary for high-current inspection close to the actual performance of the semiconductor device under test and dynamic characteristic tests.For this reason, even if semiconductor devices pass the wafer-state inspection, a property defect is sometimes found in the final all-property inspection performed after the bonding, molding, and burn-in processes. If a property defect is detected in the final all-property inspection, the various processes performed after the wafer-state inspection become useless, leading to disadvantages such as increased manufacturing costs and increased waste volume.

[0005] On the other hand, Japanese Patent JP 2007-40926 A and Japanese Patent JP 2008-101944 A describe inspection devices in which a semiconductor device is placed on a conductive base larger than the semiconductor device, and in which back-side electrode probes are brought into contact with the exposed part of the base where no semiconductor device is located when front-side electrode probes are brought into contact with the front surface of the semiconductor device. The inspection devices described in the publications are not devices that inspect semiconductor devices in the wafer state, but an apparatus that inspects a semiconductor device is provided separately. Therefore, the publications do not provide any suggestion on how to accurately measure the characteristics of semiconductor devices with electrodes on both sides in the wafer state.

[0006] In view of the above-described situation, the present applicant has proposed in Japanese Patent JP 2011-138865 A an inspection apparatus for inspecting semiconductor devices in the wafer state, which includes a clamping stage and POGO pins electrically connected to the upper surface of the clamping stage and arranged at the outer edge of the clamping stage. The POGO pins are brought into contact with a clamping circuit board arranged above and connected to a tester, thereby aiming to shorten the length of a lead that electrically connects the back electrodes of a wafer to the tester. The inspection apparatus enables accurate measurement of electrical characteristics of semiconductor devices with electrodes on both sides of the wafer, for example, power semiconductor devices, in the wafer state, and is preferred.However, if an inspection device is proposed which is differently constructed but is capable of measuring accurately at the same or nearly the same level as the proposed inspection device, this is even more preferable.

[0007] DE 103 01 827 A1 discloses a measuring arrangement for testing semiconductor chips contained in a wafer, comprising a wafer carrier for holding a wafer, at least one test probe for contacting a chip on the top side of the wafer, and a measuring arrangement connected to the test probe. The wafer carrier has a series of recesses for inserting test probes so that they contact the chips on the back side of the wafer.

[0008] JP 2003-100821 A discloses a measuring arrangement with a probe card, wherein probes enter a wafer and the wafer is moved by means of a stage. The measuring arrangement has an ionizer for blowing ionized air into a passage to convey the wafer through the stage. The stage is provided with a conductive layer. When the wafer is brought to the measuring arrangement, ions are blown onto the wafer by the ionizer to remove static electricity from the wafer. The probe card is connected to an electrostatic measuring device to detect a charged or uncharged state. In the charged state, the stage is moved so that the conductive layer can come into contact with the probes.

[0009] The present invention was conceived in view of the above-described prior art situation. The object of the present invention is to provide a semiconductor device inspection apparatus that is simple in structure and capable of accurately measuring the characteristics of semiconductor devices having electrodes on both sides of a wafer in the wafer state, as well as a clamping stage used for the inspection apparatus. Summary of the invention

[0010] After carefully studying the problem, the present inventors have found that if the shape of a clamping stage is specially designed instead of relying on the POGO pins and the clamping circuit board described in Japanese Patent JP 2011-138865 A, it is possible to shorten an electrical path between a tester and probes with a simple structure and thereby realize accurate measurements of the electrical characteristics of semiconductor devices having electrodes on both sides of the wafer in the wafer state.

[0011] The present invention solves the above-described problem by proposing an inspection apparatus for semiconductor devices comprising: Front-side electrode probes, back-side electrode probes, a clamping stage that moves relative to the front-side electrode probes and the back-side electrode probes, a wafer holding area that holds a wafer to be inspected, and a probe contact area that is conductive and covers an area of ​​the same size and shape as the largest wafer to be held on the wafer holding area, wherein the wafer holding surface and the test head contact surface are formed on the upper surface of the clamping stage close to each other without the surfaces overlapping, wherein the wafer holding surface has conductive contact areas that are in contact with the back of the wafer, and wherein the test head contact surface is electrically connected to the conductive contact areas of the wafer holding surface, and wherein the front-side electrode probe heads and the back-side electrode probe heads are arranged so that a distance remains between them in the horizontal direction, so that the back-side electrode probe heads move relative to each other within the probe contact area when the front-side electrode probe heads are relatively moved by the movement of the clamping stage within the inspected wafer.

[0012] The present invention also achieves the above-described object by proposing a clamping stage used in the inspection device according to the present invention.

[0013] In the inspection apparatus according to the present invention, a clamp stage that holds a wafer to be inspected has a probe contact surface as mentioned above, in addition to a wafer holding surface that holds a wafer. Accordingly, the back-electrode probe heads can always be in contact with the probe contact surface, and it is not necessary to move the back-electrode probe heads even when the clamp stage is moved relative to the front-electrode probe heads to inspect individual semiconductor devices on the wafer one by one. For this reason, it is possible to keep not only the length of the electrical connection path between the tester and the front-electrode probe heads very short and constant, but also the length of the electrical connection path between the tester and the back-electrode probe heads.Therefore, it is possible to obtain transient characteristics necessary to perform a high current test close to the actual performance of the semiconductor device under test and a dynamic characteristic test by minimizing spurious inductances that may be generated in the test leads.

[0014] Furthermore, with the inspection apparatus of the present invention, it is possible to perform the inspection of electrical characteristics of semiconductor devices by bringing both the front-side electrode probes and the back-side electrode probes into contact with a semiconductor device on the wafer or probe pad from the front side of the wafer. This simplifies the structure of the inspection apparatus, and makes it very easy to check the contact state between the probes and the semiconductor devices or the probe pad. Furthermore, probe replacement operations and maintenance of the clamping stage, including the wafer holding surface, become easier. This has advantageous effects.

[0015] Furthermore, in a preferred example, the front-side electrode probes and the back-side electrode probes of the inspection apparatus according to the present invention include one or more force probes and one or more sense probes. When the inspection apparatus of the present invention is equipped with one or more force probes and one or more sense probes, it is possible to accurately measure the electrical characteristics of semiconductor devices by four-point measurement methods. The front-side electrode probes and the back-side electrode probes of the inspection apparatus of the present invention may also include probes other than force and sense probes. Depending on the type of semiconductor devices to be inspected, the front-side electrode probes may, for example,have a gate probe and / or a base probe in addition to the force and direction probes.

[0016] In a preferred embodiment, the inspection device of the present invention includes a conductive force line component arranged parallel to the upper surface of the clamping stage and along the straight line connecting the front-side electrode probes and the rear-side electrode probes. One end of the conductive force line component on the front-side electrode probe side is electrically connected to one or more force probes included in the front-side electrode probes. The other end of the conductive force line component is connected to a tester.When the inspection device of the present invention includes the conductive component for force conduction, the electrical path leading from the tester to the force probes among the probes for the front electrodes becomes parallel to the electrical path leading from the conductive contact portions in the wafer support surface to the probe contact surface, and the direction of the former path is opposite to that of the latter path. Accordingly, the magnetic fields generated by the two paths cancel each other out, and the inductance that might be generated can be reduced.

[0017] Although it depends on the length of the conductive component for the power line, the generated inductance can be reduced to about one-quarter compared to the case where no conductive component for the power line is provided by providing the conductive component for the power line. The conductive component for the power line can have any shape, as long as the magnetic field generated by the electrical path leading from the conductive contact portions in the wafer holding surface to the probe contact surface is canceled by the magnetic field generated by the electric current flowing in the conductive component for the power line. For example, a plate-shaped conductive component for the power line is preferably used.One end of the conductive component for force conduction, which is connected to the tester, is preferably arranged close to the test heads for the rear electrodes in order to extend the electrical paths that run parallel to each other and in the opposite direction.

[0018] Furthermore, in a preferred embodiment of the inspection device according to the present invention, the upper surface of the clamping stage is made of a conductive material, and a part of the upper surface made of a conductive material forms the conductive contact portions of the wafer holding surface. Another part of the upper surface made of a conductive material forms the probe contact surface. In this case, since the conductive contact portions in the wafer holding surface are directly electrically connected to the probe contact surface through the upper surface of the clamping stage, no special connecting means are required, and the structure of the inspection device becomes simple, which is preferable. In another preferred embodiment, a conductive plate is arranged on the conductive upper surface of the clamping stage to form the probe contact surface.In this case, it is possible to replace the conductive plate only when the probe contact surface has been damaged by repeated contact with the back electrode probes, which reduces the time and cost required for maintenance and is preferred.

[0019] Furthermore, in another preferred embodiment of the inspection device according to the present invention, the upper surface of the clamping stage is divided into a plurality of long rectangular sections that are parallel to each other and lie along the line connecting the wafer holding surface and the probe contact surface. A plurality of the sections consist of conductive components and electrically insulating components arranged one after another. Part of the upper surface of the conductive components forms the conductive contact portions of the wafer holding surface, and another part of the upper surface of the conductive components forms the probe contact surface.In the case where the upper surface of the clamping stage is formed by the conductive components and the electrically insulating components arranged one after another, the electrical connection paths leading from the back side of the wafer to the back electrode probes are limited to the long rectangular conductive components along the straight line connecting the wafer holding surface and the probe contact surface. Accordingly, the spurious inductances and spurious capacitances that may be generated are significantly reduced, thereby improving the transient characteristics during inspection and enabling very fast and more accurate inspection, which has beneficial effects.

[0020] In the semiconductor device inspection apparatus according to the present invention and the clamping stage of the present invention, it is not necessary to move the back electrode test heads even when the clamping stage is moved relative to the front electrode test heads to inspect the semiconductor devices on a wafer one by one. Therefore, it is possible to keep the lengths of the electrical paths connecting the testers and the front electrode test heads and the testers and the back electrode test heads very short and constant. For this reason, the spurious inductances generated in the test leads can be minimized. This makes it possible to obtain the transient characteristics necessary for performing a high-current test close to the actual performance of the semiconductor device under test and a dynamic characteristic test.Accordingly, the advantageous effects that the inspection of semiconductor devices in the wafer state can be accurately performed are achieved with the present invention.

[0021] With the inspection apparatus according to the present invention, it is possible to perform the inspection of electrical characteristics of semiconductor devices by deploying both the front-side electrode probes and the back-side electrode probes from the front side of the wafer into contact with the front-side electrodes of a semiconductor device on the wafer and the probe pad, respectively. This makes the structure of the inspection apparatus of the present invention very simple, and the contact state between the probes and the semiconductor devices or the probe pad can be easily checked. Furthermore, advantageous effects such as simplifying probe replacement operations and facilitating maintenance of the clamping stage including the wafer holding surface are achieved.

[0022] Furthermore, in the case where the inspection apparatus according to the present invention includes a conductive component for force conduction arranged parallel to the upper surface along the straight line connecting the front-side electrode probes to the back-side electrode probes, the electrical path leading from the tester to the force probes under the front-side electrode probes and the electrical path leading from the conductive contact portions in the wafer holding surface to the probe contact surface are parallel to each other and in opposite directions. As a result, the magnetic fields generated by the two electrical paths cancel each other out, and the inductance generated is reduced, enabling inspection with improved transient characteristics and improved accuracy.

[0023] Furthermore, when the upper surface of the clamping stage consists of conductive components and electrically insulating components arranged one behind the other, the electrical paths leading from the backside of a wafer to the probes for the back electrodes are limited to the long rectangular conductive components. This greatly reduces the spurious inductances and capacitances generated. This achieves the beneficial effects of improving the transient characteristics during inspection and enabling very fast and more accurate inspection.

[0024] In addition, in the semiconductor device inspection apparatus according to the present invention, since a wafer is held in the wafer holding surface of the clamping stage with the back surface of the wafer in contact with the upper surface of the wafer holding surface, it is easy to heat the wafer and there is no fear of the wafer being deformed and / or damaged by the weight of the wafer itself or the pressure applied during scanning, even if the wafer is thin. Short description of the drawings Fig. 1 is a partial sectional front view of an example of a semiconductor device inspection apparatus according to the present invention; Fig. 2 is a plan view of the semiconductor device inspection apparatus according to the present invention; Fig. 3 is an enlarged front view showing only the clamping stage and its adjacent portion of the inspection device; Fig. 4 is a plan view of Fig. 3; Fig. 5 is a front view showing the relationship between the clamping stage and the test heads for the front and rear electrodes; Fig. 6 is a plan view of Fig. 5; Fig. 7 is a plan view showing the movement of the front electrode probes and the rear electrode probes; Fig. Figure 8 is a schematic drawing showing electrical currents flowing in the conductive components for power conduction and the clamping stage. Fig. Figure 9 is a schematic drawing showing the generated magnetic fields; Fig. Figure 10 is an enlarged fragmentary section showing the front electrode probes; Fig. 11 is an enlarged plan view showing the probes for the front electrodes; Fig. 12 is a plan view showing only a part of Fig. 11 shows; Fig. 13 is a plan view showing another example of the clamping stage; Fig. 14 is a side view showing another example of the clamping step; Fig. 15 is a front view showing another example of the clamping stage; Fig. 16 is an enlarged partial view of Fig. 13; and Fig. 17 is a plan view showing electrical connection paths formed between the back electrodes of a wafer and the back electrode probes. Description of the preferred embodiments

[0025] The present invention will be explained in detail below with reference to the accompanying drawings, which take an IGBT, which is one of the power semiconductor devices, as an example of a semiconductor device inspected with the inspection apparatus according to the present invention. It should be understood that the power semiconductor devices inspected with the inspection apparatus of the present invention are not limited to IGBTs, and the present invention is not limited to the illustrated examples.

[0026] Fig. 1 is a partial sectional front view showing an example of a semiconductor device inspection apparatus according to the present invention. Fig. Figure 2 is a plan view of the inspection device as shown in Fig. 1 is shown. In Fig. 1 and Fig. 2, reference numeral 1 denotes the semiconductor device inspection apparatus of the present invention. Reference numeral 2 denotes a clamping stage, reference numeral 3 denotes an electrical insulating plate on which the clamping stage 2 is arranged and held, and reference numeral 4 denotes a thermal insulating plate. A heater, which will be described later, is arranged between the electrical insulating plate 3 and the thermal insulating plate 4. Reference numeral 5 denotes an X, Y, Z-θ stage that moves the clamping stage 2 together with the electrical insulating plate 3 and the thermal insulating plate 4 in the X, Y, Z, and θ directions. Reference numeral 6 denotes a manipulator that holds front-side electrode test heads. Reference numeral 7 denotes a manipulator that holds back-side electrode test heads, and reference numeral 8 denotes a tester.The test heads for front electrodes and the test heads for rear electrodes can be moved within a narrow range in the X, Y and Z directions using the manipulator 6 and the manipulator 7, respectively.

[0027] Reference symbol W denotes a wafer to be inspected. Reference symbol 9 denotes a wafer cassette that accommodates wafer W, and reference symbol 10 denotes wafer handling equipment that takes out a wafer W from the wafer cassette 9 to place it on a wafer holding surface of the clamping stage 2 mentioned below, and takes out a wafer W whose inspection is completed from the wafer holding surface. There is no limitation on a mechanism that allows the wafer handling equipment 10 to transport a wafer W, as long as the wafer handling equipment 10 can transport a wafer W. For example, wafer handling equipment using a Bernoulli system is preferably used.

[0028] Reference numeral 11 denotes an upper base plate of the inspection device 1. The upper base plate 11 has an elliptical hole 12. The manipulator 6 and the manipulator 7 are fixed to the edge of the elliptical hole 12 of the upper base plate 11. The manipulator 6 and the manipulator 7 each have a cantilever arm and a holding component attached to the tip of the cantilever arm and protruding downward through the elliptical hole 12. Via the cantilever arms and the holding components, the manipulator 6 and the manipulator 7 hold the below-mentioned front-side electrode and back-side electrode test heads at a position below the upper base plate 11. The front-side electrode and back-side electrode test heads can be moved independently of each other in the X, Y, and Z directions by the manipulator 6 and the manipulator 7, respectively.Reference numeral 13 denotes a conductive component for power conduction, and 14A and 14B are conductive cables. The front-side electrode probes are connected to the tester 8 via the conductive component for power conduction 13 and the conductive cable 14A. The rear-side electrode probes are connected to the tester via the conductive cable 14B. The inspection device 1 includes, in addition to the above-mentioned components, a microscope and / or an image device for alignment, which are not shown.

[0029] Fig. 3 is an enlarged front view showing only the clamping stage 2 and its adjacent part of the inspection device 1. In Fig. 3, reference numeral 15 is a heater interposed between the electrical insulation plate 3 and the thermal insulation plate 4. When electric power is supplied from a power source (not shown), the heater 15 heats the clamping stage 2 together with a wafer W placed on the wafer holding surface of the clamping stage 2. A temperature sensor (not shown) is attached to the wafer holding surface. The clamping stage 2 and the wafer W placed on the wafer holding surface can be heated to a prescribed temperature by controlling the electric current supplied to the heater 15 based on a signal from the temperature sensor.

[0030] Fig. 4 is a plan view of Fig. 3. As in Fig. As shown in Fig. 4, the wafer holding surface, denoted by symbol α, and a probe contact surface, denoted by symbol β, are formed on the upper surface of the clamp stage 2 close to each other without overlapping. The wafer holding surface α has a suitable vacuum mechanism, for example, suction grooves connected to a vacuum table, which is not shown. By the vacuum mechanism, the wafer holding surface α sucks and holds a wafer W, with the upper surface of the surface in contact with the back of the wafer W.

[0031] There is no limitation on the size of the wafer holding surface α, as long as the wafer holding surface α is capable of holding the largest wafer W expected to be inspected by the inspection device 1. Since a wafer W to be inspected is usually circular, the wafer holding surface α is usually circularly shaped according to the shape of a wafer W. However, the shape of the wafer holding surface α is not limited to a circle. The wafer holding surface α can be ellipse, oval, or polygonal as long as it can hold a wafer W.

[0032] In the inspection apparatus 1 of the present example, the clamping stage 2 is made of a conductive material such as copper that has been subjected to an anti-corrosion coating treatment. Since a part of the upper surface of the clamping stage 2 forms the wafer holding surface α, the upper surface of the wafer holding surface α is also conductive. When a wafer W is placed on the wafer holding surface α, the conductive upper surface of the wafer holding surface α is in contact with the back surface of the wafer W. The part of the wafer holding surface α that comes into contact with the back surface of the wafer W is called the conductive contact portion.

[0033] On the other hand, the probe contact surface β, which is a surface with which the probes for the back electrodes contact, is formed on the upper surface of the clamping stage 2 adjacent to the wafer holding surface α. Accordingly, a part of the upper surface of the clamping stage 2 forms the probe contact surface β. Since the clamping stage 2 in this example is made of a conductive material, such as copper, which has undergone an anti-corrosion coating treatment as described above, the probe contact surface β is conductive and is electrically connected to the conductive contact portions of the wafer holding surface α through the wafer holding surface α and the part of the clamping stage other than the probe contact surface β.

[0034] The size of the probe contact area β is chosen so that it covers an area of ​​the same size and shape as the largest wafer W to be held on the wafer holding area α. In this example, it is assumed that a wafer W to be held on the wafer holding area α has a circular shape with a diameter that is at most as large as that of the wafer holding area α. Therefore, the probe contact area β in this example is a circular area with the same radius as the wafer holding area α. However, the shape of the probe contact area β is not limited to a circle. The probe contact area β can have any shape, for example, an ellipse, oval, or polygon, as long as it covers an area of ​​the same size and shape as the largest wafer W to be inspected.Although the probe contact area β may have the same size and shape as the largest wafer W to be held on the wafer holding area α, because it is sufficient for the probe contact area β to cover an area having the same size and shape as the largest wafer W to be held on the wafer holding area α, for reasons of caution it is preferable that the size and shape of the probe contact area β be selected to cover an area larger than the largest wafer W held on the wafer holding area α.

[0035] As described above, in this example, the conductive upper surface of the clamping stage 2 itself forms both the wafer holding surface α and the probe contact surface β. However, a conductive plate covering the area with the same size and shape as the largest wafer W held on the wafer holding surface α may be arranged on the upper surface of the clamping stage 2 to utilize the upper surface of the conductive plate as the probe contact surface β. In the case of using the conductive plate as the probe contact surface β, it is possible to replace the conductive plate only when the probe contact surface β is damaged due to repeated contact with the back-electrode probes, thus reducing maintenance time and cost.

[0036] As in Fig. As shown in Fig. 4, the clamping stage 2 is provided on the XYZ-Θ stage 5, and the wafer holding surface α and the probe contact surface β are formed on the clamping stage 2. Therefore, when the XYZ-Θ stage 5 is operated to move the clamping stage, the wafer holding surface α and the probe contact surface β move together in the same direction.

[0037] Fig. Figure 5 is a front view showing the relationship between the clamping stage 2 and the test heads for the front and rear electrodes. Fig. 6 is a plan view of Fig. 5. For the sake of simplicity, Fig. 5 and Fig. 6 only the components necessary to explain the relationship are shown. In Fig. 5 and Fig. 6 denotes P A the test heads for front electrodes and P Bdenotes the probes for rear electrodes. W is a wafer held on the wafer holding surface α. The probes for front electrodes P A and the test heads for rear electrodes P Binclude more than one force probe and more than one directional probe, both of which are not shown. Only one force probe is sufficient. However, more than one force probe may be provided because it is necessary to apply a large current when inspecting power semiconductor devices. Similarly, even if only one directional probe is sufficient, it is preferable to provide more than one directional probe because continuity verification becomes possible when more than one directional probe is provided. Although it depends on the type of semiconductor devices to be inspected, front-side electrode probes PA normally include a gate probe or a base probe (not shown) in addition to the force probes and directional probes.

[0038] The test heads for front electrodes P A and the test heads for rear electrodes P Bare arranged so that a distance D remains between them in the horizontal direction. The distance D is chosen so that the test heads for front electrodes P A come into contact with a wafer W held on the wafer holding surface α, and that the back electrode probes P B come into contact with the probe contact surface β when the clamping stage 2 is moved upwards by the XYZ-Θ stage 5. The conductive component for the force conduction 13 is arranged parallel to the upper surface of the clamping stage 2 and along the straight line connecting the probes for front electrodes P A and the test heads for rear electrodes P B In this example, the conductive component for the force line 13 is a rigid and conductive component in plate form. One end of the conductive component for the force line 13, which is connected to the test heads for front electrodes P Acloser, is electrically connected to the more than one force probe among the probes for front electrodes P A connected, and the other end of the conductive component for power line 13 is connected via the conductive cable 14 A connected to the tester 8. The test heads for rear electrodes P B are connected via the conductive cable 14 B connected to tester 8.

[0039] The symbol L in Fig. 6 represents the distance between the center of the wafer holding surface α and the center of the probe contact surface β. In this example, the distance D is chosen to be equal to or almost equal to the distance L. Since the distance D is chosen to be equal to or almost equal to the distance L, and since the probe contact surface β covers the area with the same size and shape as the largest wafer W held on the wafer holding surface α, the probes for back electrodes P B relatively within the probe contact area β, when the probes for front electrodes P A move relatively with the movement of the clamping stage 2 through the XYZ-Θ stage 5 within the wafer W to be examined, which is held on the wafer holding surface α.

[0040] Fig. 7 is a plan view showing the movement of the front electrode probes P Aand the test heads for rear electrodes P B shows. In Fig. 7, as the largest wafer held on the wafer holding surface α, a circular wafer W having the same radius as the wafer holding surface α is arranged and held on the wafer holding surface α. As shown in (a) to (d) of Fig. As shown in Figure 7, the test heads for front electrodes P A relatively within the wafer W held on the wafer holding surface α when the clamping stage 2 moves to the right, left, upward, or downward in the figures. According to the movement of the front-side electrode probes P A the probes for rear electrodes P move B relatively within the probe contact area β, whereby they determine the distance D from the probes for front electrodes P A retained.

[0041] As described above, in the inspection apparatus 1 of the present invention, even in the case where the clamp stage 2 is moved to the XYZ-Θ stage 5 to inspect many semiconductor devices formed on a wafer W one by one, the back electrode probe heads P B each time in contact with the probe contact surface β, which is electrically connected to the back electrodes of a semiconductor device under test, when the probes for front electrodes P Acome into contact with the front-side electrodes of the semiconductor device under inspection. This delivers necessary electrical signals to the semiconductor devices. Therefore, with the inspection apparatus 1 of the present invention, it is possible to inspect electrical properties of semiconductor devices in the wafer state. Furthermore, the positional relationships between the tester 8 and the front-side electrode probes P A and the positional relationships between the tester 8 and the test heads for rear electrodes P B kept constant because it is not necessary to change the probes for front electrodes P A and the test heads for rear electrodes P Bto move, even in the case that many semiconductor devices on a wafer W are inspected one by one. Therefore, in the inspection apparatus 1 of the present invention, even in the case that many semiconductor devices on a wafer W are inspected one by one in the wafer state, the lengths of the electrical connection lines connecting the tester 8 with the front-side electrode test heads P A and the test heads for rear electrodes P B connect, are always kept very short and constant. Accordingly, it is possible to obtain the transient characteristics necessary to perform a high-current test close to the actual performance of the semiconductor devices under test and a dynamic characteristic test by minimizing the spurious inductance of the test leads. This has beneficial effects.

[0042] Fig. 8 is a schematic drawing showing electric currents flowing in the conductive component for power lines 13 and the clamping stage 2. Fig. Figure 9 is a schematic diagram showing the magnetic fields generated by the electric currents. During the inspection, an electric circuit is formed that starts at the tester 8 and continues through the conductive cable 14. A , the conductive component of the force line 13, force probes under the probes for front electrodes P A , a semiconductor device on a wafer W, the conductive contact portions of the wafer holding surface α, the clamping stage 2, the probe contact surface β, the probes for back electrodes P B and the conductive cable 14 Bin this order to the tester 8. The electric current li shown in the figure flows into the conductive component for the power line 13, and the electric current lo shown in the figure flows into the clamping stage 2. Since the conductive component of the power line 13 is arranged parallel to the upper surface of the clamping stage 2 along the straight line connecting the test heads for front electrodes P A and the test heads for rear electrodes P B the direction of the magnetic field generated by the electric current li is opposite to the direction of the magnetic field generated by the electric current lo (cf. Fig. 9), and the two magnetic fields cancel each other out. This allows the effective inductance of the electrical current path between the probes for front electrodes P A and the test heads for rear electrodes P Bcan be reduced, and measurements with high accuracy and better transient characteristics are realized.

[0043] The conductive component for power lines 13 is not limited to a solid and conductive component in plate form, as long as it is parallel to the upper surface of the clamping stage 2 along the straight line connecting the test heads for front electrodes P A and the test heads for rear electrodes P Bconnects. The conductive component for power lines 13 may be a sheath with a circular cross-section. However, when the clamping stage 2, in which the electric current li flows, is plate-shaped, the conductive component for power lines 13 is preferably plate-shaped with a width greater than the gap between the conductive component for power lines 13 and the clamping stage 2, to form a parallel coupling structure with the clamping stage 2, in which air is held as a dielectric material between these elements.

[0044] Fig. 10 is an enlarged partial section showing the front electrode probes P A shows. In Fig. 10, reference numeral 16 denotes a probe block, and reference numeral 17 denotes a block cover. The probe block 16 is made of a conductive material and is electrically connected to the conductive component for force conduction 13 by connecting it to the conductive component for force conduction 13. Reference numeral 18 denotes a force probe. The force probes 18 are attached to the probe block 16 by inserting them into a mounting hole formed in the probe block 16 and fixing them there. The force probes 18 are in contact with the inner surface of the mounting hole, thereby establishing an electrical connection between the probe block 16 and the conductive component for force conduction 13. Reference numeral 19 denotes a directional probe.The directional probe 19 is attached to the probe block 16 by inserting and securing it into a mounting hole formed in the probe block 16. However, the directional probe 19 is electrically insulated from the probe block 16 and the conductive component for power conduction 13 because an electrically insulating material 20 is provided between the directional probe 19 and the inner surface of the mounting hole.

[0045] The final section 18 T of the force test head 18 and the end section 19 T of the directional test head 19 are pressed downwards by elastic means (not shown) contained in the force test head 18 or the directional test head 19. If an external force is applied upwards, the end section 18 T and the final section 19 Tmove upwards according to the magnitude of the external force. Reference numeral 21 denotes a conductive cable connecting the directional probe 19 to the tester 8.

[0046] Reference numeral 22 denotes a cooling chamber formed in the probe block 16, reference numeral 23 denotes a cooling air inlet, and reference numeral 24 denotes a cooling air nozzle. The cooling air inlet 23 is connected to a suitable cooling air source (not shown). Cooling air flows from the cooling air source through the cooling air inlet 23 into the cooling chamber 22 and cools the force probes 18 and the directional probe 19, as well as the gate probe mentioned below and the probe block 16. The cooling air exits the cooling air nozzle 24 and also cools a semiconductor device under test located below the front-side electrode probes P. A As explained above, the probes for front electrodes have PA In this example, coolant for the probes and the semiconductor device under test. Accordingly, in this example, the probes for front electrodes are cooled to P A An excessive increase in the temperature of the probes and a semiconductor device under test is reliably prevented, even when a large electric current is applied to the semiconductor device under test. Therefore, a more stable and accurate inspection can be performed. The cooling medium is not limited to air. Suitable gases other than air, such as nitrogen gas, can of course also be used as a cooling medium.

[0047] Fig. 11 is an enlarged plan view showing the front electrode probes P A without the block cover 17. Fig. 12 is a plan view showing only the probes in Fig. 11. Reference numeral 25 denotes the gate probe, and an electrically insulating material 20 is interposed between the gate probe 25 and the probe block 16. The gate probe 25 is thereby electrically insulated from the conductive component for power conduction 13 and the probe block 16. The gate probe 25 is connected to the tester 8 via a connecting cable (not shown).

[0048] As in Fig. 11 and Fig. 12, the probes are each arranged at a grid point of a grid pattern. Fourteen (14) force probes 18 are arranged at the grid points of the grid pattern, except for the grid points adjacent to two directional probes 19 and a gate probe 25. The arrangement and number of the different probes, as shown in Fig. 11 and Fig. 12 are merely an example. It is understood that the arrangement and number of force probes 18, directional probes 19 and gate probe 25 are not limited to the Fig. 11 and Fig. 12 is limited.

[0049] Even if only the test heads for front electrodes P A explained, the probes for rear electrodes P B essentially the same as the test heads for front electrodes P A except for the fact that they do not have a gate probe 25 and differ slightly from the probes for front electrodes P in terms of the size and arrangement of the force probes 18 and directional probes 19. A differentiate.

[0050] Fig. 13 is a plan view showing another example of the clamping stage 2. Fig. 14 is a side view thereof, Fig. 15 is a front view thereof, and Fig. 16 is a partially enlarged view of Fig. 13. As shown in the figures, the clamping stage 2 of this example is divided into a number of long rectangular sections that overlap parallel to each other and lie along the line connecting the wafer holding surface α and the probe contact surface β. The long rectangular sections consist of conductive components 26 and electrically insulating components 27 arranged one after the other (in Fig. 16, the electrically insulating components 27 are shown hatched for clarity. The height of the conductive components 26 is greater than that of the electrically insulating components 27, and the upper surface of the clamping stage 2 is formed by the upper surfaces of the conductive components 27. A part of the upper surface of the clamping stage 2, which is formed by the upper surfaces of a number of the conductive components 27, serves as conductive contact areas of a wafer holding surface α, which are in contact with the back side of a wafer W, and another part of the upper surface of the clamping stage 2 serves as a probe contact surface β. Since an electrically insulating component 27 is inserted between every two adjacent conductive components 26, every two adjacent conductive components 26 are electrically insulated from each other.Thus, the conductive contact portions of the wafer holding surface α, which are in contact with the back side of a wafer W, are electrically connected to the probe contact surface β by a number of conductive components 26 which form a straight line and are electrically insulated from each other.

[0051] We in Fig. 14 and Fig. 15, the thin, plate-like conductive components 26 and the similarly thin, plate-like electrically insulating components 27, which are smaller than the conductive components 26, are stacked on top of one another to form the clamping stage 2 in this example. Thus, the clamping stage 2 can be formed by alternately positioning and stacking the conductive components 26 and the electrically insulating components 27 and adhering or fusing them. However, the structure of the clamping stage 2 consisting of the conductive components 26 and the electrically insulating components 27 arranged one after the other and in parallel to each other is not limited to that shown in the figures. For example, for formation, by appropriate means, e.g.By bonding, fusion, vapor deposition, or plating, a number of the long rectangular conductive components 26 are attached to an electrically insulating plate in parallel with each other, leaving a gap between every two adjacent conductive components 26, to form a clamping stage 2 in which the conductive components 26 and the electrically insulating components 27 are alternately arranged. A clamping stage 2 in which the conductive components 26 and the electrically insulating components 27 are alternately arranged can also be manufactured by preparing an electrically insulating plate with a number of straight grooves on its surface and inserting the conductive component 26 into each of the grooves.

[0052] Fig. Fig. 17 is a plan view showing electrical connection paths formed between the back electrodes of a wafer W and the back electrode probes P Bbe formed if the clamping level 2, as described in Fig. 13 is used. In Fig. 17. Reference numeral 28 denotes a semiconductor device under test, reference numeral 29 denotes a force probe among the probes for the back electrodes P B and reference numeral 30 denotes a directional probe among the probes for back electrodes P B .

[0053] A number of the conductive components 26 in the clamping stage 2 lie along the line running from the wafer holding surface α to the probe contact surface β. The direction of the line is the same or almost the same as that of the straight line connecting the probes for front electrodes P A and the test heads for rear electrodes P B If the front electrode probes P Acomes into contact with the electrodes formed on the front side of the semiconductor device 28 under test, the back electrodes of the wafer W are positioned just below the semiconductor device 28 and the force probes 29 and the directional probe 30 are positioned below the back electrode probes P B in contact with the same conductive components 26. In other words, the back electrodes of the wafer W just below the semiconductor device 28 are electrically connected to the force probes 29 and the directional probe 30 below the back electrode probes P Bin a straight direction with electrical connection paths formed by the long rectangular conductive components 26 located along the line extending from the wafer holding surface α to the probe contact surface β. As explained above, the electrical connection paths leading from the back side of the wafer W to the probes for back electrodes P B limited to the long rectangular conductive components 26 when the Fig. Clamping stage 2 shown in Figure 13 is used. Accordingly, the spurious inductances and spurious capacitances that may be generated are significantly reduced, which has the beneficial effects of improving the transient characteristics and realizing a very fast and more accurate inspection.

[0054] Since a number of the conductive components 26 are electrically isolated from each other, the electrical connection paths connecting the back electrodes of the wafer W and the force probes 29 are divided among the back electrode probes P B connect, electrically from the electrical connection paths connecting the back electrodes of the wafer W and the directional probe 30 among the back electrode probes P Bconnect, insulated, unless one of the force probes 29 and the directional probe 30 comes into contact with the same conductive component 26. Therefore, it is possible to transmit the electrical signals for force use from the back electrodes of the wafer W via electrical connection paths that are different from those for transmitting the electrical signals for directional use from the back electrodes of the wafer W to the tester 8, although the probe contact area β is shared. This is an advantageous effect of this example. In order for the force probes 29 and the directional probe 30 not to come into contact with the same conductive component 26, the force probes 29 and the directional probe 30 should, for example,be arranged so that a free space remains between them in a direction perpendicular to the conductive components 26, which is greater than the widths of a conductive component 26 and an electrically insulating component 27. Industrial applicability

[0055] As explained above, with the semiconductor device inspection apparatus and the clamping stage used therefor according to the present invention, the transient characteristics necessary for conducting high-current experiments close to the actual performance of the semiconductor device under test and dynamic characteristic tests can be examined in a wafer state, even when the semiconductor devices have electrodes on both sides of the wafer, as in power semiconductor devices. This enables more accurate inspections of semiconductor devices in the wafer state. According to the present invention, it is possible to avoid the disadvantage that characteristic defects of the semiconductor devices are found for the first time during the full final inspection. This can effectively prevent an increase in the volume of waste and an increase in production costs caused by useless processes.The present invention has wide industrial applicability.

Claims

[1] Inspection device (1) for semiconductor devices, comprising: Test heads (18, 19) for front-side electrodes (PA), test heads (18, 19) for rear-side electrodes (PB), a clamping stage (2) which moves relative to the test heads (18, 19) for front-side electrodes (PA) and the test heads (18, 19) for rear-side electrodes (PB), a wafer holding surface (α) which holds a wafer (W) to be tested, and a test head contact surface (β) which is conductive and covers an area which has the same size and the same shape as the largest wafer to be held on the wafer holding surface (α), wherein the wafer holding surface (α) and the test head contact surface (β) are formed on the upper surface of the clamping stage (2) close to each other without these surfaces overlapping, wherein the wafer holding surface (α) has conductive contact portions which are in contact with the back side of the wafer (W), and wherein the test head contact surface (β) is electrically connected to the conductive contact portions of the wafer holding surface (α), and wherein the test heads (18, 19) for front-side electrodes (PA) and the test heads (18, 19) for rear-side electrodes (PB) are arranged such that a distance remains between them in the horizontal direction, so that the test heads (18, 19) for rear-side electrodes (PB) move relatively within the test head contact area (β) when the test heads (18, 19) for front-side electrodes (PA) are moved relatively by the movement of the clamping stage (2) within the tested wafer (W). [2] The semiconductor device inspection apparatus (1) according to claim 1, wherein the front electrode (PA) test heads (18, 19) and the rear electrode (PB) test heads (18, 19) comprise one or more impression test heads (18) and one or more measurement test heads (19). [3] The semiconductor device inspection apparatus (1) according to claim 2, comprising a conductive component (13) for imprinting conduction arranged parallel to the upper surface of the clamping stage (2) and along the straight line connecting the front-side electrode (PA) test heads (18, 19) and the back-side electrode (PB) test heads (18, 19), wherein one end of the conductive component (13) for imprinting conduction closer to the front-side electrode (PA) test heads (18, 19) is electrically connected to the one or more imprint test heads (18) among the front-side electrode (PA) test heads (18, 19), and wherein the other end of the conductive component (13) for imprinting conduction is connected to a tester (8). [4] The semiconductor device inspection apparatus (1) according to claim 3, wherein the conductive component (13) for the imprint line is plate-shaped. [5] The semiconductor device inspection apparatus (1) according to claim 1, wherein the upper surface of the clamping stage (2) is made of a conductive material, and wherein a part of the upper surface made of a conductive material forms the conductive contact portions of the wafer holding surface (α), and wherein another part of the upper surface made of a conductive material forms the probe contact surface (β). [6] The semiconductor device inspection apparatus (1) according to claim 1, wherein the upper surface of the clamping stage (2) is made of a conductive material, and a part of the upper surface made of a conductive material forms the conductive contact portions of the wafer holding surface (α), and a conductive plate disposed on another part of the upper surface made of a conductive material forms the probe contact surface (β). [7] The semiconductor device inspection apparatus (1) according to claim 1, wherein the upper surface of the clamping stage (2) is divided into a number of long rectangular sections which are parallel to each other and arranged along a line connecting the wafer holding surface (α) and the test head contact surface (β), and wherein the long rectangular sections consist of conductive components (26) and electrically insulating components (27) which are arranged one after the other, and wherein a part of the upper surface of the conductive components (26) forms the conductive contact sections of the wafer holding surface (α) and another part of the upper surface of the conductive components (26) forms the test head contact surface (β). [8] Clamping stage (2), which includes: a wafer holding surface (α) holding a wafer (W) to be inspected, and a probe contact surface (β) which is conductive and covers an area which has the same size and the same shape as the largest wafer to be held on the wafer holding surface (α), wherein the wafer holding surface (α) and the test head contact surface (β) are formed on the upper surface of the clamping stage (2) close to each other without the surfaces overlapping, wherein the wafer holding surface (α) has conductive contact portions which are in contact with the back side of the wafer (W), and wherein the test head contact surface (β) is electrically connected to the conductive contact portions of the wafer holding surface (α). [9] Clamping stage (2) according to claim 8, wherein the upper surface of the clamping stage (2) is divided into a number of long rectangular sections arranged parallel to each other and arranged along a line connecting the wafer holding surface (α) and the test head contact surface (β), and wherein the long rectangular sections consist of conductive components (26) and electrically insulating components (27) arranged one after the other, and wherein a part of the upper surface of the conductive components (26) forms the conductive contact sections of the wafer holding surface (α) and another part of the upper surface of the conductive components (26) forms the test head contact surface (β).

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