Method for exposing a layer of a printed circuit board and correspondingly exposed printed circuit board
The method exposes target layers in multilayer PCBs by applying a sacrificial layer and precise mechanical ablation, ensuring the target layer is not touched, thereby preventing damage and enhancing RF performance through direct component connection.
Patent Information
- Application Number
- DE102012203318
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2011-12-22
- Filing Date
- 2012-03-02
- Publication Date
- 2025-12-11
- Estimated Expiration
- 2032-03-02
AI Technical Summary
Existing methods for exposing target layers in multilayer printed circuit boards (PCBs) are prone to damaging thin conductor structures, especially when processing high-frequency signals, due to the difficulty in accurately terminating the drilling process without touching the target layer, leading to signal degradation and reflection points.
A method involving the application of a sacrificial layer on the target layer, followed by mechanical ablation and precise removal using a calibrated tool, ensuring the target layer is exposed without direct contact, and subsequent chemical dissolution of the sacrificial layer to avoid damage.
The method allows for precise exposure of target layers without damaging conductor structures, enabling direct connection of electronic components to signal-carrying layers for improved RF performance by using bond wires, thus maintaining signal integrity.
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Abstract
Description
[0001] The invention relates to a method for producing recesses, in particular deep milling, for the controlled exposure of target layers within multilayer printed circuit boards, and a printed circuit board with at least one recess, which is produced in particular by the deep milling according to the invention, in which the target layer is exposed.
[0002] Multilayer printed circuit boards (PCBs) are inexpensive to manufacture, but only conditionally suitable for very high frequencies. This is because it is difficult to transfer the RF signal from the component to the PCB without degrading it. Soldered connections are unsuitable, and bond connections require the pads on the component and the pads on the PCB to be as close to the same height as possible. One solution is to connect the electronic component that generates and / or processes the RF signal directly to the signal-carrying layer. For this purpose, the multilayer PCB is provided with a recess into which the electronic component is inserted. The electronic component can then be directly connected to the signal-carrying layer via bond wires.
[0003] From DE 43 40 249 A1, a device for deep drilling of printed circuit boards is known. Different potentials are applied to the target layer and to the layer forming the surface. The drilling device detects these potentials and ends the drilling process as soon as the tip of the drill bit touches the corresponding target layer.
[0004] The design of DE 43 40 249 A1, however, has several disadvantages. A defined potential must be applied to both the surface layer and the target layer. This requires that the target layer be accessible from the outside and not directly connected to the surface layer. Furthermore, the drilling process is terminated as soon as the drill bit touches the target layer. However, if the target layer is not a large, applied mass layer, but rather individual, separate conductor tracks, it is not guaranteed that the drill bit will actually touch such a conductor track and that the potential applied to it will stop the drilling process. Therefore, it is quite possible that the drilling process will continue if the drill bit does not reach the target layer.Especially with a target layer designed to transmit high frequencies, even a simple touch of the drill bit can alter the layer's properties or, due to its thin conductor structures, destroy it. The occurrence of additional reflection points and attenuation is therefore unavoidable.
[0005] US 2006 / 0003495 A1 discloses a method for manufacturing an embedded substrate with an electronic component. US 2008 / 0264687 A1 discloses a printed circuit board and its manufacturing process, which includes the production of a multilayer printed circuit board. DE 102008040394 A1 discloses a method for manufacturing a layered sensor element. DE 3206354 A1 relates to a device for modifying or repairing non-visible conductor track patterns of multilayer printed circuit boards, wherein conductor tracks are separated by drilling or milling.
[0006] The object of the invention is therefore to provide a method for exposing at least one target layer, as well as a printed circuit board with an exposed target layer, wherein the target layer must not be touched in any way by the removal tool.
[0007] The problem is solved with respect to the inventive method for exposing a target layer by the features of claim 1 and claim 2, and with respect to the multilayer printed circuit board with an exposed target layer by the features of claim 7. Advantageous embodiments of the inventive method for exposing a target layer and the inventive multilayer printed circuit board are specified in the respective dependent claims.
[0008] The inventive method for exposing at least a portion of a target layer by means of a mechanical ablation process within a multilayer printed circuit board (PCB) consisting of a first layer and at least one second layer comprises several process steps. In a first process step, a sacrificial layer is applied to at least a portion of the target layer to be exposed in the at least one second layer. Furthermore, the first layer and the at least one second layer are pressed together to form the multilayer PCB. Additionally, a recess is created from a surface of the multilayer PCB to the sacrificial layer or into the sacrificial layer of the multilayer PCB by an ablation process.
[0009] Preferably, this exposed sacrificial layer is then removed from the multilayer printed circuit board.
[0010] A particular advantage of this method for exposing a target layer within a multilayer printed circuit board (PCB) is that an additional sacrificial layer is applied to the already structured target layer, which may be formed on at least one other layer. This sacrificial layer allows a mechanical removal process, such as milling, to be precise enough after the PCB is pressed into the multilayer structure to expose the sacrificial layer. After further removal of the sacrificial layer, the target layer is exposed without the structures, i.e., the conductive traces, on the target layer being damaged in any way by the removal tool.
[0011] The multilayer printed circuit board according to the invention consists of a first layer and at least a second layer, which are firmly connected to each other by means of an adhesive bond and a mechanical compression, wherein a first recess exposes a target layer by the method and wherein remnants of the sacrificial layer are present at edges and / or corners between the first recess and the target layer.
[0012] Preferably, the printed circuit board according to the invention retains remnants of a sacrificial layer, which has ensured that the structures of the target layer have not been damaged by a mechanical abrasion process. This distinguishes the printed circuit board according to the invention from conventional printed circuit boards.
[0013] According to a first alternative, the sacrificial layer consists of a photoresist (or, in one example, a dry resist). Furthermore, only the portion of the photoresist or dry resist of the sacrificial layer that lies on at least part of the target layer, which is to be exposed in a mechanical ablation process, is exposed. The unexposed portion of the sacrificial layer is then dissolved. It is particularly advantageous if the sacrificial layer consists of a photoresist or a dry resist because this makes it particularly easy to dissolve, for example, with an alkali. It is also particularly advantageous if the sacrificial layer is applied to the entire target layer because this greatly simplifies the application process. By simply exposing the portion of the sacrificial layer where the recess is to be formed, the unexposed portion can be very easily dissolved, for example, with an alkali.can be dissolved using a weak alkali.
[0014] Furthermore, the method according to the invention offers the advantage of applying a voltage between the surface or an inner layer of the multilayer printed circuit board (PCB) at a precisely defined distance from the target layer and the ablation tool itself. Subsequently, it is detected that a circuit is closed as soon as the ablation tool touches the surface. This detection result is then used to determine the position of the ablation tool relative to the sacrificial layer, and all layers are ablated down to the sacrificial layer, thus exposing it. It is particularly advantageous that the position of the ablation tool is calibrated by detecting when it touches the surface or the inner layer of the multilayer PCB. This allows tolerances regarding the thickness of the multilayer PCB to be factored out. This information can then be used to determine the distance to the sacrificial layer more accurately.This exposes the sacrificial layer, while avoiding excessively deep removal into the multilayer circuit board, so that the actual target layer is not touched by the removal tool.
[0015] According to a second alternative, a further recess is created within the target layer by a mechanical ablation process. Additionally, it is advantageous if all contacts on the target layer exposed by the first recess are finished. This is achieved in particular by depositing a bondable surface using an electroless nickel plating process, an electroless palladium plating process, or a gold plating process. Furthermore, it is advantageous if the electronic component is mounted within the further recess and connected to the finished contacts. Creating this additional recess allows the electronic component to be connected to contacts on the target layer using particularly short bond wires, which offer superior RF performance, because the connections are preferably at the same level.
[0016] Furthermore, the inventive method offers an advantage if the thickness of the sacrificial layer is selected such that tolerances in the thickness during the production of the multilayer printed circuit board and tolerances within the mechanical ablation process always result in the mechanical ablation process extending to or into the sacrificial layer. This allows the sacrificial layer to be made thicker or thinner depending on the accuracy of the mechanical ablation process. In this way, even less precise milling machines can be used to expose the sacrificial layer, so that after the sacrificial layer is removed by means of a concentrated alkaline solution, the target layer is exposed without the target layer being damaged in any way.
[0017] Various embodiments of the invention are described below by way of example with reference to the drawing. Identical objects have the same reference numerals. The corresponding figures in the drawing show in detail: Fig. 1 the desired structure of an embodiment of the multilayer printed circuit board according to the invention, which is achieved by the method according to the invention for exposing the desired target layer; Fig. 2A a process step according to the invention to expose the desired target layer by applying a sacrificial layer; Fig. 2B a further process step according to the invention to expose the desired target layer by partially removing the sacrificial layer; Fig. 3A a first part of an embodiment of the multilayer pressed printed circuit board according to the invention, wherein the target layer to be exposed is surrounded by other layers; Fig. 3B a further part of an embodiment of the multilayer pressed printed circuit board according to the invention, which is pressed together with the first part again; Fig. 4 an embodiment of the multilayer printed circuit board according to the invention, consisting of eight layers, wherein a circuit is closed when a removal tool touches the surface of the multilayer printed circuit board; Fig. 5A an embodiment of the multilayer printed circuit board according to the invention, wherein the removal tool is milled up to the sacrificial layer and / or into the sacrificial layer; Fig. 5B an embodiment of the multilayer printed circuit board according to the invention, wherein the sacrificial layer has been removed so that the target layer is exposed; Fig. 6 an embodiment of the multilayer printed circuit board according to the invention consisting of eight layers, wherein a circuit is closed when a removal tool touches the target layer of the multilayer printed circuit board; Fig. 7 the desired structure of an embodiment of the multilayer printed circuit board according to the invention with the desired recesses for receiving the electronic component; Fig. Figure 8 illustrates an embodiment of the method according to the invention as a flowchart describing how the target layer is exposed within a multilayer printed circuit board; Fig. 9 An embodiment of the method according to the invention is illustrated as a flowchart describing the exposure processes of the sacrificial layer on the target layer; Fig. 10 Another embodiment of the method according to the invention is illustrated as a flowchart describing how the removal tool is calibrated to expose the sacrificial layer; and Fig. 11 Another embodiment of the method according to the invention is illustrated as a flowchart, which describes how a further recess is created within the target layer and how at least one component is integrated into this further recess.
[0018] Fig. Figure 1 shows a first layer 1, a second layer 2, a third layer 3, and a fourth layer 4, which, when pressed together, form the printed circuit board 5 according to the invention. However, the printed circuit board 5 according to the invention need not consist of four layers. It is also possible for the printed circuit board 5 according to the invention to consist of two layers, three layers, or more than four layers. The first layer 1 consists of a laminate whose dielectric properties are particularly well suited for high-frequency applications. The first layer 1 has a first layer L1a and a second layer L1b, wherein the first layer L1a forms the surface 6 of the multilayer printed circuit board 5. The layer L1a, i.e., the surface 6, is preferably a ground plane. However, the layer L1a may also be structured, in which case a ground connection should be formed in the area of the milled groove. The conductor tracks on the layer L1b, on the other hand, may be structured.The second layer 2 also consists of a laminate, which is preferably suitable for high frequencies. Two layers L2a and L2b, preferably made of copper or gold-plated copper, are applied to this laminate. Conductive traces are preferably structured on layer L2a of the second layer 2. Layer L2b of the second layer 2 is preferably a ground layer, the thickness of which is significantly greater than that of layer L2a. The increased thickness can be achieved, for example, by additional copper plating. Layer L2b of the second layer 2 preferably serves to absorb and dissipate excess heat, which may, for example, be generated in the electronic components 7.
[0019] In this embodiment, the third layer 3 consists of a laminate that, for example, only needs to be suitable for low frequencies. The corresponding layers L3a and L3b of the third layer 3 can also have structured conductor tracks. A fourth layer 4 also consists of a laminate that is preferably only suitable for low frequencies. Layer L4a of the fourth layer 4 can be used for structuring conductor tracks, whereas layer L4b can also be used for attaching connection contacts. However, the laminate of the third layer 3 and the fourth layer 4 can also be a laminate suitable for high frequencies.
[0020] The first layer 1 and the second layer 2 are bonded together by a first bonding layer 81. This bonding layer is also referred to as prepreg. This first bonding layer 81 has a dielectric constant that is approximately the same as that of the first layer 1 and the second layer 2, and therefore exhibits correspondingly good RF properties. However, the melting point of the first bonding layer 81 is lower than that of the first layer 1 and the second layer 2. During compression molding, this bonding layer 81 becomes viscous and thus firmly bonds the first layer 1 and the second layer 2 together. The same applies to the bonding layer 83, which connects the third layer 3 to the fourth layer 4. The bonding layer 82 subsequently connects layers 1 and 2 to layers 3 and 4. The bonding layer 82 has similar properties to the bonding layer 83.
[0021] Furthermore, numerous vias 9 are present, some of which connect the entire circuit board 5, while others connect only specific layers of the circuit board 5. A first recess 10, which exposes a target layer 11, is also clearly visible. The first recess 10 is preferably produced by a milling process followed by the removal of the sacrificial layer.
[0022] Within the first recess 10, a further recess 12 is formed. This further recess 12 preferably has a smaller volume than the first recess 10. The further recess 12 also has a smaller base area than the first recess 10, because the further recess 12 is formed within a portion of the first recess 10 or within a portion of the exposed target layer 11. The further recess 12 exposes layer L2b of the second layer 2, which, as already explained, acts as a heat sink.
[0023] This allows an electronic component 7 to be placed on layer L2b of the second layer 2, preferably to be bonded to the target layer 11 or to contacts on the target layer 11. For this purpose, bond wires 13 are formed between the electronic component 7 and the target layer 11. The electronic component 7 is preferably glued to layer L2b of the second layer 2.
[0024] In Fig. Figure 1 shows the desired multilayer printed circuit board 5, the production of which is described in detail in the following figures.
[0025] Fig. Figure 2A shows a process step to enable the desired target layer 11 to be exposed later without damage. This is shown in Figure 2A. Fig. The second layer 2A, where the target layer 11 is layer L2a, is to be exposed. A portion of the target layer 11, or layer L2a, is to be exposed. Layers L2a and L2b are structured, for example, by etching processes. This means that the desired conductive traces are already formed on layer L2a. In a process step, a photoresist 20 is applied to layer L2a, i.e., to the target layer 11. The photoresist 20 is preferably a dry resist 20. This photoresist is preferably applied to the entire layer L2a, i.e., to the entire target layer 11. The application is carried out by means of a rolling process because the photoresist 20 is in the form of a film that is unwound onto layer L2a. However, the photoresist 20 can also be applied using other process steps.
[0026] It is shown in Fig. 2A also includes a light source 21 and an exposure mask 22. The exposure mask 22 ensures that only those areas of the photoresist 20 where the target layer 11 is to be exposed are illuminated by the light source 21. Areas where layer L2a, i.e., the target layer 11, is not to be exposed are not illuminated by the light source 21 because they are covered by the exposure mask 22. The photoresist 20 is a sacrificial layer 20, as will be explained in detail later.
[0027] Fig. Figure 2B shows a further process step according to the invention for exposing the desired target layer 11 by partially removing the sacrificial layer 20, i.e., the photoresist 20. This is clearly visible in Fig. 2B, that the areas of the victim class 20, which are in Fig. The unexposed parts of the sacrificial layer 20, which consist of a photoresist 20, in particular a dry resist 20, have been dissolved. Dissolving the unexposed parts of the sacrificial layer 20, which consists of a photoresist 20, in particular a dry resist 20, is preferably achieved with sodium carbonate. Other weak alkalis can also be used. Acids are preferably not used because they attack the conductor track structure, i.e., layers L2a and L2b. The sacrificial layer 20 has, for example, a thickness of approximately 50 µm. Of course, other thicknesses can also be used for the sacrificial layer 20, depending on the tolerances of the thickness of the multilayer printed circuit board 5 or of the mechanical ablation process during the deep milling. The exposure itself is preferably carried out using an automatic exposure unit in the outer layer photoresist area.
[0028] Fig. Figure 3A shows a first part 30 of the multilayer pressed printed circuit board 5. For this, the second layer 2 is made of Fig. Layer 2B, on which the sacrificial layer 20 is located, is pressed together with the compound layer 81 and the first layer 1. It is clearly visible that the thickness of the sacrificial layer 20 remains as unchanged as possible during the pressing process. The hardness of the sacrificial layer 20 can be increased, for example, by baking the second layer 2, preferably together with the first layer 1, in an oven before pressing, naturally without the compound layer 81. It is clearly visible that the sacrificial layer 20 presses into the compound layer 81. Furthermore, in this step, the vias 9 are made between layers L1a, L1b, L2a, and L2b. Additionally, the copper layer of layer L2b is thickened by copper plating. This allows layer L2b to act as a heat sink to absorb the excess heat from the electrical component 7.
[0029] Fig. Figure 3B shows a further part 31 of an embodiment of the multilayer pressed printed circuit board 5 according to the invention. This further part 31 has already been described in Fig. 1 explained. This further part 31 serves, for example, to supply the electrical component 7 with DC voltage and to transmit information in the baseband, so that the input frequencies are significantly lower than those within the first part 30. While the frequencies that the signal layers L1b, L2a of the first part 30 of the printed circuit board 5 according to the invention must transmit are several GHz, the frequencies that the layers L3a to L4b must transmit are only a few MHz. The further part 31 also shows the interconnect layer 83 and the via 9, which connects the layers L3a, L3b, L4a and L4b to each other.
[0030] Fig. Section 4 describes an embodiment of the multilayer printed circuit board 5 according to the invention in conjunction with a mechanical ablation process. Within Fig. 4 are the first part 30 and the further part 31 of the Fig. 3A and Fig. 3B together to the from Fig. 1 known multilayer printed circuit board 5 have been pressed. Furthermore, additional vias 9 have been inserted, which contact one or more layers of the first part 30 and / or the further part 31 with each other.
[0031] The cutting tool 40, preferably a milling cutter, is also visible. The cutting tool 40 is electrically connected to a detection unit 41. The detection unit 41 is also electrically connected to a voltage source 42. The voltage source 42, the detection unit 41, the mounting frame, and the cutting tool 40 form a circuit 43, which is closed via the surface 6, i.e., via layer L1a of layer 1, as soon as the cutting tool 40 touches the surface 6. For this purpose, the surface 6, i.e., the outer layer, is preferably connected to the mounting frame of the printed circuit board 5. This mounting frame (not shown) is then electrically connected to the machine table by means of hold-down clamps installed on the machine.When the cutting tool 40, i.e., in this example the milling cutter, encounters layer L1a, which is electrically connected to the machine table, as it plunges into the multilayer printed circuit board 5, the detection unit 41 detects a current flow. This information is used to determine a relative offset to a previously defined zero position, which forms the basis for the actual controlled depth milling. As soon as the detection unit 41 detects the current flow, the actual controlled depth milling into the sacrificial layer 20 begins from this position.
[0032] The accuracy of the milling process depends only on the thickness tolerance in the manufacture of the multilayer printed circuit board 5, the tolerance for adjusting the milling tool 40, and the tolerance of the actual milling operation. To avoid damaging the target layer 11 or layer L2a of the second layer 2, the thickness of the sacrificial layer 20 must be selected such that tolerances in the thickness during the manufacture of the printed circuit board 5 and tolerances within the mechanical milling process always result in the first recess 10 being milled up to or into the sacrificial layer 20, but without completely removing the sacrificial layer.If, for example, the ablation tool can be positioned with an accuracy of + / - 15 µm and the printed circuit board 5 can be manufactured with an accuracy of + / - 5 µm in thickness, a thickness of 50 µm for the sacrificial layer 20 is sufficient. This ensures that even when tolerances are added, the sacrificial layer 20 is always targeted and the position L2a is not compromised when its center (25 µm) is targeted. If ablation tools with higher or lower positioning accuracy are used, and / or if the printed circuit board 5 can be manufactured with higher or lower accuracy, the thickness of the sacrificial layer 20 can be varied.
[0033] It is also possible that the removal tool 40, while switched off, is moved from above towards the circuit board 5, so that another detection unit registers a higher pressure when the removal tool 40 strikes the outer surface or surface 6 of the multilayer circuit board 5. Based on this information, a precise offset value can also be determined so that the sacrificial layer 20 is reliably hit.
[0034] Fig. Figure 5A shows an embodiment of the multilayer printed circuit board 5 according to the invention, wherein the sacrificial layer 20 has been milled into by the removal tool 40. It can also be said that the sacrificial layer 20 has been exposed. It can be seen that the sacrificial layer 20 consists of Fig. 5A is not quite as thick as the sacrificial layer 20. Fig. 4. Ideally, the victim layer consists of 20 people. Fig. 5A is only half as thick as the sacrificial layer made of Fig. 4, because in this case the removal tool 40 hit exactly the targeted center of the sacrificial layer 20.
[0035] Fig. Figure 5B shows an embodiment of the multilayer printed circuit board 5 according to the invention, wherein the sacrificial layer 20 has been removed, so that the target layer 11 is exposed. For the removal of the sacrificial layer 20, which in the example consists of Fig. 5A consists of a photoresist 20 or a dry resist 20, which, as in Fig. Since the sacrificial layer 20 has been exposed (as shown in Figure 2A), a stronger alkaline solution must be used than for removing the unexposed portion of the sacrificial layer 20. For example, sodium hydroxide or potassium hydroxide can be used as alkaline solutions. The alkaline solution preferably has a concentration of approximately 5-10%. If the entire sacrificial layer 20 has not been exposed by a removal tool 40, remnants of the sacrificial layer 20 may remain at the edges and / or corners between the first recess 10 and the target layer 11 after its removal with an alkaline solution. However, the sacrificial layer 20 should not cover or remain over the entire target layer 11, as its dielectric properties negatively affect the high-frequency signal.
[0036] Furthermore, it is now possible to gold-plate the contacts on the target layer 11 and on the surface 6. This can be done via an electroplating process. However, it is preferable to begin the gold-plating only after the second deep milling has been completed.
[0037] Fig. Figure 6 shows an embodiment of the multilayer printed circuit board 5 according to the invention, with the removal tool 40 for creating the further recess 12. The removal tool 40, which is preferably a milling cutter, is clearly visible. The removal tool 40 is electrically connected to a detection unit 41, which is connected to a voltage source 42. A circuit 43 is closed via the voltage source 42, the detection unit 41, the support frame, and the removal tool 40 as soon as the removal tool 40 touches layer L2b. Layer L2b is optionally connected to the reference ground of the voltage source 42 or to the potential of the voltage source 42, whereas the removal tool 40 is either at the potential of the voltage source 42 or at the ground potential of the voltage source 42.As soon as the removal tool 40 touches layer L2b, the circuit 43 is closed and the detection unit 41 detects the flow of a current through the removal tool 40.
[0038] In the following, the further recess 12 is milled into at least part of the exposed target layer 11. In the initial example from Fig. 6. Only a portion of layer L2a and a portion of the laminate of the second layer 2 are removed. Layer L2b, which is preferably a solid layer, is significantly thicker than the other layers, so that its thickness is reduced by the removal tool 40, but it is not cut through. The removal process is then terminated when the described circuit above layer L2b is closed. The removal tool 40 therefore exposes layer L2b without defects. The further recess 12 is preferably smaller in extent than the first recess 10. The thickness of layer L2b must be at least such that the tolerance in positioning the removal tool 40, the tolerance in the milling process itself, and the tolerance in producing the second layer 2, even when added together, do not cause the removal tool 40 to cut through layer L2b, but rather a significant portion of layer L2b remains.
[0039] Fig. Figure 7 shows the desired structure of an embodiment of the multilayer printed circuit board 5 according to the invention, with the desired recesses 10, 12, which serve to accommodate the electronic component 7. As already explained, the surface 6 and the exposed target layer are already gold-plated by means of an electroplating process. This gold plating increases the surface quality and is necessary so that a bond wire can be attached from the electronic component 7 in a bonding process. It is the preferred embodiment that the printed circuit board 5 is made of Fig. 7, that is, with the first recess 10 and the further recess 12, is gilded in a further step by an electroplating process. It is also clearly shown that the layer L2b in the area of the further recess 12 is thinner than in the other areas.
[0040] The multilayer printed circuit board 5 can of course contain several of these depicted recesses 10, 12 and thus have several electronic components 7. The first recess 10 can also have several of the further recesses 12.
[0041] It is also possible that the further recess 12 is created directly together with the first recess 10. In this case, part of the sacrificial layer 20 would be removed directly by the removal tool 40 and would not need to be removed later by a further dissolution process using sodium hydroxide. This is particularly easy to achieve if layer L2b is particularly thick. A layer thickness of approximately 80 µm is more than sufficient.
[0042] Fig. Figure 8 shows an embodiment of a flowchart according to the invention, which describes how the target layer 11 is exposed within a multilayer printed circuit board 5. In the illustrated embodiments, the sacrificial layer 20 is applied to layer L2a of the second layer 2. It is also possible for the sacrificial layer 20 to be applied to one of layers L3a or L4a of the third layer 3 or the fourth layer 4. As already explained, the sacrificial layer 20 is a photoresist, in particular a dry resist, such as is also used for structuring the conductor tracks. This sacrificial layer 20 is preferably applied completely to the entire target layer 11. However, it is also possible for the sacrificial layer 20 to be applied only directly over the target layer 11 to be exposed, using appropriate masks.
[0043] Subsequently, in a second process step S2, the first layer 1 and at least one second layer 2 are pressed together to form the multilayer printed circuit board 5. In the exemplary embodiment, a third layer 3 and a fourth layer 4 are also pressed together with each other and with the first two layers 1, 2, which together form the printed circuit board 5 according to the invention. However, further layers can also be formed. During this pressing process, a bonding layer 81, 82, 83 is introduced between each layer, which has the same temperature coefficient and similar dielectric properties as the layers 1, 2, 3, 4 above and below, respectively, but a lower melting point.
[0044] Subsequently, in a third process step S3, a first recess 10 is created from a surface 6 of the multilayer printed circuit board 5 to the sacrificial layer 20 or into the sacrificial layer 20 of the multilayer printed circuit board 5 by a material removal process. As already explained, such a mechanical material removal process can be a milling process. The sacrificial layer 20 has a thickness that is such that the tolerances regarding the positioning of the mechanical material removal tool 40, the tolerances regarding the milling process itself, and the tolerances for the thickness of the printed circuit board 5 according to the invention do not result in the target layer 11 adjacent to the sacrificial layer 20 being destroyed or damaged.
[0045] Subsequently, the remaining exposed sacrificial layer 20 is removed from the multilayer printed circuit board 5. This is done by using alkalis, in particular potassium hydroxide or sodium hydroxide. The alkalis preferably have a concentration of approximately 50%. Depending on the thickness of the sacrificial layer 20, the concentration of the alkali used can also be significantly below or significantly above 50%. Other alkalis can also be used.
[0046] Fig. Figure 9 shows a further embodiment of a flowchart according to the invention, which describes how the sacrificial layer 20 is applied. For this purpose, process step S 1_1 executed, preferably within process step S1. Within process step S 1_1A sacrificial layer 20, consisting of a photoresist, in particular a dry resist, is applied to the target layer 11. Application is preferably carried out by a rolling process, whereby the sacrificial layer 20 is hot-rolled in the form of a film. It is also possible, for example, to apply the sacrificial layer 20 only to the area of the target layer 11 that is to be exposed later, for example, using a mask. The photoresist 20 is the same photoresist that has already been used, for example, to structure the conductor tracks on layers L1a to L4b.
[0047] Following this, the process step S 1_2 This is carried out by exposing at least part of the sacrificial layer 20, which lies on at least part of the target layer 11 that is to be exposed in a mechanical removal process. Subsequently, process step S is carried out. 1_3carried out in which the unexposed part of the sacrificial layer is dissolved using an alkali, preferably a weak alkali such as potassium carbonate.
[0048] Fig. Figure 10 shows a further embodiment of a flowchart according to the invention, which describes how the removal tool 40 is calibrated to create the recess 10. For this purpose, process step S 3_1 executed, preferably within process step S3. Within process step S 3_1 A voltage is applied between a surface 6 of the multilayer circuit board 5 and the removal tool 40.
[0049] Following this, the process step S 3_2 executed. Within process step S 3_2A detection unit 41 detects that an electrical circuit 43 is closed as soon as the cutting tool 40 touches the surface 6. The detection unit 41 detects a current flow through the cutting tool 40. The cutting tool 40, which is typically a milling cutter, continuously approaches the surface 6. The cutting tool 40 may be in operation during this process; that is, the milling cutter may be rotating.
[0050] Following this, the process step S 3_3 executed. Within process step S 3_3The detection result is used to determine the position of the ablation tool 40 relative to the sacrificial layer 20. This position determination can take place, for example, within the detection unit 41 or within a higher-level control unit. As soon as the ablation tool 40 touches the surface 6, the distance of the ablation tool 40 to the sacrificial layer 20 is defined solely by the thickness of the corresponding layers of the printed circuit board 5 and by the thickness of the sacrificial layer 20 itself.
[0051] Following this, the process step S 3_4 executed. Within process step S 3_4All layers up to or into the sacrificial layer 20 are removed, thus exposing it and creating the first recess 10. It is important that the sacrificial layer 20 has a thickness greater than the tolerance for adjusting the removal tool 40 in the direction of the sacrificial layer 20, greater than the tolerance for the milling process itself, and greater than the tolerance for the thickness in the manufacturing of the printed circuit board 5. The thickness of the sacrificial layer 20 must also be greater than the sum of these two tolerances.
[0052] Finally, it describes Fig.Figure 11 shows a further embodiment of a flowchart according to the invention, illustrating how a further recess 12 is created within the target layer 11. For this purpose, process step S5 is performed. Process step S5 is preferably performed after process step S4. However, process step S5 can also be performed directly within process step S3. Within process step S5, a further recess 12 is created within the target layer 11 by a further mechanical ablation process.
[0053] For this purpose, the ablation tool 40 is preferably used again. A portion of the target layer 11 is milled away by the ablation tool 40. It is possible that the position of the ablation tool 40 is once again detected by the detection unit 41. The electrical circuit 43 is closed not via the surface 6, but via the target layer 11. As soon as the detection unit 41 detects a current flow, the ablation tool 40 is just touching the target layer 11.
[0054] In the next step, the further recess 12 is created, whereby the removal tool 40 exposes a layer L2b of the second layer 2. This layer is preferably a ground plane onto which additional copper has been applied, so that it is ensured that the removal tool 40 does not cut through this layer. This layer L2b must therefore have a thickness that is greater than the tolerances for the positioning of the mechanical removal tool 40, as well as for the milling process itself and the thickness for the manufacture of the printed circuit board 5.
[0055] It is also possible that the further recess 12 extends to the third layer 3 or to the fourth layer 4. The use of a further sacrificial layer 20 adjacent to one of the layers L3a, L3b, or L4a is therefore easily possible. Due to the fact that the further recess 12 is formed within part of the target layer 11, the extent of the further recess 12 is smaller than the extent of the first recess 10.
[0056] Following process step S5, process step S6 is executed. Within process step S6, a bondable end surface, such as ENIG (Electroless Nickel Immersion Gold) or ENPIG (Electroless Nickel Electroless Palladium Immersion Gold), is deposited on the contacts on the target layer 11, which have been exposed by the first recess 10. This is preferably done by means of an electroplating process and serves to ensure that the bond wires 13 from the electronic components 7 can be securely connected to the contact points on the target layer 11, thus improving the RF quality.In this context, the conductor tracks or the ground plane on surface 6 and / or on the exposed layer L2b are preferably also gold-plated.
[0057] Following this, process step S7 is carried out. During process step S7, at least one electrical component 7 is attached within the further recess 12. This attachment is preferably achieved by adhesive bonding. Attachment can also be achieved by soldering.
[0058] Following this, process step S8 is carried out. During process step S8, the electrical component 7 with the gold-plated contacts on the target layer 11 is conductively connected by at least one bond wire 13. To increase interference immunity, the surface 6 can be further enclosed with a conductive housing. In this case, the electrical component 7 is completely enclosed.
[0059] It is also possible to insert or glue a further insert, preferably made of metal, into the second recess 12, which serves as a height compensation for component 7. In this case, the second recess 12 is slightly deeper. The insert, also referred to as an inlay, has a coefficient of thermal expansion that is preferably similar to that of component 7. Within the scope of the invention, all described and / or drawn features can be combined as desired. In particular, instead of mechanical removal to form the recess, chemical removal using an acid or alkali, by means of anisotropic etching, can also be carried out.
Claims
[1] Method for exposing at least a part of a target layer (11) within a multilayer printed circuit board (5) consisting of a first layer (1) and at least a second layer (2) by means of a removal process, characterized by the following procedural steps: - Applying (S1) a sacrificial layer (20) consisting of a photoresist to at least part of the target layer (11) to be exposed or of at least one second layer (2); - Expose (S 1_2 ) of at least part of the sacrificial layer (20) which lies on at least part of the target layer (11) which is to be exposed in a mechanical removal process; - Detach (S 1_3 ) of the unexposed part of the victim layer (20); - Pressing (S2) the first layer (1) and at least one second layer (2) together to form the multilayer printed circuit board (5); - Creating (S3) a first recess (10) from a surface (6) of the multilayer printed circuit board (5) to the sacrificial layer (20) or into the sacrificial layer (20) of the multilayer printed circuit board (5) by the ablation process. [2] Method for exposing at least a part of a target layer (11) within a multilayer printed circuit board (5) consisting of a first layer (1) and at least a second layer (2) by means of a removal process, characterized by the following procedural steps: - Applying (S1) a sacrificial layer (20) to at least part of the target layer (11) to be exposed, or to at least one second layer (2); - Pressing (S2) the first layer (1) and at least one second layer (2) together to form the multilayer printed circuit board (5); - Creating (S3) a first recess (10) from a surface (6) of the multilayer printed circuit board (5) to the sacrificial layer (20) or into the sacrificial layer (20) of the multilayer printed circuit board (5) by the ablation process; - Creating (S5) a further recess (12) within the target layer (11) by a mechanical removal process. [3] Method according to claim 1 or 2, characterized by , the following procedural step: - Triggering (S4) the remaining exposed sacrificial layer (20) from the multilayer printed circuit board (5) . [4] Method according to any one of claims 1 to 3, characterized by , that the procedural step Creating (S3) the first exclusion (10) includes the following sub-procedural steps: - Create (S 3_1 ) a voltage between the surface (6) of the multilayer printed circuit board (5) and a removal tool (40); - Detect (S 3_2) that a circuit (43) is closed as soon as the removal tool (40) touches the surface (6); - Benefits (S 3_3 ) of a detection result to determine a position of the removal tool (40) in relation to the sacrificial layer (20); - Remove (S 3_4 ) all layers (1) up to the sacrificial layer (20) and / or into the sacrificial layer (20), thereby creating the first recess (10). [5] Method according to any of the preceding claims, if dependent on claim 2, characterized by the following procedural steps: - Deposition (S6) of a bondable end surface by means of an electroless nickel plating process or an electroless palladium plating process or an immersion gold process on contacts on the target layer (11) that have been exposed through the first recess (10); - Securing (S7) at least one electrical component (7) within the further recess (12) ; - Bonding (S8) of at least one electrical component (7) to the machined contacts. [6] Method according to claim 1, characterized by , that the unexposed part of the sacrificial layer (20) is dissolved with a weakly concentrated alkali. and / or that a remaining part of the victim layer (20) with a is triggered by highly concentrated lye and / or that the thickness of the sacrificial layer (20) is chosen such that that tolerances in thickness during the manufacture of the multilayer printed circuit board (5) and tolerances within the ablation process and tolerances in the adjustment of the ablation tool (40) always result in the first recess (10) extending to the sacrificial layer (20) and / or into the sacrificial layer (20) and / or that the erosion process involves a mechanical process, in particular a milling process. [7] Multilayer printed circuit board (5) comprising a first layer (1) and at least a second layer (2) which are firmly joined together by means of an adhesive bond and / or a mechanical clamping, characterized by , that a first recess (10) exposes a target layer (11) by a method according to one of claims 1 to 6 and that remnants of the sacrificial layer (20) are present at edges and / or corners between the first recess (10) and the target layer (11). [8] Multilayer printed circuit board (5) according to claim 7, characterized by , that all contacts of the exposed target layer (11) are finished, in particular provided with a bondable final surface which is deposited on the contacts by means of an electroless nickel plating process or an electroless palladium plating process or an immersion gold process and that a further exception (12) within the target layer (11) is formed and that at least one electrical component (7) is arranged in this further recess (12) and / or that the at least one electrical component (7) is connected to the is linked to refined contacts.
Citation Information
Patent Citations
Method for manufacturing sensor element of exhaust sensor in layer form, particularly for measurement of gas concentration, involves providing electrode and diffusion barrier of sensor element
DE102008040394A1
Device for modifying or repairing non-visible conductor-track patterns on multilayer printed-circuit boards
DE3206354A1
Apparatus for controlling boring depth in multilayer PCB
DE4340249A1
Method for fabricating an electronic component embedded substrate
US20060003495A1
Printed circuit board and manufacturing method thereof
US20080264687A1