Method and circuit for a layout topology for serial / parallel switches

Abstract

Method for producing a layout topology (300, 700) for a switch circuit (200, 400, 610) with single-layer current conduction, wherein the switch circuit comprises a printed circuit board (310) having the layout topology, four half-bridges, four nodes with a respective connection for a respective external line and two center tap connections (205, 206, 305, 306, 505, 605, 606, 705, 706), wherein a respective half-bridge has at least one high-side switch (211a, 211b, 211c, 211d, 212a, 212b, 212c, 212d, 213a, 213b, 213c, 213d, 214a, 214b, 214c, 214d, 506, 611, 612, 613, 614) and at least one low-side switch (215a, 215b, 215c, 215d, 216a, 216b, 216c, 216d, 217a, 217b, 217c, 217d, 218a, 218b, 218c, 218d, 507, 615, 616, 617, 618), wherein the layout topology is divided into a left side (207, 607) and a right side (208, 608) and two half-bridges are arranged on each side,wherein each side is divided into an upper half and a lower half, and a respective half of a respective side has a half-bridge whose arrangement is mirrored from the upper half to the lower half, with the respective low-side switch being closer to the mirror plane than the respective high-side switch, wherein the respective half-bridge has a high-side terminal (601a, 601b, 603a, 603b) at a high-side end and a low-side terminal at a low-side end, wherein the high-side terminals of the respective half-bridges in the upper half and the lower half on each side are respectively connected to one another and form a respective positive node, wherein the low-side terminals of the respective half-bridges in the upper half and lower half on each side are respectively connected to one another and form a respective negative node,wherein a respective center tap between the at least one low-side switch and the at least one high-side switch of a respective half-bridge in the upper half and lower half of the left side is connected to the respective center tap in the same upper half and lower half of the right side, wherein in the layout topology a left positive terminal (201, 301, 501, 701) and a left negative terminal (202, 302, 502, 602, 702) are arranged on the left side and a right positive terminal (203, 303, 503, 703) and a right negative terminal (204, 304, 504, 604, 704) are arranged on the right side, wherein the left positive terminal is formed in the form of a clamp open to the right and enclosing the arrangement of the half-bridges on the left side, wherein the right positive terminal is formed in the form of a clamp open to the left and enclosing the arrangement of the half-bridges on the right side enclosing bracket is formed,whereby both clamps together enclose all half-bridges, wherein the respective negative terminal (602, 604, 702, 704) is arranged in the middle of each side, wherein the positive node formed by the high-side terminals of the respective half-bridges of the respective side is realized by the respective positive terminal of the same respective side, and wherein the negative node formed by the low-side terminals of the respective half-bridges of the respective side is realized by the respective negative terminal of the same respective side.

Description

[0001] The present invention relates to a layout topology for a switch circuit that can switch between a serial and a parallel through-path and enables single-layer current routing. Furthermore, a corresponding switch circuit is presented.

[0002] An alternating voltage for driving an electric traction machine can be generated by a series of similar modules equipped with switches. Each module connects an energy storage device it contains, for example, a capacitor or a battery cell. The modules or the switches they contain switch a current path between several alternative paths, so that the current either passes through the energy storage device embedded in the respective module in the charging or discharging direction, is bypassed by the energy storage device, or is divided so that several energy storage devices, for example, from different modules, are electrically connected in parallel.

[0003] In power electronics, corresponding circuits are divided into half-bridges as their respective basic units. A half-bridge comprises a first switch on the low-voltage side, connected to a negative input – a low-side terminal – and a second switch on the high-voltage side, connected to a positive input – a high-side terminal. The respective half-bridges are usually arranged together on an electronic assembly or integrated into a single component. Separating them is therefore not obvious.

[0004] The US publication US 2017 / 0 149 355 A1 describes an optimized layout of an NPC phase with modules made of large insulated gate bipolar transistors (IGBTs). NPC stands for "Neutral Point Clamped" topology, a three-point converter with an intermediate circuit. The disclosed layout explicitly includes busbars for conducting the current, which are laid out in one plane, i.e., without overlap. Due to the NPC circuit, all IGBT modules are arranged in series and in the forward direction between a common DC link. The common DC link consists of two DC links connected in series. However, the described layout is limited exclusively to busbars and IGBTs.

[0005] The individual module of a multilevel converter has at least two connections or inputs and outputs, usually two inputs and two outputs, and several half-bridges, i.e. base units. Each half-bridge is capable of acting as a current switch and even fulfills this role quite precisely: The current path can be between the high-side connection and a first output or a second output of the module and / or between the low-side connection and the first or second output of the module, or between all connections. In some of these combinations, a short circuit is also possible, which, depending on the case, can be either intentional or explicitly excluded. The applicant's document DE 10 2015 112 512 A1 discloses an exemplary module for providing an electrical converter system or a battery system.Each module contains at least one energy storage device and at least five internal switches, which allow the respective module to implement all switching states for dynamically switching an electrical connection between the at least one energy storage device of the respective module and the at least one energy storage device of a respective adjacent module, regardless of the respective switching state of other modules arranged in the converter system. These switching states include serial connection, parallel connection, with and without polarity reversal in the connections, and also a bypass.

[0006] The applicant's publication WO 2017 / 174102 A1 describes the topology of a module as a component of a multilevel converter comprising several such modules. The disclosed module comprises at least one energy storage device and several base units.Each base unit has at least one half-bridge with at least one low-side switch and at least one high-side switch. For two base units directly adjacent in a module, it is provided that in the first base unit, the at least one high-side switch is connected to a positive pole of a first energy storage device and the at least one low-side switch is connected to a negative pole of a second energy storage device (usually in a directly adjacent module). In the second base unit, the at least one high-side switch is connected to a positive pole of the second energy storage device and the at least one low-side switch is connected to a negative pole of the first energy storage device. This commutated arrangement of the connections compared to a conventional layout enables current paths that avoid high switching inductances during switching operations.However, such a topology is intrinsically optimized for two power levels in which a power line is routed, since in order to connect to a second set of non-immediately adjacent base units of a module, the power lines must cross at least once.

[0007] The publication DE 10 2016 106 359 A1 describes a module as a component of a multilevel converter in which several base units have half-bridges arranged in adjacent groups and are suitably interconnected via their respective high-side or low-side switches using current paths. The appropriate grouping and interconnection of the respective half-bridges is optimized to reduce the magnetic fields generated during switching on and off.

[0008] The publication DE 10 2015 121 226 A1 deals with a ring connection of modules of a modular multilevel converter. Symmetrical DC tapping is not possible because there is no star point.

[0009] The document DE 10 2015 223 599 A1 relates to a power module comprising at least one semiconductor switch half-bridge, wherein the semiconductor switch half-bridge has a high-side semiconductor switch and a low-side semiconductor switch. The high-side semiconductor switch and the low-side semiconductor switch enclose a circuit carrier with at least two electrically conductive layers between them, wherein a switching path connection of the low-side semiconductor switch and a switching path connection of the high-side semiconductor switch of the half-bridge are electrically connected to one another by means of the circuit carrier.

[0010] Against this background, it is an object of the present invention to provide a layout topology for a switch circuit, wherein the layout topology of the switch circuit should enable switching between a serial and a parallel through-conductance without exhibiting disadvantageous switching inductances. Current conduction within a single layer or

[0011] Power level should be possible to avoid crossing current paths and thus keep the PCB thickness low. Furthermore, a circuit implemented with the layout topology should be provided.

[0012] To achieve the above-mentioned object, a method for producing a layout topology for a switch circuit with a single-layer current guide is proposed, wherein the switch circuit comprises a printed circuit board having the layout topology, four half-bridges, four nodes with respective connections for a respective external line and at least two center tap connections. Each half-bridge has at least one high-side switch and at least one low-side switch. The layout topology is divided into a left side and a right side, with two half-bridges of the four half-bridges being arranged on each side. Each side is divided into an upper half and a lower half, with each half of each side having a half-bridge whose arrangement is mirrored from the upper half into the lower half at a virtual mirror plane.The respective low-side switch of the respective half-bridge is closer to the mirror plane than the respective high-side switch of the respective half-bridge. Each half-bridge has a high-side terminal at one high-side end and a low-side terminal at one low-side end. The high-side terminals of the respective half-bridges are connected to each other in the upper and lower half on each side, forming a respective positive node. The low-side terminals of the respective half-bridges are connected to each other in the upper and lower half on each side, forming a respective negative node.A respective center tap between the at least one low-side switch and the at least one high-side switch of a respective half-bridge in the upper half and in the lower half of the left side is connected via a respective center tap connection to the respective center tap in the same upper half and the same lower half of the right side. In the layout topology, a left positive terminal and a left negative terminal are arranged on the left side and a right positive terminal and a right negative terminal are arranged on the right side. The left positive terminal is formed in the form of a bracket open to the right that encloses the arrangement of half-bridges on the left side, and the right positive terminal is formed in the form of a bracket open to the left that encloses the arrangement of half-bridges on the right side. As a result, both brackets together enclose all of the half-bridges.The respective shape of the clamp can be square, for example. The respective negative terminal is located in the center of each side. The positive node formed by the high-side terminals of the respective half-bridges of the respective side is realized by the respective positive terminal of the same respective side, and the negative node formed by the low-side terminals of the respective half-bridges of the respective side is realized by the respective negative terminal of the same respective side.

[0013] The inventive arrangement of the clamps, which enclose the switch circuit but are open to each other, allows the center tap connections to be routed on the same plane. This advantageously avoids crossover current routing and allows all power currents to be routed within a single, single-layer layer. This also advantageously eliminates the need for laminated busbars known from the prior art, which incur high manufacturing costs, or multilayer inlays in printed circuit boards.

[0014] Another advantage is that the four nodes provided according to the invention require only one external connection per node. In the prior art, the half-bridges are designed separately and require a separate external connection.

[0015] In one embodiment of the method according to the invention, the layout topology is designed to accommodate, in each half-bridge, a number M of high-side switches connected in parallel and arranged in series, and a number M of low-side switches connected in parallel and arranged in series. M represents a positive integer. By connecting the respective M high-side switches and M low-side switches in parallel, a current to be switched, in particular of a power electronics device, is advantageously distributed evenly among the M respective high-side switches or low-side switches and thus reduced in the respective switch to 1 / M-th of the current to be switched.

[0016] In a further embodiment of the method according to the invention, the number M of high-side switches arranged in each half-bridge and the number M of low-side switches arranged in each half-bridge is chosen to be four. Further layout topologies adapted to predetermined application scenarios, for example, in a respective module of a modular multilevel converter, provide for a number M=2 (see Fig. 7) or M=6 (see Fig. 6).

[0017] The respective M high-side switches and the respective M low-side switches are arranged in series, i.e., adjacent to one another, whereby a respective electrical contact to a respective switch is also arranged along the series-arranged switches. This means that each possible current path from a respective terminal through a respective half-bridge, which has the respective switches arranged in series according to the invention, is of equal length, and thus the current distribution can be kept symmetrical.

[0018] Furthermore, the spatial division of the layout topology according to the invention can be designed such that each current path between the terminals of the switch circuit is of the same length, regardless of the respective switch position in the half-bridges. Accordingly, all current paths have the same ohmic resistance, so that the same current load (and thus heat generation) can be handled everywhere. This is achieved, for example, by a Fig. 2, the layout topology according to the invention is realized.

[0019] In a further embodiment of the method according to the invention, a respective cross-sectional size of a respective current guide of the inventive layout topology is selected such that along a respective current path between a terminal on the left side and a terminal on the right side, an identical ohmic resistance is present between the respective switches through which the current flows, regardless of the respective switch position of the switch circuit. Thus, the respective current flow on the respective current path is also identical. According to the aforementioned spatial division in the design of the inventive layout topology in Fig. 2, a cross-section of the current guide in the negative nodes on both sides would be advantageous compared to the cross-section of the respective current guide in the positive nodes. Depending on the switching state of the switch circuit, it is possible for the respective negative node to be supplied with current flows from two half-bridges, while a connection of the two half-bridges to the respective positive node extends along the respective square brackets, and therefore the current guide advantageously has a cross-section only half as large.

[0020] In yet another embodiment of the method according to the invention, the respective positive and negative nodes and / or the respective center tap connections are formed by at least one conductor track running on the circuit board, or connections to at least one inlay running within the circuit board are provided on them. Depending on the hardware implementation, the layout topology according to the invention is used on a single-layer circuit board into which metallic insert rails, so-called inlays, are embedded to conduct current between the switches mounted on a surface of the circuit board. The inlays allow high current flows due to their large cross-sectional area. The connections provided according to the invention are realized here by through-plating, so-called vias. On the other hand, the layout topology according to the invention can also be used on direct-bonded copper circuit boards, abbreviated to DBC circuit boards.The current is conducted in a single-layer metallization layer, e.g., in copper conductors, which are applied, for example, to a ceramic substrate. Heat dissipation advantageously occurs via the underside of the ceramic substrate, which conducts heat well. In particular, the single-layer layout topology provided by the invention is advantageous for DBC circuit boards with single-layer copper conductors that feature a high packing density, a large cross-sectional size of the copper conductors, and a low overall height.

[0021] Furthermore, a switch circuit with single-layer current conduction is claimed, which has a printed circuit board with a layout topology described above and which, within a single layer, comprises four half-bridges, four nodes with respective connections for a respective external line, and two center-tap connectors. Each half-bridge has at least one high-side switch and at least one low-side switch. Two half-bridges are arranged on a left-hand side and a right-hand side of the layout topology, wherein each side of the layout topology, which is divided into an upper half and a lower half, has a half-bridge whose respective arrangement is mirrored from the upper half to the lower half at a virtual mirror plane between the upper and lower halves, wherein the respective low-side switch is closer to the mirror plane than the respective high-side switch.The respective half-bridge has a high-side terminal at a high-side end and a low-side terminal at a low-side end. The high-side terminals of the respective half-bridges are respectively connected to one another in the upper half and the lower half on each side and form a respective positive node. The low-side terminals of the respective half-bridges are respectively connected to one another in the upper half and the lower half on each side and form a respective negative node. A respective center-tap connector connects a respective center tap between the at least one high-side switch and the at least one low-side switch of a respective half-bridge in the upper half and the lower half of the left side to the respective center tap in the same upper half and the same lower half of the right side.A left positive terminal and a right positive terminal of the layout topology enclose the arrangement of half-bridges on each side in the form of a square bracket such that both brackets together enclose all half-bridges. A left negative terminal and a right negative terminal are arranged in the middle of each side, with the positive node formed by the high-side terminals of the respective half-bridges on each side being realized by the respective positive terminal of the same respective side, and the negative node formed by the low-side terminals of the respective half-bridges on each side being realized by the respective negative terminal of the same respective side.

[0022] In an embodiment of the switch circuit according to the invention, the at least one high-side switch and the at least one low-side switch are each implemented by a MOSFET. Particularly when implementing the switch circuit according to the invention in a respective module of a modular multilevel converter, MOSFETs represent an advantageous implementation of the respective switches, without, however, excluding other power semiconductor switch types. The respective module additionally comprises an energy storage device, which is connected to the switch circuit on the left side of the layout topology according to the invention. The switch circuit according to the invention can connect this energy storage device to respective energy storage devices of adjacent modules either in series or in parallel, or bypassing them.

[0023] In a further embodiment of the switch circuit according to the invention, each half-bridge has M high-side switches connected in parallel and arranged in series, and M low-side switches connected in parallel and arranged in series. This distributes the current load evenly among the respective switches.

[0024] In a further embodiment of the switch circuit according to the invention, the number M of high-side switches arranged in each half-bridge and the number M of low-side switches arranged in each half-bridge is equal to four: M=4.

[0025] In another embodiment of the switch circuit according to the invention, the respective positive and negative nodes and / or at least one center tap connector are realized by at least one respective conductor track running on the circuit board.

[0026] In a further embodiment of the switch circuit according to the invention, the respective positive and negative nodes and / or at least one center tap connector are realized by at least one respective inlay embedded in the circuit board.

[0027] In a further embodiment of the switch circuit according to the invention, an electrical resistance and thus a current flow are determined by selecting a cross-sectional size of a current-carrying line.

[0028] Further advantages and embodiments of the invention will become apparent from the description and the accompanying drawings.

[0029] It is understood that the features mentioned above and those to be explained below can be used not only in the combination specified in each case, but also in other combinations or on their own, without departing from the scope of the present invention.

[0030] The figures are described coherently and comprehensively, and the same components are assigned the same reference symbols. Fig. 1 shows a schematic circuit of a module of a modular multilevel converter according to the prior art. Fig. 2 shows schematically an embodiment of a switch circuit according to the invention. Fig. 3 schematically shows a layout topology for a printed circuit board produced using an embodiment of the method according to the invention. Fig. 4 shows schematically a current path on an embodiment of a switch circuit according to the invention. Fig. 5 schematically shows several current paths in an upper half of an embodiment of a switch circuit according to the invention. Fig. 6 shows schematically a circuit for a module of a multilevel converter, which comprises an embodiment of a switch circuit according to the invention. Fig. 7 schematically shows another layout topology for a printed circuit board with inlays produced using an embodiment of the method according to the invention. Fig. 8 schematically shows yet another layout topology for a printed circuit board with applied transistors produced using an embodiment of the method according to the invention. Fig. 9 schematically shows a further layout topology for a printed circuit board produced using an embodiment of the method according to the invention.

[0031] In Fig. 1 schematically shows a circuit of a module 100 of a modular multilevel converter according to the applicant's publication DE 10 2015 112 512 A1. The module includes an energy storage device 119, eight internal switches 111, 112, 113, 114, 115, 116, 117, 118, and two center tap connections "N X “ 105 and “N Y106. The arrangement shown allows the module, regardless of the respective switching state of other modules arranged in a converter system, to implement all switching states for dynamically switching an electrical connection between the at least one energy storage device 119 of the module and the at least one energy storage device of a respective adjacent module. These switching states include a serial connection, a parallel connection, with and without polarity reversal in the terminals of the module, but also a bypass. The module 100 is connected to adjacent other modules of the converter system by a left positive connection "N A +“ 101, a left negative terminal “N A -“ 102, a right positive terminal “N B +“ 103, a right negative terminal “N B -“ 104.

[0032] In Fig. 2 schematically shows an embodiment of a switch circuit 200 according to the invention. The switch circuit 200 is divided into a left side 207 and a right side 208. On the left side 207, a half-bridge 211, 217 is arranged in an upper half and a half-bridge 213, 215 is arranged in a lower half. On the right side 208, a half-bridge 212, 218 is arranged in an upper half and a half-bridge 214, 216 is arranged in a lower half. The respective half-bridge comprises a respective high-side switch 211 or 212 or 213 or 214 and a respective low-side switch 215 or 216 or 217 or 218. The designations of the respective switches 211, 212, 213, 214, 215, 216, 217, 218 were chosen so that an assignment to the switches 111, 112, 113, 114, 115, 116, 117, 118 from Fig. 1 is possible, wherein the respective first digit is determined by the respective figure number. In the illustrated embodiment of a switch circuit 200 according to the invention, a respective switch is formed by four MOSFETs connected in parallel, designated in the figure by letters a, b, c and d. According to the invention, an arrangement of the half-bridge 213, 215 in the lower left half and the half-bridge 214, 216 in the lower right half is obtained by mirroring the half-bridge 211, 217 in the upper left half and the half-bridge 212, 218 in the upper right half at a virtual mirror plane separating the two halves. This also means that the high-side switches 211, 212 form an uppermost row and the high-side switches 213, 214 form a lowermost row.Both middle rows 215, 216, 217, 218 are accordingly formed by the left low-side switches 215, 217 and the right low-side switches 216, 218 and are each connected with their respective low-side ends to a left negative terminal “N. A -“ 202 and a right negative terminal “N B -“ 204. On the left side 207, the half-bridges are connected by a left positive terminal “N A +“ 201. On the right side 208, the half-bridges are enclosed by a right positive terminal “N B +“ 203. The square brackets of the two positive terminals 201 and 203 are arranged so that the center tap connections “Nx” 205 and “N Y “ 206 can run within the same single layer between the two sides 207 and 208.

[0033] In Fig. 3 schematically shows a layout topology 300 for a direct-bonded copper (DBC) printed circuit board 310 produced using an embodiment of the method according to the invention. During the production of the DBC printed circuit board 310, conductor tracks 301, 302, 303, 304, 305, 306 made of copper are applied to a ceramic substrate, the respective shape of which follows the layout topology according to the invention and which, with the same material height applied to the ceramic substrate, have a predetermined cross-sectional size in planar extent according to an embodiment of the method according to the invention, so that an identical ohmic resistance is formed along a current path formed between the terminals and the switches. In one embodiment of the switch circuit according to the invention, the layout orto identify in the layout topology 300 a trace 301 with a left positive terminal, a trace 303 with a right positive terminal, a trace 302 with a left negative terminal, a trace 304 with a right negative terminal, a trace 305 with a center tap connection in the upper half and a trace 306 with a center tap connection in the lower half.

[0034] In Fig. 4, in an embodiment 400, a current path 401 is schematically shown on the embodiment of the switch circuit according to the invention from Fig. 2. The current path 401 runs, for example, from the positive left terminal 201 through two randomly selected high-side switches 211a and 211c to the center tap connection 205 and further through the low-side switches 218a and 218c to the negative right terminal 204. Regardless of which of the two high-side switches 211a or 211c, and through which of the two low-side switches 218a or 218c a current flows, the same path length is always traversed. In order to have the same ohmic resistance, the cross-sections of the conductor tracks 201, 205, and 204 must be adapted to one another accordingly. Therefore, for example, the negative right terminal "N B-“ 204, which can be loaded by two half-bridges formed by the high-side switch 211 and the low-side switch 218 or formed by the high-side switch 213 and the low-side switch 216, has a higher cross-section than, for example, the center tap connection “Nx” 205. With a double load, the cross-section of the negative right connection “N B -“ 204 opposite the center tap connection “Nx” 205. Such a double load of the negative terminals “N A -“ 202 and “N B -“ 204 occurs mainly in serial switching states and bypass switching states of a module or a switch circuit implementing these switching states, which are in Fig. 5 are shown.

[0035] In Fig. 5 schematically shows several current paths 510, 520, 530, 540 in an upper half of an embodiment of a switch circuit according to the invention. A path in a lower half of the same embodiment of a switch circuit according to the invention behaves analogously. The respective current path forms between a positive left terminal 501 or a negative left terminal 502 via a center tap connection 505 to a positive right terminal 503 or a negative right terminal 504. Only the upper half of an embodiment of a switch circuit according to the invention, each with four MOSFETs connected in parallel as high-side switches 506 or low-side switches 507, is shown.The current path 510 results in a switching state “serial negative”, the current path 520 results in a switching state “serial positive”, the current path 530 results in a switching state “parallel” and finally the current path 540 results in a switching state “bypass”.

[0036] In Fig. 6 schematically shows a circuit for a module 600 of a multilevel converter, which comprises an embodiment of a switch circuit 610 according to the invention. According to the invention, the switch circuit 610 has, on a left side 607 and on a right side 608, four half-bridges with four high-side switches 611, 612, 613, 614 and four low-side switches 615, 616, 617, 618, a left negative terminal 602, a right negative terminal 604, a left upper high-side terminal 601a, a left lower high-side terminal 601b, a right upper high-side terminal 603a, a right lower high-side terminal 603b, and two center tap connections 605 and 606. A respective high-side switch 611, 612, 613, 614 or low-side switch 615, 616, 617, 618 is realized by six MOSFETs connected in parallel.The module further comprises four module connections 621, 622, 623, 624 and an energy storage device 619, which is connected to the module connections 621, 622, 623, 624 in series, in parallel, or bypassed by the switch circuit 610. The left positive connection of the switch circuit 610 is formed by the left upper high-side connection 601a, the left lower high-side connection 601b, and by their connection, running on the left side of the circuit board outside the switch circuit 610, and realizes the left module connection “N. A +“ 621. The right positive connection of the switch circuit 610 is formed by the right upper high-side connection 603a, the right lower high-side connection 603b, as well as by their connection, running on the right side of the circuit board outside the switch circuit 610, and realizes the right module connection “N B+“ 623. The left negative terminal 602 of the switch circuit 610 realizes the left negative terminal “N A -“ 622 of the module 600. The right negative terminal 604 of the switch circuit 610 realizes the right negative terminal “N B -“ 624 of module 600.

[0037] In Fig. 7 schematically shows a further layout topology 700 for a printed circuit board with inlays 701, 702, 703, 704, 705, 706, produced using an embodiment of the method according to the invention. In the layout topology 700, an inlay 701 is equivalent to a left positive terminal of a corresponding switch circuit, an inlay 703 to a right positive terminal of the corresponding switch circuit, an inlay 702 to a left negative terminal of the corresponding switch circuit, an inlay 704 to a right negative terminal of the corresponding switch circuit, an inlay 705 to a center tap connection in the upper half of the corresponding switch circuit, and an inlay 706 to a center tap connection in the lower half of the corresponding switch circuit.Additionally schematically illustrated are semiconductor switches symbolized by squares 711a, 711b, 712a, 712b, 713a, 713b, 714a, 714b, 715a, 715b, 716a, 716b, 717a, 717b, 718a, 718b, which are mounted on the circuit board and contacted with the respective inlays 701, 702, 703, 704, 705, 706. The embodiment shown here implements a respective high-side or low-side switch by two semiconductor switches connected in parallel.

[0038] In Fig. 8 schematically shows yet another layout topology 800 for a circuit board 810 with applied transistor dies 806, produced using an embodiment of the method according to the invention. In such a transistor die 806, e.g., a MOSFET or an IGBT, a source / emitter connection is located on the surface, on which a gate is additionally located as a small window. A drain / collector connection is located on the underside and is contacted, e.g., by soldering, with the metallization of the circuit board 810. The circuit board 810 is a ceramic substrate with applied metallizations, shown here, for example, by a gate landing pad or a gate grouping pad 802. A bond wire 804 connects such a pad to a connection to a transistor die 806. Connections are generally made externally onto the landing pads orthe positions 811, 812, 813, 815, 816 marked with “X” are applied to the metallizations of the circuit board 810, for example with so-called bond wires.

[0039] In Fig. 9 schematically shows a further layout topology 900 for a printed circuit board 910 produced using an embodiment of the method according to the invention. The printed circuit board 910 is a pure ceramic with conductor tracks 901, 902, 903, 904, 905, 906, 907, 908, 909, 911, 912, 913, 914 applied by metallization. At least one die, which may be a transistor, is then applied to this by means of die bonding as soldering, sintering, or the like, and contacts, e.g., by wire bonding. List of reference symbols 100 Circuit diagram 100 101 Left positive terminal N a + 102 Left negative terminal N a - 103 Right positive terminal N B + 104 Right negative terminal N B - 105 Center tap connection N X 106 Center tap connection N Y 111 Internal switch 112 Internal switch 113 Internal switch 114 Internal switch 115 Internal switch 116 Internal switch 117 Internal switch 118 Internal switch 119 energy storage 200 switch circuits 201 Left positive terminal “N A +“ 202 Left negative terminal “N A -“ 203 Right positive terminal “N B +“ 204 Right negative terminal “N B -“ 205 Center tap connection “N X “ 206 Center tap connection “N Y “ 207 Left side of the switch circuit 208 Right side of the switch circuit 211a,b,c,d Half-bridge, high-side switch 212a,b,c,d Half-bridge, high-side switch 213a,b,c,d Half-bridge, high-side switch 214a,b,c,d Half-bridge, high-side switch 215a,b,c,d Half-bridge, low-side switch 216a,b,c,d Half-bridge, low-side switch 217a,b,c,d Half-bridge, low-side switch 218a,b,c,d Half-bridge, low-side switch 300 Layout topology 301 Conductor track left positive connection 302 Conductor track left negative connection 303 Conductor track right positive connection 304 Conductor track right negative connection 305 Conductor track 306 Conductor track 310 DBC circuit board 400 Design of a switch circuit 401 current path 501 Left positive terminal 502 Left negative terminal 503 Right positive terminal 504 Right negative terminal 505 Center tap connection 506 high-side switch 507 Low-side switch 510 current path 520 current path 530 current path 540 current path 600 module circuit 601a Left upper high-side connector 601b Left lower high-side connector 602 Left negative terminal 603a Right upper high-side connector 603b Right lower high-side connector 604 Right negative terminal 605 Center tap connection 606 Center tap connection 607 Left side 608 Right side 610 switch circuit 611 high-side switch 612 high-side switch 613 high-side switch 614 high-side switch 615 Low-side switch 616 Low-side switch 617 Low-side switch 618 Low-side switch 621 Left positive module connection “N A +“ 622 Left negative module connection “N A -“ 623 Right positive module connection “N B +“ 624 Right negative module connection “N B -“ 700 Layout Topology 701 Inlay left positive connection 702 Inlay left negative connection 703 Inlay right positive connection 704 Inlay right negative connection 705 Inlay center tap connection 706 Inlay center tap connection 711a semiconductor switch 711b semiconductor switch 712a semiconductor switch 712b semiconductor switch 713a semiconductor switch 713b semiconductor switch 714a semiconductor switch 714b semiconductor switch 715a semiconductor switch 715b semiconductor switch 716a semiconductor switch 716b semiconductor switch 717a semiconductor switch 717b semiconductor switch 718a semiconductor switch 718b semiconductor switch 800 Layout topology 802 Gate Landing Pad / Gate Grouping Pad 804 Bond Wire 806 transistor die 810 circuit board 811 Position for connection 812 Position for connection 813 Position for connection 815 Position for connection 816 Position for connection 900 Layout Topology 901 Conductor track 902 conductor track 903 Conductor track 904 Conductor track 905 Conductor track 906 Conductor track 907 Conductor track 908 Conductor track 909 Conductor track 910 circuit board 911 conductor track 912 conductor track 913 Conductor track 914 Conductor track

Claims

[1] Method for producing a layout topology (300, 700) for a switch circuit (200, 400, 610) with single-layer current conduction, wherein the switch circuit comprises a printed circuit board (310) having the layout topology, four half-bridges, four nodes with a respective connection for a respective external line and two center tap connections (205, 206, 305, 306, 505, 605, 606, 705, 706), wherein a respective half-bridge has at least one high-side switch (211a, 211b, 211c, 211d, 212a, 212b, 212c, 212d, 213a, 213b, 213c, 213d, 214a, 214b, 214c, 214d, 506, 611, 612, 613, 614) and at least one low-side switch (215a, 215b, 215c, 215d, 216a, 216b, 216c, 216d, 217a, 217b, 217c, 217d, 218a, 218b, 218c, 218d, 507, 615, 616, 617, 618), wherein the layout topology is divided into a left side (207, 607) and a right side (208, 608) and two half-bridges are arranged on each side,wherein each side is divided into an upper half and a lower half, and a respective half of a respective side has a half-bridge whose arrangement is mirrored from the upper half to the lower half, with the respective low-side switch being closer to the mirror plane than the respective high-side switch, wherein the respective half-bridge has a high-side terminal (601a, 601b, 603a, 603b) at a high-side end and a low-side terminal at a low-side end, wherein the high-side terminals of the respective half-bridges in the upper half and the lower half on each side are respectively connected to one another and form a respective positive node, wherein the low-side terminals of the respective half-bridges in the upper half and lower half on each side are respectively connected to one another and form a respective negative node,wherein a respective center tap between the at least one low-side switch and the at least one high-side switch of a respective half-bridge in the upper half and lower half of the left side is connected to the respective center tap in the same upper half and lower half of the right side, wherein in the layout topology a left positive terminal (201, 301, 501, 701) and a left negative terminal (202, 302, 502, 602, 702) are arranged on the left side and a right positive terminal (203, 303, 503, 703) and a right negative terminal (204, 304, 504, 604, 704) are arranged on the right side, wherein the left positive terminal is formed in the form of a clamp open to the right and enclosing the arrangement of the half-bridges on the left side, wherein the right positive terminal is formed in the form of a clamp open to the left and enclosing the arrangement of the half-bridges on the right side enclosing bracket is formed,whereby both clamps together enclose all half-bridges, wherein the respective negative terminal (602, 604, 702, 704) is arranged in the middle of each side, wherein the positive node formed by the high-side terminals of the respective half-bridges of the respective side is realized by the respective positive terminal of the same respective side, and wherein the negative node formed by the low-side terminals of the respective half-bridges of the respective side is realized by the respective negative terminal of the same respective side. [2] Method according to claim 1, in which the layout topology according to the invention is designed to provide, for each half-bridge, a number M of high-side switches (211a, 211b, 211c, 211d, 212a, 212b, 212c, 212d, 213a, 213b, 213c, 213d, 214a, 214b, 214c, 214d, 506, 611, 612, 613, 614) connected in parallel and arranged in series and a number M of low-side switches (215a, 215b, 215c, 215d, 216a, 216b, 216c, 216d, 217a, 217b, 217c, 217d, 218a, 218b, 218c, 218d, 507, 615, 616, 617, 618). [3] Method according to one of the preceding claims, in which a respective cross-sectional size of a respective current guide of the layout topology according to the invention is selected such that along a respective current path between a terminal on the left side and a terminal on the right side, an equal ohmic resistance is present between the respective switches through which the current flows, regardless of a respective switch position of the switch circuit. [4] Method according to one of the preceding claims, in which the respective positive and negative nodes and / or the respective center tap connections are each formed by at least one conductor track (301, 302, 303, 304, 305, 306) running on the printed circuit board or connections to inlays (701, 702, 703, 704, 705, 706) running within the printed circuit board are provided on them. [5] Switch circuit (200, 400, 610) with single-layer current conduction, which comprises a printed circuit board (310) having a layout topology (300, 700) produced by a method according to one of the preceding claims, and which comprises four half-bridges, four nodes with respective connections for respective external lines and two center tap connectors (205, 206, 305, 306, 505, 605, 606, 705, 706) within a single-layer layer, wherein each half-bridge has at least one high-side switch (211a, 211b, 211c, 211d, 212a, 212b, 212c, 212d, 213a, 213b, 213c, 213d, 214a, 214b, 214c, 214d, 506, 611, 612, 613, 614) and at least one low-side switch (215a, 215b, 215c, 215d, 216a, 216b, 216c, 216d, 217a, 217b, 217c, 217d, 218a, 218b, 218c, 218d, 507, 615, 616, 617, 618), wherein at least two half-bridges are arranged on a left side (207, 607) and a right side (208, 608) of the layout topology,wherein each side of the layout topology, divided into an upper half and a lower half, has at least one half-bridge, the respective arrangement of which is mirrored from the upper half to the lower half, and the respective low-side switch is closer to the mirror plane than the respective high-side switch, wherein the respective half-bridge has a high-side terminal (601a, 601b, 603a, 603b) at a high-side end and a low-side terminal at a low-side end, wherein the high-side terminals of the respective half-bridges in the upper half and the lower half on each side are respectively connected to one another and form a respective positive node, wherein the low-side terminals of the respective half-bridges in the upper half and lower half on each side are respectively connected to one another and form a respective negative node,wherein a respective center tap connector connects a respective center tap between the at least one high-side switch and the at least one low-side switch of a respective half-bridge in the upper half and the lower half of the left side to the respective center tap in the same upper half and the same lower half of the right side, wherein a left positive terminal (201, 301, 501, 701) and a right positive terminal (203, 303, 503, 703) of the layout topology in the form of a square bracket encloses the arrangement of the half-bridges on each side such that both brackets together enclose all half-bridges, wherein a left negative terminal (202, 302, 502, 602, 702) and a right negative terminal (204, 304, 504, 604, 704) are arranged in the middle of each side,wherein the positive node formed by the high-side terminals of the respective half-bridges of the respective side is realized by the respective positive terminal of the same respective side, and the negative node formed by the low-side terminals of the respective half-bridges of the respective side is realized by the respective negative terminal of the same respective side. [6] Switch circuit according to claim 5, wherein the at least one high-side switch (211a, 211b, 211c, 211d, 212a, 212b, 212c, 212d, 213a, 213b, 213c, 213d, 214a, 214b, 214c, 214d, 506, 611, 612, 613, 614) and the at least one low-side switch (215a, 215b, 215c, 215d, 216a, 216b, 216c, 216d, 217a, 217b, 217c, 217d, 218a, 218b, 218c, 218d, 507, 615, 616, 617, 618) are each realized by a MOSFET. [7] Switch circuit according to claim 5 or 6, wherein each half-bridge comprises a number M of parallel-connected and series-arranged high-side switches (211a, 211b, 211c, 211d, 212a, 212b, 212c, 212d, 213a, 213b, 213c, 213d, 214a, 214b, 214c, 214d, 506, 611, 612, 613, 614) and a number M of parallel-connected and series-arranged low-side switches (215a, 215b, 215c, 215d, 216a, 216b, 216c, 216d, 217a, 217b, 217c, 217d, 218a, 218b, 218c, 218d, 507, 615, 616, 617, 618). [8] Switch circuit according to one of claims 5 to 7, in which the respective positive and negative nodes and / or at least one center tap connector are each realized by at least one conductor track (301, 302, 303, 304, 305, 306) running on the printed circuit board. [9] Switch circuit according to one of claims 5 to 7, in which the respective positive and negative nodes and / or at least one center tap connector are each realized by at least one inlay (701, 702, 703, 704, 705, 706) embedded in the printed circuit board. [10] Switch circuit according to one of claims 6 to 9, in which an electrical resistance and thus a current flow are determined by a selection of a cross-sectional size of a current-carrying line.

Images